Update version

Avoids crash seen in #2132

.github/workflows/pull-request.yml

@@ -24,7 +24,7 @@ jobs:
     - name: Run codespell
       uses: codespell-project/actions-codespell@master
       with:
-        skip: ./ArduinoCore-API,./libraries/ESP8266SdFat,./libraries/Adafruit_TinyUSB_Arduino,./libraries/LittleFS/lib,./tools/pyserial,./pico-sdk,./.github,./docs/i2s.rst,./cores/rp2040/api,./libraries/FreeRTOS,./tools/libbearssl/bearssl,./include,./libraries/WiFi/examples/BearSSL_Server,./ota/uzlib,./libraries/http-parser/lib,./libraries/WebServer/examples/HelloServerBearSSL/HelloServerBearSSL.ino,./libraries/HTTPUpdateServer/examples/SecureBearSSLUpdater/SecureBearSSLUpdater.ino,./.git
+        skip: ./ArduinoCore-API,./libraries/ESP8266SdFat,./libraries/Adafruit_TinyUSB_Arduino,./libraries/LittleFS/lib,./tools/pyserial,./pico-sdk,./.github,./docs/i2s.rst,./cores/rp2040/api,./libraries/FreeRTOS,./tools/libbearssl/bearssl,./include,./libraries/WiFi/examples/BearSSL_Server,./ota/uzlib,./libraries/http-parser/lib,./libraries/WebServer/examples/HelloServerBearSSL/HelloServerBearSSL.ino,./libraries/HTTPUpdateServer/examples/SecureBearSSLUpdater/SecureBearSSLUpdater.ino,./.git,./libraries/FatFS/lib/fatfs,./libraries/FatFS/src/diskio.h,./libraries/FatFS/src/ff.cpp,./libraries/FatFS/src/ffconf.h,./libraries/FatFS/src/ffsystem.cpp,./libraries/FatFS/src/ff.h,./libraries/lwIP_WINC1500/src/driver,./libraries/lwIP_WINC1500/src/common,./libraries/lwIP_WINC1500/src/bus_wrapper,./libraries/lwIP_WINC1500/src/spi_flash
         ignore_words_list: ser,dout
 
 # Consistent style

.gitmodules

@@ -37,3 +37,6 @@
 [submodule "libraries/http_parser/lib/http-parser"]
 	path = libraries/http-parser/lib/http-parser
 	url = https://github.com/nodejs/http-parser.git
+[submodule "libraries/FatFS/lib/SPIFTL"]
+	path = libraries/FatFS/lib/SPIFTL
+	url = https://github.com/earlephilhower/SPIFTL.git

README.md

@@ -50,6 +50,7 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Melopero Cookie RP2040
 * Melopero Shake RP2040
 * Neko Systems BL2040 Mini
+* Olimex RP2040-Pico30
 * nullbits Bit-C PRO
 * Pimoroni PGA2040
 * Pimoroni Plasma2040
@@ -62,6 +63,7 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Seeed XIAO RP2040
 * Silicognition RP2040-Shim
 * Solder Party RP2040 Stamp
+* SparkFun MicroMod RP2040
 * SparkFun ProMicro RP2040
 * SparkFun Thing Plus RP2040
 * uPesy RP2040 DevKit
@@ -72,6 +74,8 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Waveshare RP2040 Plus
 * Waveshare RP2040 LCD 0.96
 * Waveshare RP2040 LCD 1.28
+* Waveshare RP2040 Matrix
+* Waveshare RP2040 PiZero
 * WIZnet W5100S-EVB-Pico
 * WIZnet W5500-EVB-Pico
 * WIZnet WizFi360-EVB-Pico
@@ -81,7 +85,7 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Adafruit TinyUSB Arduino (USB mouse, keyboard, flash drive, generic HID, CDC Serial, MIDI, WebUSB, others)
 * Bluetooth on the PicoW (Classic and BLE) with Keyboard, Mouse, Joystick, and Virtual Serial
 * Generic Arduino USB Serial, Keyboard, Joystick, and Mouse emulation
-* WiFi (Pico W)
+* WiFi (Pico W, ESP32-based ESPHost, Atmel WINC1500)
 * Ethernet (Wired W5500, W5100, ENC28J60)
 * HTTP client and server (WebServer)
 * SSL/TLS/HTTPS
@@ -253,6 +257,8 @@ The installed tools include a version of OpenOCD (in the pqt-openocd directory)
 * [http-parser](https://github.com/nodejs/http-parser) is copyright Joyent, Inc. and other Node contributors.
 * WebServer code modified from the [ESP32 WebServer](https://github.com/espressif/arduino-esp32/tree/master/libraries/WebServer) and is copyright (c) 2015 Ivan Grokhotkov and others.
 * [Xoshiro-cpp](https://github.com/Reputeless/Xoshiro-cpp) is copyright (c) 2020 Ryo Suzuki and distributed under the MIT license.
+* [FatFS low-level filesystem](http://elm-chan.org/fsw/ff/) code is Copyright (C) 2024, ChaN, all rights reserved.
+
 
 -Earle F. Philhower, III  
  earlephilhower@yahoo.com

cores/rp2040/RP2040Version.h

@@ -1,5 +1,5 @@
 #pragma once
 #define ARDUINO_PICO_MAJOR 3
-#define ARDUINO_PICO_MINOR 7
-#define ARDUINO_PICO_REVISION 2
-#define ARDUINO_PICO_VERSION_STR "3.7.2"
+#define ARDUINO_PICO_MINOR 8
+#define ARDUINO_PICO_REVISION 1
+#define ARDUINO_PICO_VERSION_STR "3.8.1"

cores/rp2040/SerialPIO.h

@@ -53,7 +53,7 @@ public:
     using Print::write;
     operator bool() override;
 
-    // Not to be called by users, only from the IRQ handler.  In public so that the C-language IQR callback can access it
+    // Not to be called by users, only from the IRQ handler.  In public so that the C-language IRQ callback can access it
     void _handleIRQ();
 
 protected:

cores/rp2040/SerialUART.cpp

@@ -201,7 +201,7 @@ void SerialUART::begin(unsigned long baud, uint16_t config) {
         break;
     }
     uart_set_format(_uart, bits, stop, parity);
-    uart_set_hw_flow(_uart, _rts != UART_PIN_NOT_DEFINED, _cts != UART_PIN_NOT_DEFINED);
+    uart_set_hw_flow(_uart, _cts != UART_PIN_NOT_DEFINED, _rts != UART_PIN_NOT_DEFINED);
     _writer = 0;
     _reader = 0;
 

docs/conf.py

@@ -54,9 +54,9 @@ author = u'Earle F. Philhower, III'
 # built documents.
 #
 # The short X.Y version.
-version = u'3.7.2'
+version = u'3.8.1'
 # The full version, including alpha/beta/rc tags.
-release = u'3.7.2'
+release = u'3.8.1'
 
 # The language for content autogenerated by Sphinx. Refer to documentation
 # for a list of supported languages.

docs/fatfsusb.rst

@@ -0,0 +1,42 @@
+FatFSUSB
+========
+
+When the onboard flash memory is used as a ``FatFS`` filesystem, the
+``FatFSUSB`` can be used to allow exporting it to a PC as a standard
+memory stick.  The PC can then access, add, and remove files as if the
+Pico was a USB memory stick, and upon ejection the Pico can access
+any new files just as if it made them itself.
+
+(Note, if you are using LittleFS then you need to use ``SingleFileDrive``
+to export a single file, not this class, because the PC does not
+understand the LittleFS disk format.)
+
+Callbacks, Interrupt Safety, and File Operations
+------------------------------------------------
+
+The ``FatFSUSB`` library allows your application to get a callback
+when a PC attempts to mount or unmount the Pico as a FAT drive.
+
+When the drive is being used by the Pico (i.e. any ``File`` is open for
+read or write, the ``FatFS`` is not ``end()`` -ed and still mounted,
+etc.) the host may not access it.  Conversely, while the host PC is
+connected to the drive no ``FatFS`` access by the Pico is allowed.
+
+Your ``driveReady`` callback will be called when the PC attempts to mount
+the drive.  If you have any files open, then this callback can report back
+that the drive is not yet ready.  When you complete file processing, the PC
+can re-attempt to mount the drive and your callback can return ``true`` .
+
+The ``onPlug`` callback will generally ``FatFS.end()`` and set a
+global flag letting your application know not to touch the filesystem until
+the flag is cleared by the ``onUnplug`` callback (which will also do a
+``FatFS.begin()`` call).
+
+Failing to close all files **and** ``FatFS.end()`` before granting the
+PC access to flash memory will result in corruption.  FAT does not allow multiple
+writers to access the same drive.  Even mounting and only reading files from
+the PC may cause hidden writes (things like access time, etc.) which would
+also cause corruption.
+
+See the included ``Listfiles-USB`` sketch for an example of working with
+these limitations.

docs/fs.rst

@@ -33,6 +33,7 @@ following include to the sketch:
     #include "LittleFS.h" // LittleFS is declared
     // #include <SDFS.h>
     // #include <SD.h>
+    // #include <FatFS.h>
 
 
 Compatible Filesystem APIs
@@ -48,10 +49,45 @@ SD card reader.
 SD is the Arduino-supported, somewhat old and limited SD card filesystem.
 It is recommended to use SDFS for new applications instead of SD.
 
-All three of these filesystems can open and manipulate ``File`` and ``Dir``
+FatFS implements a wear-leveled, FTL-backed FAT filesystem in the onboard
+flash which can be easily accessed over USB as a standard memory stick
+via FatFSUSB.
+
+All of these filesystems can open and manipulate ``File`` and ``Dir``
 objects with the same code because the implement a common end-user
 filesystem API.
 
+FatFS File System Caveats and Warnings
+--------------------------------------
+
+The FAT filesystem is ubiquitous, but it is also around 50 years old and ill
+suited to SPI flash memory due to having "hot spots" like the FAT copies that
+are rewritten many times over.  SPI flash allows a high, but limited, number
+of writes before losing the ability to write safely.  Applications like
+data loggers where many writes occur could end up wearing out the SPI flash
+sector that holds the FAT **years** before coming close to the write limits of
+the data sectors.
+
+To circumvent this issue, the FatFS implementation here uses a flash translation
+layer (FTL) developed for SPI flash on embedded systems.  This allows for the
+same LBA to be written over and over by the FAT filesystem, but use different
+flash locations.  For more information see
+[SPIFTL](https://github.com/earlephilhower/SPIFTL).  In this mode the Pico
+flash appears as a normal, 512-byte sector drive to the FAT.
+
+What this means, practically, is that about 5KB of RAM per megabyte of flash
+is required for housekeeping.  Writes can also become very slow if most of the
+flash LBA range is used (i.e. if the FAT drive is 99% full) due to the need
+for garbage collection processes to move data around and preserve the flash
+lifetime.
+
+Alternatively, if an FTL is not desired or memory is tight, FatFS can use the
+raw flash directly.  In this mode sectors are 4K in size and flash is mapped
+1:1 to sectors, so things like the FAT table updates will all use the same
+physical flash bits.  For low-utilization operations this may be fine, but if
+significant writes are done (from the Pico or the PC host) this may wear out
+portions of flash very quickly , rendering it unusable.
+
 LittleFS File System Limitations
 --------------------------------
 
@@ -115,8 +151,8 @@ second SPI port, ``SPI1``.  Just use the following call in place of
     SD.begin(cspin, SPI1);
 
 
-File system object (LittleFS/SD/SDFS)
--------------------------------------
+File system object (LittleFS/SD/SDFS/FatFS)
+-------------------------------------------
 
 setConfig
 ~~~~~~~~~
@@ -131,14 +167,22 @@ setConfig
     c2.setCSPin(12);
     SDFS.setConfig(c2);
 
+    FatFSConfig c3;
+    c3.setUseFTL(false); // Directly access flash memory
+    c3.setDirEntries(256); // We need 256 root directory entries on a format()
+    c3.setFATCopies(1); // Only 1 FAT to save 4K of space and extra writes
+    FatFS.setConfig(c3);
+    FatFS.format(); // Format using these settings, erasing everything
+
 This method allows you to configure the parameters of a filesystem
 before mounting.  All filesystems have their own ``*Config`` (i.e.
 ``SDFSConfig`` or ``LittleFSConfig`` with their custom set of options.
 All filesystems allow explicitly enabling/disabling formatting when
 mounts fail.  If you do not call this ``setConfig`` method before
 perforing ``begin()``, you will get the filesystem's default
-behavior and configuration. By default, LittleFS will autoformat the
-filesystem if it cannot mount it, while SDFS will not.
+behavior and configuration. By default, LittleFS and FatFS will autoformat the
+filesystem if it cannot mount it, while SDFS will not.  FatFS will also use
+the built-in FTL to support 512 byte sectors and higher write lifetime.
 
 begin
 ~~~~~

docs/multicore.rst

@@ -37,6 +37,11 @@ Pausing Cores
 
 Sometimes an application needs to pause the other core on chip (i.e. it is
 writing to flash or needs to stop processing while some other event occurs).
+In most cases, however, these calls are **SHOULD NOT BE USED**.  To synchronize
+cross-core operations use normal multiprocessor methods such as circular buffers,
+global ``volatile`` flags, mutexes, and the like.  Stopping a core has massive
+implications and can kill networking and USB communications if done too long or
+too frequently.
 
 void rp2040.idleOtherCore()
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -69,7 +74,12 @@ Communicating Between Cores
 The RP2040 provides a hardware FIFO for communicating between cores, but it
 is used exclusively for the idle/resume calls described above.  Instead, please
 use the following functions to access a software-managed, multicore safe
-FIFO.
+FIFO.  There are two FIFOs, one written to by core 0 and read by core 1, and
+the other written to by core 1 and read by core 0.
+
+You can (and probably should) use shared memory (such as ``volatile`` globals)
+or other normal multiprocessor communication algorithms to transfer data or
+work between cores, but for simple tasks these FIFO routines can suffice.
 
 void rp2040.fifo.push(uint32_t)
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -96,4 +106,4 @@ Reads a value from this core's FIFO and places it in dest.  Will return
 int rp2040.fifo.available()
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-Returns the number of values available in this core's FIFO.
+Returns the number of values available to read in this core's FIFO.

docs/ota.rst

@@ -12,7 +12,7 @@ OTA may be done using:
 -  `Arduino IDE <#arduino-ide>`__
 -  `Web Browser <#web-browser>`__
 -  `HTTP Server <#http-server>`__
-- Any other method (ZModen receive over a UART port, etc.) by using the ``Updater`` object in your sketch
+- Any other method (ZModem receive over a UART port, etc.) by using the ``Updater`` object in your sketch
 
 The Arduino IDE option is intended primarily for the software development phase. The other two options would be more useful after deployment, to provide the module with application updates either manually with a web browser, or automatically using an HTTP server.
 
@@ -189,7 +189,7 @@ Uploading modules wirelessly from Arduino IDE is intended for the following typi
 
 To upload wirelessly from the IDE:
 
-1. Build a sketch starts ``WiFi`` and includes the appropriate calls to ``ArduinoOTA`` (see the examples for reference).  These include the ``ArduinoOTA.begin()`` call in ``setup()`` and periodically calling ``ArduinoOTA.handle();`` from the ``loop()``
+1. Build a sketch that starts ``WiFi`` and includes the appropriate calls to ``ArduinoOTA`` (see the examples for reference).  These include the ``ArduinoOTA.begin()`` call in ``setup()`` and periodically calling ``ArduinoOTA.handle();`` from the ``loop()``
 
 2. Upload using standard USB connection the first time.
 
@@ -212,9 +212,9 @@ Before implementing it in your sketch, it is a good idea to check how it works u
 
 Enter the password and upload should be initiated as usual with the only difference being ``Authenticating...OK`` message visible in the upload log.
 
-You will not be prompted for a reentering the same password next time. Arduino IDE will remember it for you. You will see a prompt for password only after reopening IDE, or if you change it in your sketch, upload the sketch and then try to upload it again.
+You will not be prompted for a reentering the same password next time. Arduino IDE will remember it for you. You will see a prompt for password only after reopening the IDE, or if you change it in your sketch, upload the sketch and then try to upload it again.
 
-Please note, it is possible to reveal password entered previously in Arduino IDE, if IDE has not been closed since last upload. This can be done by enabling *Show verbose output during: upload* in *File > Preferences* and attempting to upload the module.
+Please note, it is possible to reveal password entered previously in Arduino IDE, if the IDE has not been closed since last upload. This can be done by enabling *Show verbose output during: upload* in *File > Preferences* and attempting to upload the module.
 
 
 

docs/piouart.rst

@@ -15,6 +15,7 @@ To instantiate only a serial transmit or receive unit, pass in
 ``SerialPIO::NOPIN`` as the ``txpin`` or ``rxpin``.
 
 For example, to make a transmit-only port on GP16
+
 .. code:: cpp
 
         SerialPIO transmitter( 16, SerialPIO::NOPIN );

include/lwipopts.h

@@ -1,11 +1,9 @@
-#ifndef _LWIPOPTS_EXAMPLE_COMMONH_H
-#define _LWIPOPTS_EXAMPLE_COMMONH_H
+#pragma once
 
 #ifdef __cplusplus
 extern "C" {
 #endif // __cplusplus
 
-
 // Critical section protection
 extern void noInterrupts();
 extern void interrupts();
@@ -108,6 +106,3 @@ extern void __setSystemTime(unsigned long long sec, unsigned long us);
 #ifdef __cplusplus
 }
 #endif // __cplusplus
-
-
-#endif /* __LWIPOPTS_H__ */

keywords.txt

@@ -3,15 +3,25 @@
 #######################################
 
 Arduino	KEYWORD3		RESERVED_WORD
+defined	KEYWORD3		RESERVED_WORD
 
 #######################################
 # Datatypes (KEYWORD1)
 #######################################
 
+Dir	KEYWORD1
+File	KEYWORD1
+timeval	KEYWORD1
+time_t	KEYWORD1
+
 #######################################
 # Methods and Functions (KEYWORD2)
 #######################################
 
+openDir	KEYWORD2
+setConfig	KEYWORD2
+fileCreationTime	KEYWORD2
+
 setup1	KEYWORD2
 loop1	KEYWORD2
 
@@ -61,7 +71,24 @@ digitalReadFast	KEYWORD2
 
 enableDoubleResetBootloader	KEYWORD2
 
+openDir	KEYWORD2
+next	KEYWORD2
+getLastWrite	KEYWORD2
+getCreationTime	KEYWORD2
+fileTime	KEYWORD2
+fileCreationTime	KEYWORD2
+check	KEYWORD2
+setTimeCallback	KEYWORD2
+settimeofday	KEYWORD2
+
+sprintf_P	KEYWORD2
+strcpy_P	KEYWORD2
+snprintf_P	KEYWORD2
+strncpy_P	KEYWORD2
+
 OUTPUT_2MA	LITERAL1
 OUTPUT_4MA	LITERAL1
 OUTPUT_8MA	LITERAL1
 OUTPUT_12MA	LITERAL1
+
+ARDUINO_ARCH_RP2040	LITERAL1

libraries/BTstackLib/src/BTstackLib.cpp

@@ -808,9 +808,6 @@ void BTstackManager::setup(const char * name) {
     hci_add_event_handler(&hci_event_callback_registration);
     l2cap_init();
 
-    // setup central device db
-    le_device_db_init();
-
     sm_init();
 
     att_server_init(att_db_util_get_address(), att_read_callback, att_write_callback);
@@ -889,6 +886,9 @@ uint16_t BTstackManager::addGATTCharacteristicDynamic(UUID * uuid, uint16_t flag
 void BTstackManager::setAdvData(uint16_t adv_data_len, const uint8_t * adv_data) {
     gap_advertisements_set_data(adv_data_len, (uint8_t*) adv_data);
 }
+void BTstackManager::setScanData(uint16_t scan_data_len, const uint8_t * scan_data) {
+    gap_scan_response_set_data(scan_data_len, (uint8_t*) scan_data);
+}
 void BTstackManager::startAdvertising() {
     gap_advertisements_enable(1);
 }

libraries/BTstackLib/src/BTstackLib.h

@@ -143,6 +143,7 @@ extern "C" {
         void enableDebugLogger();
 
         void setAdvData(uint16_t size, const uint8_t * data);
+        void setScanData(uint16_t size, const uint8_t * data);
         void iBeaconConfigure(UUID * uuid, uint16_t major_id, uint16_t minor_id, uint8_t measured_power = 0xc6);
         void startAdvertising();
         void stopAdvertising();

libraries/FatFS/keywords.txt

@@ -0,0 +1,24 @@
+#######################################
+# Syntax Coloring Map
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+FatFS	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+format	KEYWORD2
+FatFSConfig	KEYWORD2
+setUseFTL	KEYWORD2
+setDirEntries	KEYWORD2
+setFATCopies	KEYWORD2
+
+#######################################
+# Constants (LITERAL1)
+#######################################
+

libraries/FatFS/lib/fatfs/LICENSE.txt

@@ -0,0 +1,24 @@
+FatFs License
+
+FatFs has being developped as a personal project of the author, ChaN. It is free from the code anyone else wrote at current release. Following code block shows a copy of the FatFs license document that heading the source files.
+
+/*----------------------------------------------------------------------------/
+/  FatFs - Generic FAT Filesystem Module  Rx.xx                               /
+/-----------------------------------------------------------------------------/
+/
+/ Copyright (C) 20xx, ChaN, all right reserved.
+/
+/ FatFs module is an open source software. Redistribution and use of FatFs in
+/ source and binary forms, with or without modification, are permitted provided
+/ that the following condition is met:
+/
+/ 1. Redistributions of source code must retain the above copyright notice,
+/    this condition and the following disclaimer.
+/
+/ This software is provided by the copyright holder and contributors "AS IS"
+/ and any warranties related to this software are DISCLAIMED.
+/ The copyright owner or contributors be NOT LIABLE for any damages caused
+/ by use of this software.
+/----------------------------------------------------------------------------*/
+
+Therefore FatFs license is one of the BSD-style licenses, but there is a significant feature. FatFs is mainly intended for embedded systems. In order to extend the usability for commercial products, the redistributions of FatFs in binary form, such as embedded code, binary library and any forms without source code, do not need to include about FatFs in the documentations. This is equivalent to the 1-clause BSD license. Of course FatFs is compatible with the most of open source software licenses include GNU GPL. When you redistribute the FatFs source code with changes or create a fork, the license can also be changed to GNU GPL, BSD-style license or any open source software license that not conflict with FatFs license.

libraries/FatFS/lib/fatfs/README.md

@@ -0,0 +1 @@
+FatFS home at http://elm-chan.org/fsw/ff/

libraries/FatFS/library.properties

@@ -0,0 +1,10 @@
+name=FatFS
+version=0.15.0
+author=Earle F. Philhower, III <earlephilhower@yahoo.com>
+maintainer=Earle F. Philhower, III <earlephilhower@yahoo.com>
+sentence=FS filesystem for use on flash using ChaN's FatFS code
+paragraph=FS filesystem for use on flash using ChaN's FatFS code
+category=Data Storage
+url=https://github.com/earlephilhower/arduino-pico
+architectures=rp2040
+dot_a_linkage=true

libraries/FatFS/src/FatFS.cpp

@@ -0,0 +1,310 @@
+/*
+    FatFS.cpp - file system wrapper for FatFS
+    Copyright (c) 2024 Earle F. Philhower, III. All rights reserved.
+
+    Based on spiffs_api.cpp which is:
+    | Copyright (c) 2015 Ivan Grokhotkov. All rights reserved.
+
+    This code was influenced by NodeMCU and Sming libraries, and first version of
+    Arduino wrapper written by Hristo Gochkov.
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+    You should have received a copy of the GNU Lesser General Public
+    License along with this library; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+#include "FatFS.h"
+#include <FS.h>
+//#define FTL_DEBUG 1
+#include "../lib/SPIFTL/FlashInterfaceRP2040.h"
+#include "../lib/SPIFTL/SPIFTL.h"
+
+using namespace fs;
+
+
+#if !defined(NO_GLOBAL_INSTANCES) && !defined(NO_GLOBAL_FATFS)
+extern uint8_t _FS_start;
+extern uint8_t _FS_end;
+
+FS FatFS = FS(FSImplPtr(new fatfs::FatFSImpl()));
+static FlashInterfaceRP2040 *_fi = new FlashInterfaceRP2040(&_FS_start, &_FS_end);
+static SPIFTL *_ftl = nullptr;
+uint16_t _sectorSize = 512;
+#endif
+
+namespace fatfs {
+
+
+bool FatFSImpl::begin() {
+    if (_mounted) {
+        return true;
+    }
+
+    if (_cfg._useFTL) {
+        if (!_ftl) {
+            _ftl = new SPIFTL(_fi);
+        }
+        _sectorSize = 512;
+    } else {
+        _sectorSize = 4096;
+        if (_ftl) {
+            delete _ftl;
+            _ftl = nullptr;
+        }
+    }
+
+    _mounted = (FR_OK == f_mount(&_fatfs, "", 1));
+    if (!_mounted && _cfg._autoFormat) {
+        format();
+        _mounted = (FR_OK == f_mount(&_fatfs, "", 1));
+    }
+    //FsDateTime::setCallback(dateTimeCB); TODO = callback
+    return _mounted;
+}
+
+void FatFSImpl::end() {
+    if (_mounted) {
+        f_unmount("");
+    }
+    sync();
+    _mounted = false;
+}
+
+
+// Required to be global because SDFAT doesn't allow a this pointer in it's own time call
+time_t (*__fatfs_timeCallback)(void) = nullptr;
+
+FileImplPtr FatFSImpl::open(const char* path, OpenMode openMode, AccessMode accessMode) {
+    if (!_mounted) {
+        DEBUGV("FatFSImpl::open() called on unmounted FS\n");
+        return FileImplPtr();
+    }
+    if (!path || !path[0]) {
+        DEBUGV("FatFSImpl::open() called with invalid filename\n");
+        return FileImplPtr();
+    }
+    BYTE flags = _getFlags(openMode, accessMode);
+    if ((openMode && OM_CREATE) && strchr(path, '/')) {
+        // For file creation, silently make subdirs as needed.  If any fail,
+        // it will be caught by the real file open later on
+        char *pathStr = strdup(path);
+        if (pathStr) {
+            // Make dirs up to the final fnamepart
+            char *ptr = strrchr(pathStr, '/');
+            if (ptr && ptr != pathStr) { // Don't try to make root dir!
+                *ptr = 0;
+                f_mkdir(pathStr);
+            }
+        }
+        free(pathStr);
+    }
+    auto sharedFd = std::make_shared<FIL>();
+    if (FR_OK == f_open(sharedFd.get(), path, flags)) {
+        return std::make_shared<FatFSFileImpl>(this, sharedFd, path, FA_WRITE & flags ? true : false);
+    }
+    sharedFd = nullptr;
+    DEBUGV("FatFSImpl::openFile: path=`%s` openMode=%d accessMode=%d FAILED", path, openMode, accessMode);
+    return FileImplPtr();
+}
+
+DirImplPtr FatFSImpl::openDir(const char* path) {
+    if (!_mounted) {
+        return DirImplPtr();
+    }
+    char *pathStr = strdup(path); // Allow edits on our scratch copy
+    if (!pathStr) {
+        // OOM
+        return DirImplPtr();
+    }
+    // Get rid of any trailing slashes
+    while (strlen(pathStr) && (pathStr[strlen(pathStr) - 1] == '/')) {
+        pathStr[strlen(pathStr) - 1] = 0;
+    }
+    // At this point we have a name of "/blah/blah/blah" or "blah" or ""
+    // If that references a directory, just open it and we're done.
+    DIR dirFile;
+    FILINFO fno;
+    const char *filter = "";
+    if (!pathStr[0]) {
+        // openDir("") === openDir("/")
+        f_opendir(&dirFile, "/");
+        filter = "";
+    } else if (FR_OK == f_stat(pathStr, &fno)) {
+        if (fno.fattrib & AM_DIR) {
+            // Easy peasy, path specifies an existing dir!
+            f_opendir(&dirFile, pathStr);
+            filter = "";
+        } else {
+            // This is a file, so open the containing dir
+            char *ptr = strrchr(pathStr, '/');
+            if (!ptr) {
+                // No slashes, open the root dir
+                f_opendir(&dirFile, "/");
+                filter = pathStr;
+            } else {
+                // We've got slashes, open the dir one up
+                *ptr = 0; // Remove slash, truncare string
+                f_opendir(&dirFile, pathStr);
+                filter = ptr + 1;
+            }
+        }
+    } else {
+        // Name doesn't exist, so use the parent dir of whatever was sent in
+        // This is a file, so open the containing dir
+        char *ptr = strrchr(pathStr, '/');
+        if (!ptr) {
+            // No slashes, open the root dir
+            f_opendir(&dirFile, "/");
+            filter = pathStr;
+        } else {
+            // We've got slashes, open the dir one up
+            *ptr = 0; // Remove slash, truncare string
+            f_opendir(&dirFile, pathStr);
+            filter = ptr + 1;
+        }
+    }
+    // TODO -can this ever happen?
+    //    if (!dirFile) {
+    //        DEBUGV("FatFSImpl::openDir: path=`%s`\n", path);
+    //        return DirImplPtr();
+    //    }
+    auto sharedDir = std::make_shared<DIR>(dirFile);
+    auto ret = std::make_shared<FatFSDirImpl>(filter, this, sharedDir, pathStr);
+    free(pathStr);
+    return ret;
+}
+
+bool FatFSImpl::format() {
+    if (_mounted) {
+        return false;
+    }
+    BYTE *work = new BYTE[4096]; /* Work area (larger is better for processing time) */
+    MKFS_PARM opt = { FM_FAT | FM_SFD, _cfg._fatCopies, 1, _sectorSize, _cfg._dirEntries};
+    auto ret = f_mkfs("", &opt, work, 4096);
+    delete[] work;
+
+    return ret == FR_OK;
+}
+
+DSTATUS disk_status(BYTE p) {
+    (void) p;
+    return 0;
+}
+
+static bool started = false;
+
+void disk_format() {
+    if (!started && _ftl) {
+        _ftl->format();
+    }
+}
+
+DSTATUS disk_initialize(BYTE p) {
+    (void) p;
+    if (!started) {
+        if (_ftl) {
+            _ftl->start();
+        }
+        started = true;
+    }
+    return 0;
+}
+
+DRESULT disk_read(BYTE p, BYTE *buff, LBA_t sect, UINT count) {
+    (void) p;
+    for (unsigned int i = 0; i < count; i++) {
+        if (_ftl) {
+            _ftl->read(sect + i, buff + i * _sectorSize);
+        } else {
+            _fi->read(sect + i, 0, buff, _sectorSize);
+        }
+    }
+    return RES_OK;
+}
+
+DRESULT disk_write(BYTE pdrv, const BYTE* buff, LBA_t sector, UINT count) {
+    (void) pdrv;
+    for (unsigned int i = 0; i < count; i++) {
+        if (_ftl) {
+            _ftl->write(sector + i, buff + i * _sectorSize);
+        } else {
+            _fi->eraseBlock(sector + i);
+            _fi->program(sector + i, 0, buff + i * _sectorSize, _sectorSize);
+        }
+    }
+    return RES_OK;
+}
+
+DRESULT disk_ioctl(BYTE pdrv, BYTE cmd, void* buff) {
+    (void) pdrv;
+    switch (cmd) {
+    case CTRL_SYNC:
+        if (_ftl) {
+            _ftl->persist();
+        }
+        return RES_OK;
+    case GET_SECTOR_COUNT: {
+        LBA_t *p = (LBA_t *)buff;
+        if (_ftl) {
+            *p = _ftl->lbaCount();
+        } else {
+            *p = _fi->size() / 4096;
+        }
+        return RES_OK;
+    }
+    case GET_SECTOR_SIZE: {
+        WORD *w = (WORD *)buff;
+        *w = _sectorSize;
+        return RES_OK;
+    }
+    case GET_BLOCK_SIZE: {
+        DWORD *dw = (DWORD *)buff;
+        *dw = _sectorSize;
+        return RES_OK;
+    }
+    case CTRL_TRIM: {
+        LBA_t *lba = (LBA_t *)buff;
+        for (unsigned int i = lba[0]; i < lba[1]; i++) {
+            if (_ftl) {
+                _ftl->trim(i);
+            } else {
+                _fi->eraseBlock(i);
+            }
+        }
+        return RES_OK;
+    }
+    default:
+        return RES_PARERR;
+    }
+}
+
+DWORD get_fattime() {
+    time_t now;
+    if (fatfs::__fatfs_timeCallback) {
+        now = fatfs::__fatfs_timeCallback();
+    } else {
+        now = time(nullptr);
+    }
+    struct tm *stm = localtime(&now);
+    if (stm->tm_year < 80) {
+        // FAT can't report years before 1980
+        stm->tm_year = 80;
+    }
+    return (DWORD)(stm->tm_year - 80) << 25 |
+           (DWORD)(stm->tm_mon + 1) << 21 |
+           (DWORD)stm->tm_mday << 16 |
+           (DWORD)stm->tm_hour << 11 |
+           (DWORD)stm->tm_min << 5 |
+           (DWORD)stm->tm_sec >> 1;
+}
+
+}

libraries/FatFS/src/FatFS.h

@@ -0,0 +1,470 @@
+/*
+    FatFS.h - File system wrapper for FatFS
+    Copyright (c) 2024 Earle F. Philhower, III.  All rights reserved.
+
+    Based on spiffs_api.h, which is:
+    | Copyright (c) 2015 Ivan Grokhotkov. All rights reserved.
+
+    This code was influenced by NodeMCU and Sming libraries, and first version of
+    Arduino wrapper written by Hristo Gochkov.
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+    You should have received a copy of the GNU Lesser General Public
+    License along with this library; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#pragma once
+
+#include <limits>
+#include <assert.h>
+#include "FS.h"
+#include "FSImpl.h"
+#include "./ff.h"
+#include "./diskio.h"
+#include <FS.h>
+
+using namespace fs;
+
+namespace fatfs {
+
+class FatFSFileImpl;
+class FatFSDirImpl;
+class FatFSConfig : public FSConfig {
+public:
+    static constexpr uint32_t FSId = 0x46617446;
+
+    FatFSConfig(bool autoFormat = true, bool useFTL = true, int dirEntries = 128, int fatCopies = 1) : FSConfig(FSId, autoFormat), _useFTL(useFTL), _dirEntries(dirEntries), _fatCopies(fatCopies) { }
+
+    FatFSConfig setUseFTL(bool val = true) {
+        _useFTL = val;
+        return *this;
+    }
+
+    FatFSConfig setDirEntries(int entries) {
+        _dirEntries = entries;
+        return *this;
+    }
+
+    FatFSConfig setFATCopies(int copies) {
+        _fatCopies = copies;
+        return *this;
+    }
+
+    bool _useFTL;
+    uint16_t _dirEntries;
+    uint8_t _fatCopies;
+};
+
+class FatFSImpl : public FSImpl {
+public:
+    FatFSImpl() : _mounted(false) {
+    }
+
+    FileImplPtr open(const char* path, OpenMode openMode, AccessMode accessMode) override;
+
+    bool exists(const char* path) override {
+        if (_mounted) {
+            FILINFO fi;
+            if (FR_OK == f_stat(path, &fi)) {
+                return true;
+            }
+        }
+        return false;
+    }
+
+    DirImplPtr openDir(const char* path) override;
+
+    bool rename(const char* pathFrom, const char* pathTo) override {
+        return _mounted ? (FR_OK == f_rename(pathFrom, pathTo)) : false;
+    }
+
+    bool info64(FSInfo64& info) override {
+        if (!_mounted) {
+            DEBUGV("FatFS::info: FS not mounted\n");
+            return false;
+        }
+        FATFS *fs = nullptr;
+        DWORD fre_clust = 0;
+        f_getfree("", &fre_clust, &fs);
+        info.maxOpenFiles = 999; // TODO - not valid
+        info.blockSize = 512 * fs->csize;
+        info.pageSize = 0; // TODO ?
+        info.maxPathLength = 255; // TODO ?
+        info.totalBytes = (uint64_t)(fs->n_fatent - 2) * (uint64_t)fs->csize * 512;
+        info.usedBytes = info.totalBytes - (uint64_t)fre_clust * fs->csize * 512;
+        return true;
+    }
+
+    bool info(FSInfo& info) override {
+        FSInfo64 i;
+        if (!info64(i)) {
+            return false;
+        }
+        info.blockSize     = i.blockSize;
+        info.pageSize      = i.pageSize;
+        info.maxOpenFiles  = i.maxOpenFiles;
+        info.maxPathLength = i.maxPathLength;
+        info.totalBytes    = (size_t)i.totalBytes;
+        info.usedBytes     = (size_t)i.usedBytes;
+        return true;
+    }
+
+    bool remove(const char* path) override {
+        return _mounted ? (FR_OK == f_unlink(path)) : false;
+    }
+
+    bool mkdir(const char* path) override {
+        return _mounted ? (FR_OK == f_mkdir(path)) : false;
+    }
+
+    bool rmdir(const char* path) override {
+        return _mounted ? (FR_OK == f_unlink(path)) : false;
+    }
+
+    bool setConfig(const FSConfig &cfg) override {
+        if ((cfg._type != FatFSConfig::FSId) || _mounted) {
+            DEBUGV("FatFS::setConfig: invalid config or already mounted\n");
+            return false;
+        }
+        _cfg = *static_cast<const FatFSConfig *>(&cfg);
+        return true;
+    }
+
+    bool begin() override;
+    void end() override;
+    bool format() override;
+
+    // Helper function, takes FAT and makes standard time_t
+    static time_t FatToTimeT(uint16_t d, uint16_t t) {
+        struct tm tiempo;
+        memset(&tiempo, 0, sizeof(tiempo));
+        tiempo.tm_sec  = (((int)t) <<  1) & 0x3e;
+        tiempo.tm_min  = (((int)t) >>  5) & 0x3f;
+        tiempo.tm_hour = (((int)t) >> 11) & 0x1f;
+        tiempo.tm_mday = (int)(d & 0x1f);
+        tiempo.tm_mon  = ((int)(d >> 5) & 0x0f) - 1;
+        tiempo.tm_year = ((int)(d >> 9) & 0x7f) + 80;
+        tiempo.tm_isdst = -1;
+        return mktime(&tiempo);
+    }
+
+    virtual void setTimeCallback(time_t (*cb)(void)) override {
+        extern time_t (*__fatfs_timeCallback)(void);
+        __fatfs_timeCallback = cb;
+    }
+
+    void sync() {
+        disk_ioctl(0, CTRL_SYNC, nullptr);
+    }
+
+protected:
+    friend class FatFileImpl;
+    friend class FatFSDirImpl;
+
+    FATFS* getFs() {
+        return &_fatfs;
+    }
+
+    static int _getFlags(OpenMode openMode, AccessMode accessMode) {
+        int mode = 0;
+        if (openMode & OM_CREATE) {
+            mode |= FA_CREATE_ALWAYS;
+        }
+        if (openMode & OM_APPEND) {
+            mode |= FA_OPEN_APPEND;
+        }
+        if (openMode & OM_TRUNCATE) {
+            mode |= 0; // TODO - no truncate?
+        }
+        if ((accessMode & (AM_READ | AM_WRITE)) == (AM_READ | AM_WRITE)) {
+            mode |= FA_READ | FA_WRITE;
+        } else if (accessMode & AM_READ) {
+            mode |= FA_READ;
+        } else if (accessMode & AM_WRITE) {
+            mode |= FA_WRITE;
+        }
+        return mode;
+    }
+
+    FATFS        _fatfs;
+    FatFSConfig  _cfg;
+    bool         _mounted;
+};
+
+
+class FatFSFileImpl : public FileImpl {
+public:
+    FatFSFileImpl(FatFSImpl *fs, std::shared_ptr<FIL> fd, const char *name, bool writable)
+        : _fs(fs), _fd(fd), _opened(true), _writable(writable) {
+        _name = std::shared_ptr<char>(new char[strlen(name) + 1], std::default_delete<char[]>());
+        strcpy(_name.get(), name);
+    }
+
+    ~FatFSFileImpl() override {
+        flush();
+        close();
+    }
+
+    int availableForWrite() override {
+        return 1; // TODO - not implemented? _opened ? _fd->availableSpaceForWrite() : 0;
+    }
+
+    size_t write(const uint8_t *buf, size_t size) override {
+        if (_opened) {
+            UINT bw;
+            if (FR_OK == f_write(_fd.get(), buf, size, &bw)) {
+                return bw;
+            }
+        }
+        return -1; // some kind of error
+    }
+
+    int read(uint8_t* buf, size_t size) override {
+        if (_opened) {
+            UINT bw;
+            if (FR_OK == f_read(_fd.get(), buf, size, &bw)) {
+                return bw;
+            }
+        }
+        return -1;
+    }
+
+    void flush() override {
+        if (_opened) {
+            f_sync(_fd.get());
+            if (_writable) {
+                _fs->sync();
+            }
+        }
+    }
+
+    bool seek(uint32_t pos, SeekMode mode) override {
+        if (!_opened) {
+            return false;
+        }
+        switch (mode) {
+        case SeekSet:
+            return FR_OK == f_lseek(_fd.get(), pos);
+        case SeekEnd:
+            return FR_OK == f_lseek(_fd.get(), f_size(_fd.get()) - pos); // TODO again, odd from POSIX
+        case SeekCur:
+            return FR_OK == f_lseek(_fd.get(), f_tell(_fd.get()) + pos);
+        default:
+            // Should not be hit, we've got an invalid seek mode
+            DEBUGV("FatFSFileImpl::seek: invalid seek mode %d\n", mode);
+            assert((mode == SeekSet) || (mode == SeekEnd) || (mode == SeekCur)); // Will fail and give meaningful assert message
+            return false;
+        }
+    }
+
+    size_t position() const override {
+        return _opened ? f_tell(_fd.get()) : 0;
+    }
+
+    size_t size() const override {
+        return _opened ? f_size(_fd.get()) : 0;
+    }
+
+    bool truncate(uint32_t size) override {
+        if (!_opened) {
+            DEBUGV("FatFSFileImpl::truncate: file not opened\n");
+            return false;
+        }
+        if (FR_OK == f_lseek(_fd.get(), size)) {
+            return FR_OK == f_truncate(_fd.get());
+        }
+        return false;
+    }
+
+    void close() override {
+        if (_opened) {
+            f_close(_fd.get());
+            // f_close does a disk_sync
+            _opened = false;
+        }
+    }
+
+    const char* name() const override {
+        if (!_opened) {
+            DEBUGV("FatFSFileImpl::name: file not opened\n");
+            return nullptr;
+        } else {
+            const char *p = _name.get();
+            const char *slash = strrchr(p, '/');
+            // For names w/o any path elements, return directly
+            // If there are slashes, return name after the last slash
+            // (note that strrchr will return the address of the slash,
+            // so need to increment to ckip it)
+            return (slash && slash[1]) ? slash + 1 : p;
+        }
+    }
+
+    const char* fullName() const override {
+        return _opened ? _name.get() : nullptr;
+    }
+
+    bool isFile() const override {
+        if (_opened) {
+            FILINFO fno;
+            if (FR_OK == f_stat(_name.get(), &fno)) {
+                return (fno.fattrib & AM_DIR) ? false : true;
+            }
+        }
+        return false;
+    }
+
+    bool isDirectory() const override {
+        if (_opened) {
+            FILINFO fno;
+            if (FR_OK == f_stat(_name.get(), &fno)) {
+                return (fno.fattrib & AM_DIR) ? true : false;
+            }
+        }
+        return false;
+    }
+
+    time_t getLastWrite() override {
+        return getCreationTime(); // TODO - FatFS doesn't seem to report both filetimes
+    }
+
+    time_t getCreationTime() override {
+        time_t ftime = 0;
+        if (_opened && _fd) {
+            FILINFO fno;
+            if (FR_OK == f_stat(_name.get(), &fno)) {
+                ftime = FatFSImpl::FatToTimeT(fno.fdate, fno.ftime);
+            }
+        }
+        return ftime;
+    }
+
+protected:
+    FatFSImpl*            _fs;
+    std::shared_ptr<FIL>  _fd;
+    std::shared_ptr<char> _name;
+    bool                  _opened;
+    bool                  _writable;
+};
+
+class FatFSDirImpl : public DirImpl {
+public:
+    FatFSDirImpl(const String& pattern, FatFSImpl* fs, std::shared_ptr<DIR> dir, const char *dirPath = nullptr)
+        : _pattern(pattern), _fs(fs), _dir(dir), _valid(false), _dirPath(nullptr) {
+        if (dirPath) {
+            _dirPath = std::shared_ptr<char>(new char[strlen(dirPath) + 1], std::default_delete<char[]>());
+            strcpy(_dirPath.get(), dirPath);
+        }
+        f_opendir(dir.get(), dirPath);
+    }
+
+    ~FatFSDirImpl() override {
+        if (_dir) {
+            f_closedir(_dir.get());
+        }
+    }
+
+    FileImplPtr openFile(OpenMode openMode, AccessMode accessMode) override {
+        if (!_valid) {
+            return FileImplPtr();
+        }
+        // MAX_PATH on FAT32 is potentially 260 bytes per most implementations
+        char tmpName[260];
+        snprintf(tmpName, sizeof(tmpName), "%s%s%s", _dirPath.get() ? _dirPath.get() : "", _dirPath.get() && _dirPath.get()[0] ? "/" : "", _lfn);
+        return _fs->open((const char *)tmpName, openMode, accessMode);
+    }
+
+    const char* fileName() override {
+        if (!_valid) {
+            DEBUGV("FatFSDirImpl::fileName: directory not valid\n");
+            return nullptr;
+        }
+        return (const char*) _lfn; //_dirent.name;
+    }
+
+    size_t fileSize() override {
+        if (!_valid) {
+            return 0;
+        }
+
+        return _size;
+    }
+
+    time_t fileTime() override {
+        if (!_valid) {
+            return 0;
+        }
+
+        return _time;
+    }
+
+    time_t fileCreationTime() override {
+        if (!_valid) {
+            return 0;
+        }
+
+        return _creation;
+    }
+
+    bool isFile() const override {
+        return _valid ? _isFile : false;
+    }
+
+    bool isDirectory() const override {
+        return _valid ? _isDirectory : false;
+    }
+
+    bool next() override {
+        const int n = _pattern.length();
+        do {
+            FILINFO fno;
+            if (FR_OK == f_readdir(_dir.get(), &fno) && fno.fname[0]) {
+                _valid = true;
+                _size = fno.fsize;
+                _isFile = fno.fattrib & AM_DIR ? false : true;
+                _isDirectory = !_isFile;
+                _time = FatFSImpl::FatToTimeT(fno.fdate, fno.ftime);
+                _creation = _time;
+                strncpy(_lfn, fno.fname, sizeof(_lfn));
+            } else {
+                _valid = false;
+            }
+        } while (_valid && strncmp((const char*) _lfn, _pattern.c_str(), n) != 0);
+        return _valid;
+    }
+
+    bool rewind() override {
+        _valid = false;
+        return FR_OK == f_rewinddir(_dir.get());
+        return false;
+    }
+
+protected:
+    String                  _pattern;
+    FatFSImpl*              _fs;
+    std::shared_ptr<DIR>    _dir;
+    bool                    _valid;
+    char                    _lfn[64];
+    time_t                  _time;
+    time_t                  _creation;
+    std::shared_ptr<char>   _dirPath;
+    uint32_t                _size;
+    bool                    _isFile;
+    bool                    _isDirectory;
+};
+
+}; // namespace sdfs
+
+#if !defined(NO_GLOBAL_INSTANCES) && !defined(NO_GLOBAL_FATFS)
+extern FS FatFS;
+using fatfs::FatFSConfig;
+#endif

libraries/FatFS/src/diskio.h

@@ -0,0 +1,81 @@
+/*  -----------------------------------------------------------------------/
+    /  Low level disk interface modlue include file   (C)ChaN, 2019          /
+    /-----------------------------------------------------------------------*/
+
+#ifndef _DISKIO_DEFINED
+#define _DISKIO_DEFINED
+
+//#ifdef __cplusplus
+//extern "C" {
+//#endif
+
+namespace fatfs {
+
+/* Status of Disk Functions */
+typedef BYTE	DSTATUS;
+
+/* Results of Disk Functions */
+typedef enum {
+    RES_OK = 0,		/* 0: Successful */
+    RES_ERROR,		/* 1: R/W Error */
+    RES_WRPRT,		/* 2: Write Protected */
+    RES_NOTRDY,		/* 3: Not Ready */
+    RES_PARERR		/* 4: Invalid Parameter */
+} DRESULT;
+
+
+/*---------------------------------------*/
+/* Prototypes for disk control functions */
+
+
+DSTATUS disk_initialize(BYTE pdrv);
+DSTATUS disk_status(BYTE pdrv);
+DRESULT disk_read(BYTE pdrv, BYTE* buff, LBA_t sector, UINT count);
+DRESULT disk_write(BYTE pdrv, const BYTE* buff, LBA_t sector, UINT count);
+DRESULT disk_ioctl(BYTE pdrv, BYTE cmd, void* buff);
+
+
+/* Disk Status Bits (DSTATUS) */
+
+#define STA_NOINIT		0x01	/* Drive not initialized */
+#define STA_NODISK		0x02	/* No medium in the drive */
+#define STA_PROTECT		0x04	/* Write protected */
+
+
+/* Command code for disk_ioctrl fucntion */
+
+/* Generic command (Used by FatFs) */
+#define CTRL_SYNC			0	/* Complete pending write process (needed at FF_FS_READONLY == 0) */
+#define GET_SECTOR_COUNT	1	/* Get media size (needed at FF_USE_MKFS == 1) */
+#define GET_SECTOR_SIZE		2	/* Get sector size (needed at FF_MAX_SS != FF_MIN_SS) */
+#define GET_BLOCK_SIZE		3	/* Get erase block size (needed at FF_USE_MKFS == 1) */
+#define CTRL_TRIM			4	/* Inform device that the data on the block of sectors is no longer used (needed at FF_USE_TRIM == 1) */
+
+/* Generic command (Not used by FatFs) */
+#define CTRL_POWER			5	/* Get/Set power status */
+#define CTRL_LOCK			6	/* Lock/Unlock media removal */
+#define CTRL_EJECT			7	/* Eject media */
+#define CTRL_FORMAT			8	/* Create physical format on the media */
+
+/* MMC/SDC specific ioctl command */
+#define MMC_GET_TYPE		10	/* Get card type */
+#define MMC_GET_CSD			11	/* Get CSD */
+#define MMC_GET_CID			12	/* Get CID */
+#define MMC_GET_OCR			13	/* Get OCR */
+#define MMC_GET_SDSTAT		14	/* Get SD status */
+#define ISDIO_READ			55	/* Read data form SD iSDIO register */
+#define ISDIO_WRITE			56	/* Write data to SD iSDIO register */
+#define ISDIO_MRITE			57	/* Masked write data to SD iSDIO register */
+
+/* ATA/CF specific ioctl command */
+#define ATA_GET_REV			20	/* Get F/W revision */
+#define ATA_GET_MODEL		21	/* Get model name */
+#define ATA_GET_SN			22	/* Get serial number */
+
+};
+
+//#ifdef __cplusplus
+//}
+//#endif
+
+#endif

libraries/FatFS/src/ff.h

@@ -0,0 +1,431 @@
+/*  ----------------------------------------------------------------------------/
+    /  FatFs - Generic FAT Filesystem module  R0.15                               /
+    /-----------------------------------------------------------------------------/
+    /
+    / Copyright (C) 2022, ChaN, all right reserved.
+    /
+    / FatFs module is an open source software. Redistribution and use of FatFs in
+    / source and binary forms, with or without modification, are permitted provided
+    / that the following condition is met:
+
+    / 1. Redistributions of source code must retain the above copyright notice,
+    /    this condition and the following disclaimer.
+    /
+    / This software is provided by the copyright holder and contributors "AS IS"
+    / and any warranties related to this software are DISCLAIMED.
+    / The copyright owner or contributors be NOT LIABLE for any damages caused
+    / by use of this software.
+    /
+    /----------------------------------------------------------------------------*/
+
+
+#ifndef FF_DEFINED
+#define FF_DEFINED	80286	/* Revision ID */
+
+//#ifdef __cplusplus
+//extern "C" {
+//#endif
+
+#include "ffconf.h"		/* FatFs configuration options */
+
+#if FF_DEFINED != FFCONF_DEF
+#error Wrong configuration file (ffconf.h).
+#endif
+
+
+/* Integer types used for FatFs API */
+
+#if defined(_WIN32)		/* Windows VC++ (for development only) */
+#define FF_INTDEF 2
+#include <windows.h>
+typedef unsigned __int64 QWORD;
+#include <float.h>
+#define isnan(v) _isnan(v)
+#define isinf(v) (!_finite(v))
+
+#elif (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || defined(__cplusplus)	/* C99 or later */
+#define FF_INTDEF 2
+#include <stdint.h>
+namespace fatfs {
+typedef unsigned int	UINT;	/* int must be 16-bit or 32-bit */
+typedef unsigned char	BYTE;	/* char must be 8-bit */
+typedef uint16_t		WORD;	/* 16-bit unsigned integer */
+typedef uint32_t		DWORD;	/* 32-bit unsigned integer */
+typedef uint64_t		QWORD;	/* 64-bit unsigned integer */
+typedef WORD			WCHAR;	/* UTF-16 character type */
+};
+#else  	/* Earlier than C99 */
+#define FF_INTDEF 1
+typedef unsigned int	UINT;	/* int must be 16-bit or 32-bit */
+typedef unsigned char	BYTE;	/* char must be 8-bit */
+typedef unsigned short	WORD;	/* 16-bit unsigned integer */
+typedef unsigned long	DWORD;	/* 32-bit unsigned integer */
+typedef WORD			WCHAR;	/* UTF-16 character type */
+#endif
+
+namespace fatfs {
+/* Type of file size and LBA variables */
+
+#if FF_FS_EXFAT
+#if FF_INTDEF != 2
+#error exFAT feature wants C99 or later
+#endif
+typedef QWORD FSIZE_t;
+#if FF_LBA64
+typedef QWORD LBA_t;
+#else
+typedef DWORD LBA_t;
+#endif
+#else
+#if FF_LBA64
+#error exFAT needs to be enabled when enable 64-bit LBA
+#endif
+typedef DWORD FSIZE_t;
+typedef DWORD LBA_t;
+#endif
+
+
+
+/* Type of path name strings on FatFs API (TCHAR) */
+
+#if FF_USE_LFN && FF_LFN_UNICODE == 1 	/* Unicode in UTF-16 encoding */
+typedef WCHAR TCHAR;
+#define _T(x) L ## x
+#define _TEXT(x) L ## x
+#elif FF_USE_LFN && FF_LFN_UNICODE == 2	/* Unicode in UTF-8 encoding */
+typedef char TCHAR;
+#define _T(x) u8 ## x
+#define _TEXT(x) u8 ## x
+#elif FF_USE_LFN && FF_LFN_UNICODE == 3	/* Unicode in UTF-32 encoding */
+typedef DWORD TCHAR;
+#define _T(x) U ## x
+#define _TEXT(x) U ## x
+#elif FF_USE_LFN && (FF_LFN_UNICODE < 0 || FF_LFN_UNICODE > 3)
+#error Wrong FF_LFN_UNICODE setting
+#else									/* ANSI/OEM code in SBCS/DBCS */
+typedef char TCHAR;
+#define _T(x) x
+#define _TEXT(x) x
+#endif
+
+
+
+/* Definitions of volume management */
+
+#if FF_MULTI_PARTITION		/* Multiple partition configuration */
+typedef struct {
+    BYTE pd;	/* Physical drive number */
+    BYTE pt;	/* Partition: 0:Auto detect, 1-4:Forced partition) */
+} PARTITION;
+extern PARTITION VolToPart[];	/* Volume - Partition mapping table */
+#endif
+
+#if FF_STR_VOLUME_ID
+#ifndef FF_VOLUME_STRS
+extern const char* VolumeStr[FF_VOLUMES];	/* User defied volume ID */
+#endif
+#endif
+
+
+
+/* Filesystem object structure (FATFS) */
+
+typedef struct {
+    BYTE	fs_type;		/* Filesystem type (0:not mounted) */
+    BYTE	pdrv;			/* Volume hosting physical drive */
+    BYTE	ldrv;			/* Logical drive number (used only when FF_FS_REENTRANT) */
+    BYTE	n_fats;			/* Number of FATs (1 or 2) */
+    BYTE	wflag;			/* win[] status (b0:dirty) */
+    BYTE	fsi_flag;		/* FSINFO status (b7:disabled, b0:dirty) */
+    WORD	id;				/* Volume mount ID */
+    WORD	n_rootdir;		/* Number of root directory entries (FAT12/16) */
+    WORD	csize;			/* Cluster size [sectors] */
+#if FF_MAX_SS != FF_MIN_SS
+    WORD	ssize;			/* Sector size (512, 1024, 2048 or 4096) */
+#endif
+#if FF_USE_LFN
+    WCHAR*	lfnbuf;			/* LFN working buffer */
+#endif
+#if FF_FS_EXFAT
+    BYTE*	dirbuf;			/* Directory entry block scratchpad buffer for exFAT */
+#endif
+#if !FF_FS_READONLY
+    DWORD	last_clst;		/* Last allocated cluster */
+    DWORD	free_clst;		/* Number of free clusters */
+#endif
+#if FF_FS_RPATH
+    DWORD	cdir;			/* Current directory start cluster (0:root) */
+#if FF_FS_EXFAT
+    DWORD	cdc_scl;		/* Containing directory start cluster (invalid when cdir is 0) */
+    DWORD	cdc_size;		/* b31-b8:Size of containing directory, b7-b0: Chain status */
+    DWORD	cdc_ofs;		/* Offset in the containing directory (invalid when cdir is 0) */
+#endif
+#endif
+    DWORD	n_fatent;		/* Number of FAT entries (number of clusters + 2) */
+    DWORD	fsize;			/* Number of sectors per FAT */
+    LBA_t	volbase;		/* Volume base sector */
+    LBA_t	fatbase;		/* FAT base sector */
+    LBA_t	dirbase;		/* Root directory base sector (FAT12/16) or cluster (FAT32/exFAT) */
+    LBA_t	database;		/* Data base sector */
+#if FF_FS_EXFAT
+    LBA_t	bitbase;		/* Allocation bitmap base sector */
+#endif
+    LBA_t	winsect;		/* Current sector appearing in the win[] */
+    BYTE	win[FF_MAX_SS];	/* Disk access window for Directory, FAT (and file data at tiny cfg) */
+} FATFS;
+
+
+
+/* Object ID and allocation information (FFOBJID) */
+
+typedef struct {
+    FATFS*	fs;				/* Pointer to the hosting volume of this object */
+    WORD	id;				/* Hosting volume's mount ID */
+    BYTE	attr;			/* Object attribute */
+    BYTE	stat;			/* Object chain status (b1-0: =0:not contiguous, =2:contiguous, =3:fragmented in this session, b2:sub-directory stretched) */
+    DWORD	sclust;			/* Object data start cluster (0:no cluster or root directory) */
+    FSIZE_t	objsize;		/* Object size (valid when sclust != 0) */
+#if FF_FS_EXFAT
+    DWORD	n_cont;			/* Size of first fragment - 1 (valid when stat == 3) */
+    DWORD	n_frag;			/* Size of last fragment needs to be written to FAT (valid when not zero) */
+    DWORD	c_scl;			/* Containing directory start cluster (valid when sclust != 0) */
+    DWORD	c_size;			/* b31-b8:Size of containing directory, b7-b0: Chain status (valid when c_scl != 0) */
+    DWORD	c_ofs;			/* Offset in the containing directory (valid when file object and sclust != 0) */
+#endif
+#if FF_FS_LOCK
+    UINT	lockid;			/* File lock ID origin from 1 (index of file semaphore table Files[]) */
+#endif
+} FFOBJID;
+
+
+
+/* File object structure (FIL) */
+
+typedef struct {
+    FFOBJID	obj;			/* Object identifier (must be the 1st member to detect invalid object pointer) */
+    BYTE	flag;			/* File status flags */
+    BYTE	err;			/* Abort flag (error code) */
+    FSIZE_t	fptr;			/* File read/write pointer (Zeroed on file open) */
+    DWORD	clust;			/* Current cluster of fpter (invalid when fptr is 0) */
+    LBA_t	sect;			/* Sector number appearing in buf[] (0:invalid) */
+#if !FF_FS_READONLY
+    LBA_t	dir_sect;		/* Sector number containing the directory entry (not used at exFAT) */
+    BYTE*	dir_ptr;		/* Pointer to the directory entry in the win[] (not used at exFAT) */
+#endif
+#if FF_USE_FASTSEEK
+    DWORD*	cltbl;			/* Pointer to the cluster link map table (nulled on open, set by application) */
+#endif
+#if !FF_FS_TINY
+    BYTE	buf[FF_MAX_SS];	/* File private data read/write window */
+#endif
+} FIL;
+
+
+
+/* Directory object structure (DIR) */
+
+typedef struct {
+    FFOBJID	obj;			/* Object identifier */
+    DWORD	dptr;			/* Current read/write offset */
+    DWORD	clust;			/* Current cluster */
+    LBA_t	sect;			/* Current sector (0:Read operation has terminated) */
+    BYTE*	dir;			/* Pointer to the directory item in the win[] */
+    BYTE	fn[12];			/* SFN (in/out) {body[8],ext[3],status[1]} */
+#if FF_USE_LFN
+    DWORD	blk_ofs;		/* Offset of current entry block being processed (0xFFFFFFFF:Invalid) */
+#endif
+#if FF_USE_FIND
+    const TCHAR* pat;		/* Pointer to the name matching pattern */
+#endif
+} DIR;
+
+
+
+/* File information structure (FILINFO) */
+
+typedef struct {
+    FSIZE_t	fsize;			/* File size */
+    WORD	fdate;			/* Modified date */
+    WORD	ftime;			/* Modified time */
+    BYTE	fattrib;		/* File attribute */
+#if FF_USE_LFN
+    TCHAR	altname[FF_SFN_BUF + 1];/* Alternative file name */
+    TCHAR	fname[FF_LFN_BUF + 1];	/* Primary file name */
+#else
+    TCHAR	fname[12 + 1];	/* File name */
+#endif
+} FILINFO;
+
+
+
+/* Format parameter structure (MKFS_PARM) */
+
+typedef struct {
+    BYTE fmt;			/* Format option (FM_FAT, FM_FAT32, FM_EXFAT and FM_SFD) */
+    BYTE n_fat;			/* Number of FATs */
+    UINT align;			/* Data area alignment (sector) */
+    UINT n_root;		/* Number of root directory entries */
+    DWORD au_size;		/* Cluster size (byte) */
+} MKFS_PARM;
+
+
+
+/* File function return code (FRESULT) */
+
+typedef enum {
+    FR_OK = 0,				/* (0) Succeeded */
+    FR_DISK_ERR,			/* (1) A hard error occurred in the low level disk I/O layer */
+    FR_INT_ERR,				/* (2) Assertion failed */
+    FR_NOT_READY,			/* (3) The physical drive cannot work */
+    FR_NO_FILE,				/* (4) Could not find the file */
+    FR_NO_PATH,				/* (5) Could not find the path */
+    FR_INVALID_NAME,		/* (6) The path name format is invalid */
+    FR_DENIED,				/* (7) Access denied due to prohibited access or directory full */
+    FR_EXIST,				/* (8) Access denied due to prohibited access */
+    FR_INVALID_OBJECT,		/* (9) The file/directory object is invalid */
+    FR_WRITE_PROTECTED,		/* (10) The physical drive is write protected */
+    FR_INVALID_DRIVE,		/* (11) The logical drive number is invalid */
+    FR_NOT_ENABLED,			/* (12) The volume has no work area */
+    FR_NO_FILESYSTEM,		/* (13) There is no valid FAT volume */
+    FR_MKFS_ABORTED,		/* (14) The f_mkfs() aborted due to any problem */
+    FR_TIMEOUT,				/* (15) Could not get a grant to access the volume within defined period */
+    FR_LOCKED,				/* (16) The operation is rejected according to the file sharing policy */
+    FR_NOT_ENOUGH_CORE,		/* (17) LFN working buffer could not be allocated */
+    FR_TOO_MANY_OPEN_FILES,	/* (18) Number of open files > FF_FS_LOCK */
+    FR_INVALID_PARAMETER	/* (19) Given parameter is invalid */
+} FRESULT;
+
+
+
+
+/*--------------------------------------------------------------*/
+/* FatFs Module Application Interface                           */
+/*--------------------------------------------------------------*/
+
+FRESULT f_open(FIL* fp, const TCHAR* path, BYTE mode);				/* Open or create a file */
+FRESULT f_close(FIL* fp);											/* Close an open file object */
+FRESULT f_read(FIL* fp, void* buff, UINT btr, UINT* br);			/* Read data from the file */
+FRESULT f_write(FIL* fp, const void* buff, UINT btw, UINT* bw);	/* Write data to the file */
+FRESULT f_lseek(FIL* fp, FSIZE_t ofs);								/* Move file pointer of the file object */
+FRESULT f_truncate(FIL* fp);										/* Truncate the file */
+FRESULT f_sync(FIL* fp);											/* Flush cached data of the writing file */
+FRESULT f_opendir(DIR* dp, const TCHAR* path);						/* Open a directory */
+FRESULT f_closedir(DIR* dp);										/* Close an open directory */
+FRESULT f_readdir(DIR* dp, FILINFO* fno);							/* Read a directory item */
+FRESULT f_findfirst(DIR* dp, FILINFO* fno, const TCHAR* path, const TCHAR* pattern);	/* Find first file */
+FRESULT f_findnext(DIR* dp, FILINFO* fno);							/* Find next file */
+FRESULT f_mkdir(const TCHAR* path);								/* Create a sub directory */
+FRESULT f_unlink(const TCHAR* path);								/* Delete an existing file or directory */
+FRESULT f_rename(const TCHAR* path_old, const TCHAR* path_new);	/* Rename/Move a file or directory */
+FRESULT f_stat(const TCHAR* path, FILINFO* fno);					/* Get file status */
+FRESULT f_chmod(const TCHAR* path, BYTE attr, BYTE mask);			/* Change attribute of a file/dir */
+FRESULT f_utime(const TCHAR* path, const FILINFO* fno);			/* Change timestamp of a file/dir */
+FRESULT f_chdir(const TCHAR* path);								/* Change current directory */
+FRESULT f_chdrive(const TCHAR* path);								/* Change current drive */
+FRESULT f_getcwd(TCHAR* buff, UINT len);							/* Get current directory */
+FRESULT f_getfree(const TCHAR* path, DWORD* nclst, FATFS** fatfs);	/* Get number of free clusters on the drive */
+FRESULT f_getlabel(const TCHAR* path, TCHAR* label, DWORD* vsn);	/* Get volume label */
+FRESULT f_setlabel(const TCHAR* label);							/* Set volume label */
+FRESULT f_forward(FIL* fp, UINT(*func)(const BYTE*, UINT), UINT btf, UINT* bf);	/* Forward data to the stream */
+FRESULT f_expand(FIL* fp, FSIZE_t fsz, BYTE opt);					/* Allocate a contiguous block to the file */
+FRESULT f_mount(FATFS* fs, const TCHAR* path, BYTE opt);			/* Mount/Unmount a logical drive */
+FRESULT f_mkfs(const TCHAR* path, const MKFS_PARM* opt, void* work, UINT len);	/* Create a FAT volume */
+FRESULT f_fdisk(BYTE pdrv, const LBA_t ptbl[], void* work);		/* Divide a physical drive into some partitions */
+FRESULT f_setcp(WORD cp);											/* Set current code page */
+int f_putc(TCHAR c, FIL* fp);										/* Put a character to the file */
+int f_puts(const TCHAR* str, FIL* cp);								/* Put a string to the file */
+int f_printf(FIL* fp, const TCHAR* str, ...);						/* Put a formatted string to the file */
+TCHAR* f_gets(TCHAR* buff, int len, FIL* fp);						/* Get a string from the file */
+
+/* Some API fucntions are implemented as macro */
+
+#define f_eof(fp) ((int)((fp)->fptr == (fp)->obj.objsize))
+#define f_error(fp) ((fp)->err)
+#define f_tell(fp) ((fp)->fptr)
+#define f_size(fp) ((fp)->obj.objsize)
+#define f_rewind(fp) f_lseek((fp), 0)
+#define f_rewinddir(dp) f_readdir((dp), 0)
+#define f_rmdir(path) f_unlink(path)
+#define f_unmount(path) f_mount(0, path, 0)
+
+
+
+
+/*--------------------------------------------------------------*/
+/* Additional Functions                                         */
+/*--------------------------------------------------------------*/
+
+/* RTC function (provided by user) */
+#if !FF_FS_READONLY && !FF_FS_NORTC
+DWORD get_fattime(void);	/* Get current time */
+#endif
+
+
+/* LFN support functions (defined in ffunicode.c) */
+
+#if FF_USE_LFN >= 1
+WCHAR ff_oem2uni(WCHAR oem, WORD cp);	/* OEM code to Unicode conversion */
+WCHAR ff_uni2oem(DWORD uni, WORD cp);	/* Unicode to OEM code conversion */
+DWORD ff_wtoupper(DWORD uni);			/* Unicode upper-case conversion */
+#endif
+
+
+/* O/S dependent functions (samples available in ffsystem.c) */
+
+#if FF_USE_LFN == 3		/* Dynamic memory allocation */
+void* ff_memalloc(UINT msize);		/* Allocate memory block */
+void ff_memfree(void* mblock);		/* Free memory block */
+#endif
+#if FF_FS_REENTRANT	/* Sync functions */
+int ff_mutex_create(int vol);		/* Create a sync object */
+void ff_mutex_delete(int vol);		/* Delete a sync object */
+int ff_mutex_take(int vol);		/* Lock sync object */
+void ff_mutex_give(int vol);		/* Unlock sync object */
+#endif
+
+
+
+
+/*--------------------------------------------------------------*/
+/* Flags and Offset Address                                     */
+/*--------------------------------------------------------------*/
+
+/* File access mode and open method flags (3rd argument of f_open) */
+#define	FA_READ				0x01
+#define	FA_WRITE			0x02
+#define	FA_OPEN_EXISTING	0x00
+#define	FA_CREATE_NEW		0x04
+#define	FA_CREATE_ALWAYS	0x08
+#define	FA_OPEN_ALWAYS		0x10
+#define	FA_OPEN_APPEND		0x30
+
+/* Fast seek controls (2nd argument of f_lseek) */
+#define CREATE_LINKMAP	((FSIZE_t)0 - 1)
+
+/* Format options (2nd argument of f_mkfs) */
+#define FM_FAT		0x01
+#define FM_FAT32	0x02
+#define FM_EXFAT	0x04
+#define FM_ANY		0x07
+#define FM_SFD		0x08
+
+/* Filesystem type (FATFS.fs_type) */
+#define FS_FAT12	1
+#define FS_FAT16	2
+#define FS_FAT32	3
+#define FS_EXFAT	4
+
+/* File attribute bits for directory entry (FILINFO.fattrib) */
+#define	AM_RDO	0x01	/* Read only */
+#define	AM_HID	0x02	/* Hidden */
+#define	AM_SYS	0x04	/* System */
+#define AM_DIR	0x10	/* Directory */
+#define AM_ARC	0x20	/* Archive */
+
+};
+
+//#ifdef __cplusplus
+//}
+//#endif
+
+#endif /* FF_DEFINED */

libraries/FatFS/src/ffconf.h

@@ -0,0 +1,296 @@
+/*  ---------------------------------------------------------------------------/
+    /  Configurations of FatFs Module
+    /---------------------------------------------------------------------------*/
+
+#define FFCONF_DEF	80286	/* Revision ID */
+
+/*  ---------------------------------------------------------------------------/
+    / Function Configurations
+    /---------------------------------------------------------------------------*/
+
+#define FF_FS_READONLY	0
+/*  This option switches read-only configuration. (0:Read/Write or 1:Read-only)
+    /  Read-only configuration removes writing API functions, f_write(), f_sync(),
+    /  f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(), f_getfree()
+    /  and optional writing functions as well. */
+
+
+#define FF_FS_MINIMIZE	0
+/*  This option defines minimization level to remove some basic API functions.
+    /
+    /   0: Basic functions are fully enabled.
+    /   1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_truncate() and f_rename()
+    /      are removed.
+    /   2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1.
+    /   3: f_lseek() function is removed in addition to 2. */
+
+
+#define FF_USE_FIND		1
+/*  This option switches filtered directory read functions, f_findfirst() and
+    /  f_findnext(). (0:Disable, 1:Enable 2:Enable with matching altname[] too) */
+
+
+#define FF_USE_MKFS		1
+/* This option switches f_mkfs() function. (0:Disable or 1:Enable) */
+
+
+#define FF_USE_FASTSEEK	1
+/* This option switches fast seek function. (0:Disable or 1:Enable) */
+
+
+#define FF_USE_EXPAND	0
+/* This option switches f_expand function. (0:Disable or 1:Enable) */
+
+
+#define FF_USE_CHMOD	1
+/*  This option switches attribute manipulation functions, f_chmod() and f_utime().
+    /  (0:Disable or 1:Enable) Also FF_FS_READONLY needs to be 0 to enable this option. */
+
+
+#define FF_USE_LABEL	1
+/*  This option switches volume label functions, f_getlabel() and f_setlabel().
+    /  (0:Disable or 1:Enable) */
+
+
+#define FF_USE_FORWARD	0
+/* This option switches f_forward() function. (0:Disable or 1:Enable) */
+
+
+#define FF_USE_STRFUNC	0
+#define FF_PRINT_LLI	1
+#define FF_PRINT_FLOAT	1
+#define FF_STRF_ENCODE	3
+/*  FF_USE_STRFUNC switches string functions, f_gets(), f_putc(), f_puts() and
+    /  f_printf().
+    /
+    /   0: Disable. FF_PRINT_LLI, FF_PRINT_FLOAT and FF_STRF_ENCODE have no effect.
+    /   1: Enable without LF-CRLF conversion.
+    /   2: Enable with LF-CRLF conversion.
+    /
+    /  FF_PRINT_LLI = 1 makes f_printf() support long long argument and FF_PRINT_FLOAT = 1/2
+    /  makes f_printf() support floating point argument. These features want C99 or later.
+    /  When FF_LFN_UNICODE >= 1 with LFN enabled, string functions convert the character
+    /  encoding in it. FF_STRF_ENCODE selects assumption of character encoding ON THE FILE
+    /  to be read/written via those functions.
+    /
+    /   0: ANSI/OEM in current CP
+    /   1: Unicode in UTF-16LE
+    /   2: Unicode in UTF-16BE
+    /   3: Unicode in UTF-8
+*/
+
+
+/*  ---------------------------------------------------------------------------/
+    / Locale and Namespace Configurations
+    /---------------------------------------------------------------------------*/
+
+#define FF_CODE_PAGE	437
+/*  This option specifies the OEM code page to be used on the target system.
+    /  Incorrect code page setting can cause a file open failure.
+    /
+    /   437 - U.S.
+    /   720 - Arabic
+    /   737 - Greek
+    /   771 - KBL
+    /   775 - Baltic
+    /   850 - Latin 1
+    /   852 - Latin 2
+    /   855 - Cyrillic
+    /   857 - Turkish
+    /   860 - Portuguese
+    /   861 - Icelandic
+    /   862 - Hebrew
+    /   863 - Canadian French
+    /   864 - Arabic
+    /   865 - Nordic
+    /   866 - Russian
+    /   869 - Greek 2
+    /   932 - Japanese (DBCS)
+    /   936 - Simplified Chinese (DBCS)
+    /   949 - Korean (DBCS)
+    /   950 - Traditional Chinese (DBCS)
+    /     0 - Include all code pages above and configured by f_setcp()
+*/
+
+
+#define FF_USE_LFN		1
+#define FF_MAX_LFN		64
+/*  The FF_USE_LFN switches the support for LFN (long file name).
+    /
+    /   0: Disable LFN. FF_MAX_LFN has no effect.
+    /   1: Enable LFN with static  working buffer on the BSS. Always NOT thread-safe.
+    /   2: Enable LFN with dynamic working buffer on the STACK.
+    /   3: Enable LFN with dynamic working buffer on the HEAP.
+    /
+    /  To enable the LFN, ffunicode.c needs to be added to the project. The LFN function
+    /  requiers certain internal working buffer occupies (FF_MAX_LFN + 1) * 2 bytes and
+    /  additional (FF_MAX_LFN + 44) / 15 * 32 bytes when exFAT is enabled.
+    /  The FF_MAX_LFN defines size of the working buffer in UTF-16 code unit and it can
+    /  be in range of 12 to 255. It is recommended to be set it 255 to fully support LFN
+    /  specification.
+    /  When use stack for the working buffer, take care on stack overflow. When use heap
+    /  memory for the working buffer, memory management functions, ff_memalloc() and
+    /  ff_memfree() exemplified in ffsystem.c, need to be added to the project. */
+
+
+#define FF_LFN_UNICODE	0
+/*  This option switches the character encoding on the API when LFN is enabled.
+    /
+    /   0: ANSI/OEM in current CP (TCHAR = char)
+    /   1: Unicode in UTF-16 (TCHAR = WCHAR)
+    /   2: Unicode in UTF-8 (TCHAR = char)
+    /   3: Unicode in UTF-32 (TCHAR = DWORD)
+    /
+    /  Also behavior of string I/O functions will be affected by this option.
+    /  When LFN is not enabled, this option has no effect. */
+
+
+#define FF_LFN_BUF		64
+#define FF_SFN_BUF		12
+/*  This set of options defines size of file name members in the FILINFO structure
+    /  which is used to read out directory items. These values should be suffcient for
+    /  the file names to read. The maximum possible length of the read file name depends
+    /  on character encoding. When LFN is not enabled, these options have no effect. */
+
+
+#define FF_FS_RPATH		0
+/*  This option configures support for relative path.
+    /
+    /   0: Disable relative path and remove related functions.
+    /   1: Enable relative path. f_chdir() and f_chdrive() are available.
+    /   2: f_getcwd() function is available in addition to 1.
+*/
+
+
+/*  ---------------------------------------------------------------------------/
+    / Drive/Volume Configurations
+    /---------------------------------------------------------------------------*/
+
+#define FF_VOLUMES		1
+/* Number of volumes (logical drives) to be used. (1-10) */
+
+
+#define FF_STR_VOLUME_ID	0
+#define FF_VOLUME_STRS		"FLASH"
+/*  FF_STR_VOLUME_ID switches support for volume ID in arbitrary strings.
+    /  When FF_STR_VOLUME_ID is set to 1 or 2, arbitrary strings can be used as drive
+    /  number in the path name. FF_VOLUME_STRS defines the volume ID strings for each
+    /  logical drives. Number of items must not be less than FF_VOLUMES. Valid
+    /  characters for the volume ID strings are A-Z, a-z and 0-9, however, they are
+    /  compared in case-insensitive. If FF_STR_VOLUME_ID >= 1 and FF_VOLUME_STRS is
+    /  not defined, a user defined volume string table is needed as:
+    /
+    /  const char* VolumeStr[FF_VOLUMES] = {"ram","flash","sd","usb",...
+*/
+
+
+#define FF_MULTI_PARTITION	0
+/*  This option switches support for multiple volumes on the physical drive.
+    /  By default (0), each logical drive number is bound to the same physical drive
+    /  number and only an FAT volume found on the physical drive will be mounted.
+    /  When this function is enabled (1), each logical drive number can be bound to
+    /  arbitrary physical drive and partition listed in the VolToPart[]. Also f_fdisk()
+    /  function will be available. */
+
+
+#define FF_MIN_SS		512
+#define FF_MAX_SS		4096
+/*  This set of options configures the range of sector size to be supported. (512,
+    /  1024, 2048 or 4096) Always set both 512 for most systems, generic memory card and
+    /  harddisk, but a larger value may be required for on-board flash memory and some
+    /  type of optical media. When FF_MAX_SS is larger than FF_MIN_SS, FatFs is configured
+    /  for variable sector size mode and disk_ioctl() function needs to implement
+    /  GET_SECTOR_SIZE command. */
+
+
+#define FF_LBA64		0
+/*  This option switches support for 64-bit LBA. (0:Disable or 1:Enable)
+    /  To enable the 64-bit LBA, also exFAT needs to be enabled. (FF_FS_EXFAT == 1) */
+
+
+#define FF_MIN_GPT		0x10000000
+/*  Minimum number of sectors to switch GPT as partitioning format in f_mkfs and
+    /  f_fdisk function. 0x100000000 max. This option has no effect when FF_LBA64 == 0. */
+
+
+#define FF_USE_TRIM		1
+/*  This option switches support for ATA-TRIM. (0:Disable or 1:Enable)
+    /  To enable Trim function, also CTRL_TRIM command should be implemented to the
+    /  disk_ioctl() function. */
+
+
+
+/*  ---------------------------------------------------------------------------/
+    / System Configurations
+    /---------------------------------------------------------------------------*/
+
+#define FF_FS_TINY		0
+/*  This option switches tiny buffer configuration. (0:Normal or 1:Tiny)
+    /  At the tiny configuration, size of file object (FIL) is shrinked FF_MAX_SS bytes.
+    /  Instead of private sector buffer eliminated from the file object, common sector
+    /  buffer in the filesystem object (FATFS) is used for the file data transfer. */
+
+
+#define FF_FS_EXFAT		0
+/*  This option switches support for exFAT filesystem. (0:Disable or 1:Enable)
+    /  To enable exFAT, also LFN needs to be enabled. (FF_USE_LFN >= 1)
+    /  Note that enabling exFAT discards ANSI C (C89) compatibility. */
+
+
+#define FF_FS_NORTC		0
+#define FF_NORTC_MON	1
+#define FF_NORTC_MDAY	1
+#define FF_NORTC_YEAR	2022
+/*  The option FF_FS_NORTC switches timestamp feature. If the system does not have
+    /  an RTC or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable the
+    /  timestamp feature. Every object modified by FatFs will have a fixed timestamp
+    /  defined by FF_NORTC_MON, FF_NORTC_MDAY and FF_NORTC_YEAR in local time.
+    /  To enable timestamp function (FF_FS_NORTC = 0), get_fattime() function need to be
+    /  added to the project to read current time form real-time clock. FF_NORTC_MON,
+    /  FF_NORTC_MDAY and FF_NORTC_YEAR have no effect.
+    /  These options have no effect in read-only configuration (FF_FS_READONLY = 1). */
+
+
+#define FF_FS_NOFSINFO	0
+/*  If you need to know correct free space on the FAT32 volume, set bit 0 of this
+    /  option, and f_getfree() function at the first time after volume mount will force
+    /  a full FAT scan. Bit 1 controls the use of last allocated cluster number.
+    /
+    /  bit0=0: Use free cluster count in the FSINFO if available.
+    /  bit0=1: Do not trust free cluster count in the FSINFO.
+    /  bit1=0: Use last allocated cluster number in the FSINFO if available.
+    /  bit1=1: Do not trust last allocated cluster number in the FSINFO.
+*/
+
+
+#define FF_FS_LOCK		0
+/*  The option FF_FS_LOCK switches file lock function to control duplicated file open
+    /  and illegal operation to open objects. This option must be 0 when FF_FS_READONLY
+    /  is 1.
+    /
+    /  0:  Disable file lock function. To avoid volume corruption, application program
+    /      should avoid illegal open, remove and rename to the open objects.
+    /  >0: Enable file lock function. The value defines how many files/sub-directories
+    /      can be opened simultaneously under file lock control. Note that the file
+    /      lock control is independent of re-entrancy. */
+
+
+#define FF_FS_REENTRANT	0
+#define FF_FS_TIMEOUT	1000
+/*  The option FF_FS_REENTRANT switches the re-entrancy (thread safe) of the FatFs
+    /  module itself. Note that regardless of this option, file access to different
+    /  volume is always re-entrant and volume control functions, f_mount(), f_mkfs()
+    /  and f_fdisk() function, are always not re-entrant. Only file/directory access
+    /  to the same volume is under control of this featuer.
+    /
+    /   0: Disable re-entrancy. FF_FS_TIMEOUT have no effect.
+    /   1: Enable re-entrancy. Also user provided synchronization handlers,
+    /      ff_mutex_create(), ff_mutex_delete(), ff_mutex_take() and ff_mutex_give()
+    /      function, must be added to the project. Samples are available in ffsystem.c.
+    /
+    /  The FF_FS_TIMEOUT defines timeout period in unit of O/S time tick.
+*/
+
+
+
+/*--- End of configuration options ---*/

libraries/FatFS/src/ffsystem.cpp

@@ -0,0 +1,202 @@
+/*------------------------------------------------------------------------*/
+/* A Sample Code of User Provided OS Dependent Functions for FatFs        */
+/*------------------------------------------------------------------------*/
+
+#include "ff.h"
+
+
+#if FF_USE_LFN == 3	/* Use dynamic memory allocation */
+
+/*------------------------------------------------------------------------*/
+/* Allocate/Free a Memory Block                                           */
+/*------------------------------------------------------------------------*/
+
+#include <stdlib.h>		/* with POSIX API */
+
+
+void* ff_memalloc(  /* Returns pointer to the allocated memory block (null if not enough core) */
+    UINT msize		/* Number of bytes to allocate */
+) {
+    return malloc((size_t)msize);	/* Allocate a new memory block */
+}
+
+
+void ff_memfree(
+    void* mblock	/* Pointer to the memory block to free (no effect if null) */
+) {
+    free(mblock);	/* Free the memory block */
+}
+
+#endif
+
+
+
+
+#if FF_FS_REENTRANT	/* Mutal exclusion */
+/*------------------------------------------------------------------------*/
+/* Definitions of Mutex                                                   */
+/*------------------------------------------------------------------------*/
+
+#define OS_TYPE	0	/* 0:Win32, 1:uITRON4.0, 2:uC/OS-II, 3:FreeRTOS, 4:CMSIS-RTOS */
+
+
+#if   OS_TYPE == 0	/* Win32 */
+#include <windows.h>
+static HANDLE Mutex[FF_VOLUMES + 1];	/* Table of mutex handle */
+
+#elif OS_TYPE == 1	/* uITRON */
+#include "itron.h"
+#include "kernel.h"
+static mtxid Mutex[FF_VOLUMES + 1];		/* Table of mutex ID */
+
+#elif OS_TYPE == 2	/* uc/OS-II */
+#include "includes.h"
+static OS_EVENT *Mutex[FF_VOLUMES + 1];	/* Table of mutex pinter */
+
+#elif OS_TYPE == 3	/* FreeRTOS */
+#include "FreeRTOS.h"
+#include "semphr.h"
+static SemaphoreHandle_t Mutex[FF_VOLUMES + 1];	/* Table of mutex handle */
+
+#elif OS_TYPE == 4	/* CMSIS-RTOS */
+#include "cmsis_os.h"
+static osMutexId Mutex[FF_VOLUMES + 1];	/* Table of mutex ID */
+
+#endif
+
+
+
+/*------------------------------------------------------------------------*/
+/* Create a Mutex                                                         */
+/*------------------------------------------------------------------------*/
+/*  This function is called in f_mount function to create a new mutex
+    /  or semaphore for the volume. When a 0 is returned, the f_mount function
+    /  fails with FR_INT_ERR.
+*/
+
+int ff_mutex_create(  /* Returns 1:Function succeeded or 0:Could not create the mutex */
+    int vol				/* Mutex ID: Volume mutex (0 to FF_VOLUMES - 1) or system mutex (FF_VOLUMES) */
+) {
+#if OS_TYPE == 0	/* Win32 */
+    Mutex[vol] = CreateMutex(NULL, FALSE, NULL);
+    return (int)(Mutex[vol] != INVALID_HANDLE_VALUE);
+
+#elif OS_TYPE == 1	/* uITRON */
+    T_CMTX cmtx = {TA_TPRI, 1};
+
+    Mutex[vol] = acre_mtx(&cmtx);
+    return (int)(Mutex[vol] > 0);
+
+#elif OS_TYPE == 2	/* uC/OS-II */
+    OS_ERR err;
+
+    Mutex[vol] = OSMutexCreate(0, &err);
+    return (int)(err == OS_NO_ERR);
+
+#elif OS_TYPE == 3	/* FreeRTOS */
+    Mutex[vol] = xSemaphoreCreateMutex();
+    return (int)(Mutex[vol] != NULL);
+
+#elif OS_TYPE == 4	/* CMSIS-RTOS */
+    osMutexDef(cmsis_os_mutex);
+
+    Mutex[vol] = osMutexCreate(osMutex(cmsis_os_mutex));
+    return (int)(Mutex[vol] != NULL);
+
+#endif
+}
+
+
+/*------------------------------------------------------------------------*/
+/* Delete a Mutex                                                         */
+/*------------------------------------------------------------------------*/
+/*  This function is called in f_mount function to delete a mutex or
+    /  semaphore of the volume created with ff_mutex_create function.
+*/
+
+void ff_mutex_delete(  /* Returns 1:Function succeeded or 0:Could not delete due to an error */
+    int vol				/* Mutex ID: Volume mutex (0 to FF_VOLUMES - 1) or system mutex (FF_VOLUMES) */
+) {
+#if OS_TYPE == 0	/* Win32 */
+    CloseHandle(Mutex[vol]);
+
+#elif OS_TYPE == 1	/* uITRON */
+    del_mtx(Mutex[vol]);
+
+#elif OS_TYPE == 2	/* uC/OS-II */
+    OS_ERR err;
+
+    OSMutexDel(Mutex[vol], OS_DEL_ALWAYS, &err);
+
+#elif OS_TYPE == 3	/* FreeRTOS */
+    vSemaphoreDelete(Mutex[vol]);
+
+#elif OS_TYPE == 4	/* CMSIS-RTOS */
+    osMutexDelete(Mutex[vol]);
+
+#endif
+}
+
+
+/*------------------------------------------------------------------------*/
+/* Request a Grant to Access the Volume                                   */
+/*------------------------------------------------------------------------*/
+/*  This function is called on enter file functions to lock the volume.
+    /  When a 0 is returned, the file function fails with FR_TIMEOUT.
+*/
+
+int ff_mutex_take(  /* Returns 1:Succeeded or 0:Timeout */
+    int vol			/* Mutex ID: Volume mutex (0 to FF_VOLUMES - 1) or system mutex (FF_VOLUMES) */
+) {
+#if OS_TYPE == 0	/* Win32 */
+    return (int)(WaitForSingleObject(Mutex[vol], FF_FS_TIMEOUT) == WAIT_OBJECT_0);
+
+#elif OS_TYPE == 1	/* uITRON */
+    return (int)(tloc_mtx(Mutex[vol], FF_FS_TIMEOUT) == E_OK);
+
+#elif OS_TYPE == 2	/* uC/OS-II */
+    OS_ERR err;
+
+    OSMutexPend(Mutex[vol], FF_FS_TIMEOUT, &err));
+    return (int)(err == OS_NO_ERR);
+
+#elif OS_TYPE == 3	/* FreeRTOS */
+    return (int)(xSemaphoreTake(Mutex[vol], FF_FS_TIMEOUT) == pdTRUE);
+
+#elif OS_TYPE == 4	/* CMSIS-RTOS */
+    return (int)(osMutexWait(Mutex[vol], FF_FS_TIMEOUT) == osOK);
+
+#endif
+}
+
+
+
+/*------------------------------------------------------------------------*/
+/* Release a Grant to Access the Volume                                   */
+/*------------------------------------------------------------------------*/
+/*  This function is called on leave file functions to unlock the volume.
+*/
+
+void ff_mutex_give(
+    int vol			/* Mutex ID: Volume mutex (0 to FF_VOLUMES - 1) or system mutex (FF_VOLUMES) */
+) {
+#if OS_TYPE == 0	/* Win32 */
+    ReleaseMutex(Mutex[vol]);
+
+#elif OS_TYPE == 1	/* uITRON */
+    unl_mtx(Mutex[vol]);
+
+#elif OS_TYPE == 2	/* uC/OS-II */
+    OSMutexPost(Mutex[vol]);
+
+#elif OS_TYPE == 3	/* FreeRTOS */
+    xSemaphoreGive(Mutex[vol]);
+
+#elif OS_TYPE == 4	/* CMSIS-RTOS */
+    osMutexRelease(Mutex[vol]);
+
+#endif
+}
+
+#endif	/* FF_FS_REENTRANT */
+

libraries/FatFSUSB/examples/Listfiles-USB/Listfiles-USB.ino

@@ -0,0 +1,95 @@
+// FatFS + FatFSUSB listFiles example
+
+#include <FatFS.h>
+#include <FatFSUSB.h>
+
+volatile bool updated = false;
+volatile bool driveConnected = false;
+volatile bool inPrinting = false;
+
+// Called by FatFSUSB when the drive is released.  We note this, restart FatFS, and tell the main loop to rescan.
+void unplug(uint32_t i) {
+  (void) i;
+  driveConnected = false;
+  updated = true;
+  FatFS.begin();
+}
+
+// Called by FatFSUSB when the drive is mounted by the PC.  Have to stop FatFS, since the drive data can change, note it, and continue.
+void plug(uint32_t i) {
+  (void) i;
+  driveConnected = true;
+  FatFS.end();
+}
+
+// Called by FatFSUSB to determine if it is safe to let the PC mount the USB drive.  If we're accessing the FS in any way, have any Files open, etc. then it's not safe to let the PC mount the drive.
+bool mountable(uint32_t i) {
+  (void) i;
+  return !inPrinting;
+}
+
+void setup() {
+  Serial.begin(115200);
+  while (!Serial) {
+    delay(1);
+  }
+  delay(5000);
+
+  if (!FatFS.begin()) {
+    Serial.println("FatFS initialization failed!");
+    while (1) {
+      delay(1);
+    }
+  }
+  Serial.println("FatFS initialization done.");
+
+  inPrinting = true;
+  printDirectory("/", 0);
+  inPrinting = false;
+
+  // Set up callbacks
+  FatFSUSB.onUnplug(unplug);
+  FatFSUSB.onPlug(plug);
+  FatFSUSB.driveReady(mountable);
+  // Start FatFS USB drive mode
+  FatFSUSB.begin();
+  Serial.println("FatFSUSB started.");
+  Serial.println("Connect drive via USB to upload/erase files and re-display");
+}
+
+void loop() {
+  if (updated && !driveConnected) {
+    inPrinting = true;
+    Serial.println("\n\nDisconnected, new file listing:");
+    printDirectory("/", 0);
+    updated = false;
+    inPrinting = false;
+  }
+}
+
+void printDirectory(String dirName, int numTabs) {
+  Dir dir = FatFS.openDir(dirName);
+
+  while (true) {
+
+    if (!dir.next()) {
+      // no more files
+      break;
+    }
+    for (uint8_t i = 0; i < numTabs; i++) {
+      Serial.print('\t');
+    }
+    Serial.print(dir.fileName());
+    if (dir.isDirectory()) {
+      Serial.println("/");
+      printDirectory(dirName + "/" + dir.fileName(), numTabs + 1);
+    } else {
+      // files have sizes, directories do not
+      Serial.print("\t\t");
+      Serial.print(dir.fileSize(), DEC);
+      time_t cr = dir.fileCreationTime();
+      struct tm* tmstruct = localtime(&cr);
+      Serial.printf("\t%d-%02d-%02d %02d:%02d:%02d\n", (tmstruct->tm_year) + 1900, (tmstruct->tm_mon) + 1, tmstruct->tm_mday, tmstruct->tm_hour, tmstruct->tm_min, tmstruct->tm_sec);
+    }
+  }
+}

libraries/FatFSUSB/keywords.txt

@@ -0,0 +1,21 @@
+#######################################
+# Syntax Coloring Map
+#######################################
+
+#######################################
+# Datatypes (KEYWORD1)
+#######################################
+
+FatFSUSB	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+driveReady KEYWORD1
+onPlug  KEYWORD1
+onUnplug        KEYWORD1
+
+#######################################
+# Constants (LITERAL1)
+#######################################

libraries/FatFSUSB/library.properties

@@ -0,0 +1,11 @@
+name=FatFSUSB
+version=1.0.0
+author=Earle F. Philhower, III <earlephilhower@yahoo.com>
+maintainer=Earle F. Philhower, III <earlephilhower@yahoo.com>
+sentence=Allows using USB MSC (USB stick) to transfer an onboard flash file to a PC
+paragraph=Emulates a USB stick and presents a single file for users to copy over/erase
+category=Device Control
+url=https://github.com/earlephilhower/arduino-pico
+architectures=rp2040
+dot_a_linkage=true
+depends=FatFS

libraries/FatFSUSB/src/FatFSUSB.cpp

@@ -0,0 +1,284 @@
+/*
+    FatFSUSB - Export onboard FatFS/FTL to host for data movement
+    Copyright (c) 2024 Earle F. Philhower, III.  All rights reserved.
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+    You should have received a copy of the GNU Lesser General Public
+    License along with this library; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include "FatFSUSB.h"
+#include <FatFS.h>
+#include <class/msc/msc.h>
+
+FatFSUSBClass FatFSUSB;
+
+// Ensure we are logged in to the USB framework
+void __USBInstallMassStorage() {
+    /* dummy */
+}
+
+FatFSUSBClass::FatFSUSBClass() {
+}
+
+FatFSUSBClass::~FatFSUSBClass() {
+    end();
+}
+
+void FatFSUSBClass::onPlug(void (*cb)(uint32_t), uint32_t cbData) {
+    _cbPlug = cb;
+    _cbPlugData = cbData;
+}
+
+void FatFSUSBClass::onUnplug(void (*cb)(uint32_t), uint32_t cbData) {
+    _cbUnplug = cb;
+    _cbUnplugData = cbData;
+}
+
+void FatFSUSBClass::driveReady(bool (*cb)(uint32_t), uint32_t cbData) {
+    _driveReady = cb;
+    _driveReadyData = cbData;
+}
+
+bool FatFSUSBClass::begin() {
+    if (_started) {
+        return false;
+    }
+    _started = true;
+    fatfs::disk_initialize(0);
+    fatfs::WORD ss;
+    fatfs::disk_ioctl(0, GET_SECTOR_SIZE, &ss);
+    _sectSize = ss;
+    _sectBuff = new uint8_t[_sectSize];
+    _sectNum = -1;
+    return true;
+}
+
+void FatFSUSBClass::end() {
+    if (_started) {
+        _started = false;
+        delete[] _sectBuff;
+    }
+}
+
+// Invoked to determine max LUN
+extern "C" uint8_t tud_msc_get_maxlun_cb(void) {
+    return 1;
+}
+
+// Invoked when received SCSI_CMD_INQUIRY
+// Application fill vendor id, product id and revision with string up to 8, 16, 4 characters respectively
+extern "C" void tud_msc_inquiry_cb(uint8_t lun, uint8_t vendor_id[8], uint8_t product_id[16], uint8_t product_rev[4]) {
+    (void) lun;
+
+    const char vid[] = "PicoDisk";
+    const char pid[] = "Mass Storage";
+    const char rev[] = "1.0";
+
+    memcpy(vendor_id, vid, strlen(vid));
+    memcpy(product_id, pid, strlen(pid));
+    memcpy(product_rev, rev, strlen(rev));
+}
+
+bool FatFSUSBClass::testUnitReady() {
+    bool ret = _started;
+    if (_driveReady) {
+        ret &= _driveReady(_driveReadyData);
+    }
+    return ret;
+}
+
+// Invoked when received Test Unit Ready command.
+// return true allowing host to read/write this LUN e.g SD card inserted
+extern "C" bool tud_msc_test_unit_ready_cb(uint8_t lun) {
+    (void) lun;
+
+    return FatFSUSB.testUnitReady();
+}
+
+// Invoked when received SCSI_CMD_READ_CAPACITY_10 and SCSI_CMD_READ_FORMAT_CAPACITY to determine the disk size
+// Application update block count and block size
+extern "C" void tud_msc_capacity_cb(uint8_t lun, uint32_t* block_count, uint16_t* block_size) {
+    (void) lun;
+    fatfs::LBA_t p;
+    fatfs::disk_ioctl(0, GET_SECTOR_COUNT, &p);
+    *block_count = p;
+    fatfs::WORD ss;
+    fatfs::disk_ioctl(0, GET_SECTOR_SIZE, &ss);
+    *block_size  = ss;
+}
+
+
+// Callback invoked when received READ10 command.
+// Copy disk's data to buffer (up to bufsize) and return number of copied bytes.
+extern "C" int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buffer, uint32_t bufsize) {
+    (void) lun;
+    return FatFSUSB.read10(lba, offset, buffer, bufsize);
+}
+
+int32_t FatFSUSBClass::read10(uint32_t lba, uint32_t offset, void* buffer, uint32_t bufsize) {
+    fatfs::LBA_t _hddsects;
+    fatfs::disk_ioctl(0, GET_SECTOR_COUNT, &_hddsects);
+
+    if (!_started || (lba >= _hddsects)) {
+        return -1;
+    }
+
+    assert(offset + bufsize <= _sectSize);
+
+    if (_sectNum >= 0) {
+        // Flush the temp data out, we need to use the space
+        fatfs::disk_write(0, _sectBuff, _sectNum, 1);
+        _sectNum = -1;
+    }
+    fatfs::disk_read(0, _sectBuff, lba, 1);
+    memcpy(buffer, _sectBuff + offset, bufsize);
+    return bufsize;
+}
+
+extern "C" bool tud_msc_is_writable_cb(uint8_t lun) {
+    (void) lun;
+
+    return true;
+}
+
+// Callback invoked when received WRITE10 command.
+// Process data in buffer to disk's storage and return number of written bytes
+extern "C" int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize) {
+    (void) lun;
+    return FatFSUSB.write10(lba, offset, buffer, bufsize);
+}
+
+int32_t FatFSUSBClass::write10(uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize) {
+    fatfs::LBA_t _hddsects;
+    fatfs::disk_ioctl(0, GET_SECTOR_COUNT, &_hddsects);
+
+    if (!_started || (lba >= _hddsects)) {
+        return -1;
+    }
+
+    assert(offset + bufsize <= _sectSize);
+
+    if ((offset == 0) && (bufsize == _sectSize)) {
+        fatfs::disk_write(0, buffer, lba, 1);
+        return _sectSize;
+    }
+
+    if ((int)_sectNum == (int)lba) {
+        memcpy(_sectBuff + offset, buffer, bufsize);
+    } else {
+        if (_sectNum >= 0) {
+            // Need to flush old sector out
+            fatfs::disk_write(0, _sectBuff, _sectNum, 1);
+        }
+        fatfs::disk_read(0, _sectBuff, lba, 1);
+        memcpy(_sectBuff + offset, buffer, bufsize);
+        _sectNum = lba;
+    }
+
+    if (offset + bufsize >= _sectSize) {
+        // We've filled up a sector, write it out!
+        fatfs::disk_write(0, _sectBuff, lba, 1);
+        _sectNum = -1;
+    }
+    return bufsize;
+}
+
+extern "C" bool tud_msc_set_sense(uint8_t lun, uint8_t sense_key, uint8_t add_sense_code, uint8_t add_sense_qualifier);
+
+// Callback invoked when received an SCSI command not in built-in list below
+// - READ_CAPACITY10, READ_FORMAT_CAPACITY, INQUIRY, MODE_SENSE6, REQUEST_SENSE
+// - READ10 and WRITE10 has their own callbacks
+extern "C" int32_t tud_msc_scsi_cb(uint8_t lun, uint8_t const scsi_cmd[16], void* buffer, uint16_t bufsize) {
+    const int SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL = 0x1E;
+    const int SCSI_CMD_START_STOP_UNIT              = 0x1B;
+    const int SCSI_SENSE_ILLEGAL_REQUEST = 0x05;
+
+    void const* response = NULL;
+    int32_t resplen = 0;
+
+    // most scsi handled is input
+    bool in_xfer = true;
+    scsi_start_stop_unit_t const * start_stop = (scsi_start_stop_unit_t const *) scsi_cmd;
+    switch (scsi_cmd[0]) {
+    case SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
+        // Host is about to read/write etc ... better not to disconnect disk
+        if (scsi_cmd[4] & 1) {
+            FatFSUSB.plug();
+        }
+        resplen = 0;
+        break;
+    case SCSI_CMD_START_STOP_UNIT:
+        // Host try to eject/safe remove/poweroff us. We could safely disconnect with disk storage, or go into lower power
+        if (!start_stop->start && start_stop->load_eject) {
+            FatFSUSB.unplug();
+        } else if (start_stop->start && start_stop->load_eject) {
+            FatFSUSB.plug();
+        }
+        resplen = 0;
+        break;
+    default:
+        // Set Sense = Invalid Command Operation
+        tud_msc_set_sense(lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
+        // negative means error -> tinyusb could stall and/or response with failed status
+        resplen = -1;
+        break;
+    }
+
+    // return resplen must not larger than bufsize
+    if (resplen > bufsize) {
+        resplen = bufsize;
+    }
+
+    if (response && (resplen > 0)) {
+        if (in_xfer) {
+            memcpy(buffer, response, resplen);
+        } else {
+            // SCSI output
+        }
+    }
+
+    return resplen;
+}
+
+void FatFSUSBClass::plug() {
+    if (_started && _cbPlug) {
+        _cbPlug(_cbPlugData);
+    }
+}
+
+void FatFSUSBClass::unplug() {
+    if (_started) {
+        if (_sectNum >= 0) {
+            // Flush the temp data out
+            fatfs::disk_write(0, _sectBuff, _sectNum, 1);
+            _sectNum = -1;
+        }
+        fatfs::disk_ioctl(0, CTRL_SYNC, nullptr);
+        if (_cbUnplug) {
+            _cbUnplug(_cbUnplugData);
+        }
+    }
+}
+
+// Callback invoked on start/stop
+extern "C" bool tud_msc_start_stop_cb(uint8_t lun, uint8_t power_condition, bool start, bool load_eject) {
+    (void) lun;
+    (void) power_condition;
+    if (start && load_eject) {
+        FatFSUSB.plug();
+    } else if (!start && load_eject) {
+        FatFSUSB.unplug();
+    }
+    return true;
+}

libraries/FatFSUSB/src/FatFSUSB.h

@@ -0,0 +1,60 @@
+/*
+    FatFSUSB - Export onboard FatFS/FTL to host for data movement
+    Copyright (c) 2024 Earle F. Philhower, III.  All rights reserved.
+
+    This library is free software; you can redistribute it and/or
+    modify it under the terms of the GNU Lesser General Public
+    License as published by the Free Software Foundation; either
+    version 2.1 of the License, or (at your option) any later version.
+
+    This library is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    Lesser General Public License for more details.
+
+    You should have received a copy of the GNU Lesser General Public
+    License along with this library; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#pragma once
+
+#include <Arduino.h>
+
+class FatFSUSBClass {
+public:
+    FatFSUSBClass();
+    ~FatFSUSBClass();
+
+    bool begin();
+    void end();
+
+    void driveReady(bool (*cb)(uint32_t), uint32_t cbData = 0);
+    void onPlug(void (*cb)(uint32_t), uint32_t cbData = 0);
+    void onUnplug(void (*cb)(uint32_t), uint32_t cbData = 0);
+
+    // Only for internal TinyUSB callback use
+    bool testUnitReady();
+    int32_t read10(uint32_t lba, uint32_t offset, void* buffer, uint32_t bufsize);
+    int32_t write10(uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize);
+    void plug();;
+    void unplug();
+
+private:
+    bool _started = false;
+
+    int32_t _sectNum = -1;
+    uint8_t *_sectBuff = nullptr;
+    uint16_t _sectSize = 0;
+
+    void (*_cbPlug)(uint32_t) = nullptr;
+    uint32_t _cbPlugData = 0;
+
+    void (*_cbUnplug)(uint32_t) = nullptr;
+    uint32_t _cbUnplugData = 0;
+
+    bool (*_driveReady)(uint32_t) = nullptr;
+    uint32_t _driveReadyData = 0;
+};
+
+extern FatFSUSBClass FatFSUSB;

libraries/I2S/src/pio_i2s.pio

@@ -294,6 +294,9 @@ static inline void pio_i2s_in_program_init(PIO pio, uint sm, uint offset, uint d
     pio_sm_set_pins(pio, sm, 0); // clear pins
 
     pio_sm_exec(pio, sm, pio_encode_set(pio_y, bits - 2));
+
+    pio_sm_exec(pio, sm, pio_encode_in(pio_pins, bits)); // Shift in 1st L data
+    pio_sm_exec(pio, sm, pio_encode_in(pio_pins, bits - 1)); // Shift in 1st R data modulo one bit, avoiding bit shift from #2037
 }
 
 %}

libraries/I2S/src/pio_i2s.pio.h

@@ -378,6 +378,8 @@ static inline void pio_i2s_in_program_init(PIO pio, uint sm, uint offset, uint d
     pio_sm_set_pindirs_with_mask(pio, sm, pin_mask, pin_mask);
     pio_sm_set_pins(pio, sm, 0); // clear pins
     pio_sm_exec(pio, sm, pio_encode_set(pio_y, bits - 2));
+    pio_sm_exec(pio, sm, pio_encode_in(pio_pins, bits)); // Shift in 1st L data
+    pio_sm_exec(pio, sm, pio_encode_in(pio_pins, bits - 1)); // Shift in 1st R data modulo one bit, avoiding bit shift from #2037
 }
 
 #endif

libraries/LittleFS/src/LittleFS.h

@@ -157,6 +157,14 @@ public:
             return false;
         }
         int rc = lfs_mkdir(&_lfs, path);
+        if ((rc == 0) && _timeCallback) {
+            time_t now = _timeCallback();
+            // Add metadata with creation time to the directory marker
+            int rc = lfs_setattr(&_lfs, path, 'c', (const void *)&now, sizeof(now));
+            if (rc < 0) {
+                DEBUGV("Unable to set creation time on '%s' to %ld\n", path, (long)now);
+            }
+        }
         return (rc == 0);
     }
 

libraries/PDM/src/PDM.h

@@ -25,9 +25,11 @@
 
 class PDMClass {
 public:
-    PDMClass(int dinPin, int clkPin, int pwrPin);
+    PDMClass(int dinPin, int clkPin);
     virtual ~PDMClass();
 
+    void setDIN(int dinPin);
+    void setCLK(int clkPin);
     int begin(int channels, int sampleRate);
     void end();
 
@@ -49,7 +51,6 @@ public:
 private:
     int _dinPin;
     int _clkPin;
-    int _pwrPin;
 
     int _channels;
     int _samplerate;
@@ -70,6 +71,4 @@ private:
     void (*_onReceive)(void);
 };
 
-#ifdef PIN_PDM_DIN
 extern PDMClass PDM;
-#endif

libraries/PDM/src/rp2040/PDM.cpp

@@ -36,10 +36,9 @@ extern "C" {
 }
 
 
-PDMClass::PDMClass(int dinPin, int clkPin, int pwrPin) :
+PDMClass::PDMClass(int dinPin, int clkPin) :
     _dinPin(dinPin),
     _clkPin(clkPin),
-    _pwrPin(pwrPin),
     _onReceive(NULL),
     _gain(-1),
     _channels(-1),
@@ -55,6 +54,14 @@ PDMClass::PDMClass(int dinPin, int clkPin, int pwrPin) :
 PDMClass::~PDMClass() {
 }
 
+void PDMClass::setCLK(int clkPin) {
+    _clkPin = clkPin;
+}
+
+void PDMClass::setDIN(int dinPin) {
+    _dinPin = dinPin;
+}
+
 int PDMClass::begin(int channels, int sampleRate) {
 
     if (_init == 1) {
@@ -62,6 +69,11 @@ int PDMClass::begin(int channels, int sampleRate) {
         return 0;
     }
 
+    if (_dinPin == -1 || _clkPin == -1) {
+        //ERROR: please call setDIN/setCLK first
+        return 0;
+    }
+
     //_channels = channels; // only one channel available
 
     // clear the final buffers
@@ -228,8 +240,14 @@ void PDMClass::IrqHandler(bool halftranfer) {
         _onReceive();
     }
 }
-#ifdef PIN_PDM_DIN
-PDMClass PDM(PIN_PDM_DIN, PIN_PDM_CLK, -1);
+#ifndef PIN_PDM_DIN
+#define PIN_PDM_DIN -1
 #endif // PIN_PDM_DIN
+//
+#ifndef PIN_PDM_CLK
+#define PIN_PDM_CLK -1
+#endif // PIN_PDM_CLK
+
+PDMClass PDM(PIN_PDM_DIN, PIN_PDM_CLK);
 
 

libraries/SD/src/SD.h

@@ -32,6 +32,7 @@
 class SDClass {
 public:
     bool begin(uint8_t csPin, HardwareSPI &spi) {
+        _spi = &spi;
         SDFS.setConfig(SDFSConfig(csPin, SPI_HALF_SPEED, spi));
         return SDFS.begin();
     }
@@ -43,7 +44,7 @@ public:
     void end(bool endSPI = true) {
         SDFS.end();
         if (endSPI) {
-            SPI.end();
+            _spi->end();
         }
     }
 
@@ -204,6 +205,7 @@ private:
         return time(nullptr);
     }
 
+    HardwareSPI *_spi;
 };
 
 

libraries/SPISlave/src/SPISlave.cpp

@@ -206,7 +206,7 @@ void SPISlaveClass::setData(const uint8_t *data, size_t len) {
 
 
 void SPISlaveClass::begin(SPISettings spis) {
-    DEBUGSPI("SPISlave::begin(%d), rx=%d, cs=%d, sck=%d, tx=%d\n", hwCS, _RX, _CS, _SCK, _TX);
+    DEBUGSPI("SPISlave::begin(), rx=%d, cs=%d, sck=%d, tx=%d\n", _RX, _CS, _SCK, _TX);
     gpio_set_function(_RX, GPIO_FUNC_SPI);
     gpio_set_function(_CS, GPIO_FUNC_SPI);
     gpio_set_function(_SCK, GPIO_FUNC_SPI);

libraries/WiFi/keywords.txt

@@ -9,12 +9,20 @@
 WiFi	KEYWORD1
 WiFiUdp	KEYWORD1
 WiFiClient	KEYWORD1
-WiFiSSLClient	KEYWORD1
+WiFiClientSecure	KEYWORD1
 WiFiServer	KEYWORD1
+WiFiServerSecure	KEYWORD1
 WiFiUDP	KEYWORD1
 WiFiMulti	KEYWORD1
 NTP	KEYWORD1
-
+BearSSL	KEYWORD1
+PublicKey	KEYWORD1
+PrivateKey	KEYWORD1
+X509List	KEYWORD1
+Session	KEYWORD1
+ServerSessions	KEYWORD1
+HashSHA256	KEYWORD1
+SigningVerifier	KEYWORD1
 
 #######################################
 # Methods and Functions (KEYWORD2)
@@ -38,6 +46,7 @@ macAddress	KEYWORD2
 localIP	KEYWORD2
 subnetMask	KEYWORD2
 gatewayIP	KEYWORD2
+scanNetworks	KEYWORD2
 SSID	KEYWORD2
 BSSID		KEYWORD2
 RSSI	KEYWORD2

libraries/WiFi/src/WiFiClass.cpp

@@ -34,6 +34,8 @@
 static CYW43lwIP _wifi(1);
 #elif defined(ESPHOSTSPI)
 static ESPHostLwIP _wifi;
+#elif defined(WINC1501_SPI)
+static WINC1500LwIP _wifi;
 #else
 static NoDriverLwIP _wifi;
 #endif
@@ -67,30 +69,11 @@ void WiFiClass::mode(WiFiMode_t m) {
     }
 }
 
-
-/*  Start WiFi connection for OPEN networks
-
-    param ssid: Pointer to the SSID string.
-*/
-int WiFiClass::begin(const char* ssid) {
-    return begin(ssid, nullptr);
-}
-
-int WiFiClass::beginBSSID(const char* ssid, const uint8_t *bssid) {
-    return begin(ssid, nullptr, bssid);
-}
-
-/*  Start WiFi connection with passphrase
-    the most secure supported mode will be automatically selected
-
-    param ssid: Pointer to the SSID string.
-    param passphrase: Passphrase. Valid characters in a passphrase
-          must be between ASCII 32-126 (decimal).
-*/
-int WiFiClass::begin(const char* ssid, const char *passphrase, const uint8_t *bssid) {
+bool WiFiClass::_beginInternal(const char* ssid, const char *passphrase, const uint8_t *bssid) {
     // Simple ESP8266 compatibility hack
     if (_modeESP == WIFI_AP) {
-        return beginAP(ssid, passphrase);
+        // When beginAP was a success, it returns WL_CONNECTED and we return true as success.
+        return beginAP(ssid, passphrase) == WL_CONNECTED;
     }
 
     end();
@@ -109,19 +92,69 @@ int WiFiClass::begin(const char* ssid, const char *passphrase, const uint8_t *bs
     _wifi.setTimeout(_timeout);
     _apMode = false;
     _wifiHWInitted = true;
-    uint32_t start = millis(); // The timeout starts from network init, not network link up
+
+    // Internal wifi.begin returns false when failed, therefore we return false as error
     if (!_wifi.begin()) {
-        return WL_IDLE_STATUS;
+        return false;
     }
     noLowPowerMode();
     // Enable CYW43 event debugging (make sure Debug Port is set)
     //cyw43_state.trace_flags = 0xffff;
+
+    return true;
+}
+
+
+/*  Start WiFi connection for OPEN networks
+
+    param ssid: Pointer to the SSID string.
+*/
+int WiFiClass::begin(const char* ssid) {
+    return begin(ssid, nullptr);
+}
+
+/*  Start WiFi connection for OPEN networks, but non blocking.
+
+    param ssid: Pointer to the SSID string.
+*/
+int WiFiClass::beginNoBlock(const char* ssid) {
+    return beginNoBlock(ssid, nullptr);
+}
+
+
+int WiFiClass::beginBSSID(const char* ssid, const uint8_t *bssid) {
+    return begin(ssid, nullptr, bssid);
+}
+
+/*  Start WiFi connection with passphrase
+    the most secure supported mode will be automatically selected
+
+    param ssid: Pointer to the SSID string.
+    param passphrase: Passphrase. Valid characters in a passphrase
+          must be between ASCII 32-126 (decimal).
+*/
+int WiFiClass::begin(const char* ssid, const char *passphrase, const uint8_t *bssid) {
+    uint32_t start = millis(); // The timeout starts from network init, not network link up
+
+    // Returns WL_IDLE_STATUS on error for compatibility.
+    if (!_beginInternal(ssid, passphrase, bssid)) {
+        return WL_IDLE_STATUS;
+    }
+
     while (!_calledESP && ((millis() - start < (uint32_t)2 * _timeout)) && !connected()) {
         delay(10);
     }
     return status();
 }
 
+int WiFiClass::beginNoBlock(const char* ssid, const char *passphrase, const uint8_t *bssid) {
+    // Returns WL_IDLE_STATUS on error for compatibility.
+    if (!_beginInternal(ssid, passphrase, bssid)) {
+        return WL_IDLE_STATUS;
+    }
+    return status();
+}
+
 uint8_t WiFiClass::beginAP(const char *ssid) {
     return beginAP(ssid, nullptr);
 }

libraries/WiFi/src/WiFiClass.h

@@ -27,6 +27,8 @@
 #include <lwIP_CYW43.h>
 #elif defined(ESPHOSTSPI)
 #include <lwIP_ESPHost.h>
+#elif defined(WINC1501_SPI)
+#include <lwIP_WINC1500.h>
 #else
 #include "utility/lwIP_nodriver.h"
 #endif
@@ -70,6 +72,12 @@ public:
         param ssid: Pointer to the SSID string.
     */
     int begin(const char* ssid);
+    /*  Start WiFi connection for OPEN networks, without blocking
+
+        param ssid: Pointer to the SSID string.
+    */
+    int beginNoBlock(const char* ssid);
+
     int beginBSSID(const char* ssid, const uint8_t *bssid);
 
     /*  Start WiFi connection with WEP encryption.
@@ -92,6 +100,15 @@ public:
         param bssid: If non-null, the BSSID associated w/the SSID to connect to
     */
     int begin(const char* ssid, const char *passphrase, const uint8_t *bssid = nullptr);
+    /*  Start WiFi connection with passphrase, without blocking. Check for .connected() for a connection
+        the most secure supported mode will be automatically selected
+
+        param ssid: Pointer to the SSID string.
+        param passphrase: Passphrase. Valid characters in a passphrase
+              must be between ASCII 32-126 (decimal).
+        param bssid: If non-null, the BSSID associated w/the SSID to connect to
+    */
+    int beginNoBlock(const char* ssid, const char *passphrase, const uint8_t *bssid = nullptr);
 
     bool connected();
     bool isConnected() {
@@ -413,6 +430,9 @@ public:
     }
 
 private:
+    // Internal wifi begin. Returns true on success
+    bool _beginInternal(const char* ssid, const char *passphrase, const uint8_t *bssid = nullptr);
+
     int _timeout = 15000;
     String _ssid;
     uint8_t _bssid[6];

libraries/WiFi/src/utility/nodriver.h

@@ -48,6 +48,10 @@ public:
         return true;
     }
 
+    PinStatus interruptMode() {
+        return LOW;
+    }
+
     constexpr bool needsSPI() const {
         return false;
     }

libraries/lwIP_CYW43/src/utility/CYW43shim.h

@@ -91,6 +91,10 @@ public:
         return true;
     }
 
+    PinStatus interruptMode() {
+        return LOW;
+    }
+
     void setSSID(const char *p) {
         _ssid = p;
     }

libraries/lwIP_ESPHost/examples/WiFiClient-ESP/.ci.defines

@@ -0,0 +1 @@
+-DESPHOST_RESET=D5 -DESPHOST_HANDSHAKE=D7 -DESPHOST_DATA_READY=D6 -DESPHOST_CS=D1 -DESPHOSTSPI=SPI

libraries/lwIP_ESPHost/examples/WiFiClient-ESP/WiFiClient-ESP.ino

@@ -0,0 +1,101 @@
+/*
+    This sketch establishes a TCP connection to a "quote of the day" service.
+    It sends a "hello" message, and then prints received data.
+*/
+
+#ifndef ESPHOSTSPI
+#error This example requires an ESP-Hosted-FG WiFi chip to be defined, see the documentation
+// For example, add this to your boards.local.txt:
+// rpipico.build.extra_flags=-DESPHOST_RESET=D5 -DESPHOST_HANDSHAKE=D7 -DESPHOST_DATA_READY=D6 -DESPHOST_CS=D1 -DESPHOSTSPI=SPI
+#endif
+
+#include <WiFi.h>
+
+#ifndef STASSID
+#define STASSID "your-ssid"
+#define STAPSK "your-password"
+#endif
+
+const char* ssid = STASSID;
+const char* password = STAPSK;
+
+const char* host = "djxmmx.net";
+const uint16_t port = 17;
+
+WiFiMulti multi;
+
+void setup() {
+  Serial.begin(115200);
+
+  // We start by connecting to a WiFi network
+
+  Serial.println();
+  Serial.println();
+  Serial.print("Connecting to ");
+  Serial.println(ssid);
+
+  multi.addAP(ssid, password);
+
+  if (multi.run() != WL_CONNECTED) {
+    Serial.println("Unable to connect to network, rebooting in 10 seconds...");
+    delay(10000);
+    rp2040.reboot();
+  }
+
+  Serial.println("");
+  Serial.println("WiFi connected");
+  Serial.println("IP address: ");
+  Serial.println(WiFi.localIP());
+}
+
+void loop() {
+  static bool wait = false;
+
+  Serial.print("connecting to ");
+  Serial.print(host);
+  Serial.print(':');
+  Serial.println(port);
+
+  // Use WiFiClient class to create TCP connections
+  WiFiClient client;
+  if (!client.connect(host, port)) {
+    Serial.println("connection failed");
+    delay(5000);
+    return;
+  }
+
+  // This will send a string to the server
+  Serial.println("sending data to server");
+  if (client.connected()) {
+    client.println("hello from RP2040");
+  }
+
+  // wait for data to be available
+  unsigned long timeout = millis();
+  while (client.available() == 0) {
+    if (millis() - timeout > 5000) {
+      Serial.println(">>> Client Timeout !");
+      client.stop();
+      delay(60000);
+      return;
+    }
+  }
+
+  // Read all the lines of the reply from server and print them to Serial
+  Serial.println("receiving from remote server");
+  // not testing 'client.connected()' since we do not need to send data here
+  while (client.available()) {
+    char ch = static_cast<char>(client.read());
+    Serial.print(ch);
+  }
+
+  // Close the connection
+  Serial.println();
+  Serial.println("closing connection");
+  client.stop();
+
+  if (wait) {
+    delay(300000);  // execute once every 5 minutes, don't flood remote service
+  }
+  wait = true;
+}

libraries/lwIP_ESPHost/src/ESPHost.cpp

@@ -19,7 +19,8 @@
 */
 
 #include "ESPHost.h"
-#include "CEspControl.h"
+#include <CEspControl.h>
+#include <LwipEthernet.h>
 
 ESPHost::ESPHost(int8_t cs, arduino::SPIClass &spi, int8_t intrpin) {
     (void) cs;
@@ -42,8 +43,10 @@ void ESPHost::end() {
 }
 
 uint16_t ESPHost::sendFrame(const uint8_t *data, uint16_t datalen) {
+    ethernet_arch_lwip_gpio_mask();
     int res = CEspControl::getInstance().sendBuffer(apMode ? ESP_AP_IF : ESP_STA_IF, 0, (uint8_t*) data, datalen);
     CEspControl::getInstance().communicateWithEsp();
+    ethernet_arch_lwip_gpio_unmask();
     return (res == ESP_CONTROL_OK) ? datalen : 0;
 }
 

libraries/lwIP_ESPHost/src/ESPHost.h

@@ -44,7 +44,11 @@ public:
     }
 
     bool interruptIsPossible() {
-        return false;
+        return true;
+    }
+
+    PinStatus interruptMode() {
+        return HIGH;
     }
 
     constexpr bool needsSPI() const {

libraries/lwIP_ESPHost/src/lwIP_ESPHost.cpp

@@ -23,9 +23,18 @@
 
 #define MAX_SOFTAP_CONNECTION_DEF 5
 
+#if defined(SPIWIFI_ACK) // Arduino Nano RP2040 Connect
+#define ESPHOST_DATA_READY SPIWIFI_ACK
+#endif
+
 bool ESPHostLwIP::wifiHwInitialized = false;
 ESPHostLwIP* ESPHostLwIP::instance = nullptr;
 
+ESPHostLwIP::ESPHostLwIP() :
+    LwipIntfDev<ESPHost>(SS, SPI, ESPHOST_DATA_READY) {
+
+}
+
 void ESPHostLwIP::setSTA() {
     apMode = false;
 }
@@ -122,7 +131,7 @@ bool ESPHostLwIP::begin() {
     if (!initHW()) {
         return false;
     }
-    ethernet_arch_lwip_begin();
+    ethernet_arch_lwip_gpio_mask();
     if (!apMode) {
         CEspControl::getInstance().setWifiMode(WIFI_MODE_STA);
         if (CEspControl::getInstance().connectAccessPoint(ap) != ESP_CONTROL_OK) {
@@ -148,10 +157,10 @@ bool ESPHostLwIP::begin() {
         }
         CEspControl::getInstance().getSoftAccessPointConfig(softAP);
     }
-    ethernet_arch_lwip_end();
+    ethernet_arch_lwip_gpio_unmask();
     uint8_t mac[6];
     if (!LwipIntfDev<ESPHost>::begin(macAddress(apMode, mac))) {
-        ethernet_arch_lwip_begin();
+        ethernet_arch_lwip_gpio_mask();
         if (apMode) {
             CEspControl::getInstance().stopSoftAccessPoint();
             wifiStatus = WL_AP_FAILED;
@@ -159,7 +168,7 @@ bool ESPHostLwIP::begin() {
             CEspControl::getInstance().disconnectAccessPoint();
             wifiStatus = WL_CONNECT_FAILED;
         }
-        ethernet_arch_lwip_end();
+        ethernet_arch_lwip_gpio_unmask();
         return false;
     }
     if (apMode) {
@@ -206,11 +215,11 @@ uint8_t* ESPHostLwIP::macAddress(bool apMode, uint8_t *mac) {
     }
     WifiMac_t MAC;
     MAC.mode = apMode ? WIFI_MODE_AP : WIFI_MODE_STA;
-    ethernet_arch_lwip_begin();
+    ethernet_arch_lwip_gpio_mask();
     if (CEspControl::getInstance().getWifiMacAddress(MAC) == ESP_CONTROL_OK) {
         CNetUtilities::macStr2macArray(mac, MAC.mac);
     }
-    ethernet_arch_lwip_end();
+    ethernet_arch_lwip_gpio_unmask();
     return mac;
 }
 
@@ -227,9 +236,9 @@ int32_t ESPHostLwIP::RSSI() {
     if (!joined) {
         return 0;
     }
-    ethernet_arch_lwip_begin();
+    ethernet_arch_lwip_gpio_mask();
     CEspControl::getInstance().getAccessPointConfig(ap);
-    ethernet_arch_lwip_end();
+    ethernet_arch_lwip_gpio_unmask();
     return ap.rssi;
 }
 
@@ -264,9 +273,9 @@ int8_t ESPHostLwIP::scanNetworks(bool async) {
     if (!initHW()) {
         return -1;
     }
-    ethernet_arch_lwip_begin();
+    ethernet_arch_lwip_gpio_mask();
     int res = CEspControl::getInstance().getAccessPointScanList(accessPoints);
-    ethernet_arch_lwip_end();
+    ethernet_arch_lwip_gpio_unmask();
     wifiStatus = WL_SCAN_COMPLETED;
     if (res != ESP_CONTROL_OK) {
         return -1;
@@ -321,9 +330,9 @@ void ESPHostLwIP::lowPowerMode() {
     if (!initHW()) {
         return;
     }
-    ethernet_arch_lwip_begin();
+    ethernet_arch_lwip_gpio_mask();
     CEspControl::getInstance().setPowerSaveMode(1);
-    ethernet_arch_lwip_end();
+    ethernet_arch_lwip_gpio_unmask();
 }
 
 void ESPHostLwIP::noLowPowerMode() {

libraries/lwIP_ESPHost/src/lwIP_ESPHost.h

@@ -27,6 +27,8 @@
 class ESPHostLwIP : public LwipIntfDev<ESPHost> {
 public:
 
+    ESPHostLwIP();
+
     void setSTA();
     void setAP();
 

libraries/lwIP_Ethernet/examples/EthernetLibCompatible/EthernetLibCompatible.ino

@@ -0,0 +1,134 @@
+/*
+  Web client
+
+  This sketch connects to a website (http://www.google.com)
+  using an Arduino WIZnet Ethernet shield.
+
+  Circuit:
+    Ethernet shield attached to default SPI pins
+
+  created 18 Dec 2009
+  by David A. Mellis
+  modified 9 Apr 2012
+  by Tom Igoe, based on work by Adrian McEwen
+*/
+
+#include <SPI.h>
+#include <EthernetCompat.h>
+
+ArduinoWiznet5500lwIP Ethernet(D10, SPI, D2);
+//ArduinoWiznet5100lwIP Ethernet(D10, SPI, D2);
+//ArduinoENC28J60lwIP Ethernet(D10, SPI, D2);
+
+// Enter a MAC address for your controller below.
+// Newer Ethernet shields have a MAC address printed on a sticker on the shield
+byte mac[] = { 0xDE, 0xAD, 0xBE, 0xEF, 0xFE, 0xED };
+
+// if you don't want to use DNS (and reduce your sketch size)
+// use the numeric IP instead of the name for the server:
+//IPAddress server(74,125,232,128);  // numeric IP for Google (no DNS)
+char server[] = "www.google.com";    // name address for Google (using DNS)
+
+// Set the static IP address to use if the DHCP fails to assign
+IPAddress ip(192, 168, 0, 177);
+IPAddress myDns(192, 168, 0, 1);
+
+// Initialize the Ethernet client library
+// with the IP address and port of the server
+// that you want to connect to (port 80 is default for HTTP):
+EthernetClient client;
+
+// Variables to measure the speed
+unsigned long beginMicros, endMicros;
+unsigned long byteCount = 0;
+bool printWebData = true;  // set to false for better speed measurement
+
+void setup() {
+
+  // Open serial communications and wait for port to open:
+  Serial.begin(115200);
+  while (!Serial) {
+    ; // wait for serial port to connect. Needed for native USB port only
+  }
+
+  // start the Ethernet connection:
+  Serial.println("Initialize Ethernet with DHCP:");
+  if (Ethernet.begin(mac) == 0) {
+    Serial.println("Failed to configure Ethernet using DHCP");
+    // Check for Ethernet hardware present
+    if (Ethernet.hardwareStatus() == EthernetNoHardware) {
+      Serial.println("Ethernet shield was not found.  Sorry, can't run without hardware. :(");
+      while (true) {
+        delay(1); // do nothing, no point running without Ethernet hardware
+      }
+    }
+    if (Ethernet.linkStatus() == LinkOFF) {
+      Serial.println("Ethernet cable is not connected.");
+    }
+    // try to configure using IP address instead of DHCP:
+    Ethernet.begin(mac, ip, myDns);
+  } else {
+    Serial.print("  DHCP assigned IP ");
+    Serial.println(Ethernet.localIP());
+  }
+  // give the Ethernet shield a second to initialize:
+  delay(1000);
+  Serial.print("connecting to ");
+  Serial.print(server);
+  Serial.println("...");
+
+  // if you get a connection, report back via serial:
+  if (client.connect(server, 80)) {
+    Serial.print("connected to ");
+    Serial.println(client.remoteIP());
+    // Make a HTTP request:
+    client.println("GET /search?q=arduino HTTP/1.1");
+    client.println("Host: www.google.com");
+    client.println("Connection: close");
+    client.println();
+  } else {
+    // if you didn't get a connection to the server:
+    Serial.println("connection failed");
+  }
+  beginMicros = micros();
+}
+
+void loop() {
+  // if there are incoming bytes available
+  // from the server, read them and print them:
+  int len = client.available();
+  if (len > 0) {
+    byte buffer[80];
+    if (len > 80) {
+      len = 80;
+    }
+    client.read(buffer, len);
+    if (printWebData) {
+      Serial.write(buffer, len); // show in the serial monitor (slows some boards)
+    }
+    byteCount = byteCount + len;
+  }
+
+  // if the server's disconnected, stop the client:
+  if (!client.connected()) {
+    endMicros = micros();
+    Serial.println();
+    Serial.println("disconnecting.");
+    client.stop();
+    Serial.print("Received ");
+    Serial.print(byteCount);
+    Serial.print(" bytes in ");
+    float seconds = (float)(endMicros - beginMicros) / 1000000.0;
+    Serial.print(seconds, 4);
+    float rate = (float) byteCount / seconds / 1000.0;
+    Serial.print(", rate = ");
+    Serial.print(rate);
+    Serial.print(" kbytes/second");
+    Serial.println();
+
+    // do nothing forevermore:
+    while (true) {
+      delay(1);
+    }
+  }
+}

libraries/lwIP_Ethernet/src/EthernetCompat.h

@@ -0,0 +1,100 @@
+#pragma once
+
+#include <LwipIntfDev.h>
+#include <W5100lwIP.h>
+#include <W5500lwIP.h>
+#include <ENC28J60lwIP.h>
+
+#include <WiFiUdp.h>
+#include <WiFiClient.h>
+#include <WiFiServer.h>
+
+using EthernetUDP = WiFiUDP;
+using EthernetClient = WiFiClient;
+using EthernetServer = WiFiServer;
+
+enum HardwareStatus {
+    EthernetNoHardware,
+    EthernetHardwareFound,
+};
+
+template<class RawDev>
+class ArduinoEthernet : public LwipIntfDev<RawDev> {
+public:
+    ArduinoEthernet(int8_t cs = SS, SPIClass &spi = SPI, int8_t intr = -1) :
+        LwipIntfDev<RawDev>(cs, spi, intr) {
+        _hardwareStatus = EthernetNoHardware;
+    }
+
+    // Arduino-Ethernet API compatibility, order can be either:
+    // mac, ip, gateway, netmask, dns (esp8266 or natural order)
+    // mac, ip, dns, gateway, netmask (Arduino legacy)
+    boolean begin(const uint8_t *macAddress, IPAddress local_ip = IPADDR_NONE, IPAddress arg1 = IPADDR_NONE, IPAddress arg2 = IPADDR_NONE, IPAddress arg3 = IPADDR_NONE) {
+        if (local_ip.isSet() && local_ip.isV4()) {
+            // setting auto values using arduino ordering of parameters
+            if (arg1 == IPADDR_NONE) {  // else dns or gw
+                arg1 = local_ip;
+                arg1[3] = 1;
+            }
+            if (arg2 == IPADDR_NONE) {  // else gw or mask
+                arg2 = local_ip;
+                arg2[3] = 1;
+            }
+            // if arg2 is mask (esp ordering), let DNS IP unconfigured
+            if (arg3 == IPADDR_NONE && arg2[0] != 255) {  // else mask or dns
+                arg3 = IPAddress(255, 255, 255, 0);
+            }
+        }
+        bool ret = true;
+        if (local_ip.isSet()) {
+            ret = LwipIntfDev<RawDev>::config(local_ip, arg1, arg2, arg3);
+        }
+        if (ret) {
+            ret = LwipIntfDev<RawDev>::begin(macAddress);
+            if (!local_ip.isSet()) {
+                // Arduino API waits for DHCP answer
+                while (!LwipIntfDev<RawDev>::connected()) {
+                    delay(100);
+                }
+            }
+        }
+
+        if (ret) {
+            _hardwareStatus = EthernetHardwareFound;
+        }
+
+        return ret;
+    }
+
+    void end() {
+        ip_addr_copy(LwipIntfDev<RawDev>::_netif.ip_addr, ip_addr_any);  // to allow DHCP at next begin
+        LwipIntfDev<RawDev>::end();
+    }
+
+    void MACAddress(uint8_t *mac) {
+        LwipIntfDev<RawDev>::macAddress(mac);
+    }
+
+    IPAddress dnsServerIP() const {
+        return LwipIntfDev<RawDev>::dnsIP(0);
+    }
+
+    void setDnsServerIP(const IPAddress dnsIP) {
+        LwipIntfDev<RawDev>::setDNS(dnsIP);
+    }
+
+    HardwareStatus hardwareStatus() const {
+        return _hardwareStatus;
+    }
+
+    int maintain() const {
+        return 0;
+    }
+
+protected:
+    HardwareStatus _hardwareStatus;
+};
+
+using ArduinoWiznet5500lwIP = ArduinoEthernet<Wiznet5500>;
+using ArduinoWiznet5100lwIP = ArduinoEthernet<Wiznet5100>;
+using ArduinoENC28J60lwIP   = ArduinoEthernet<ENC28J60>;

libraries/lwIP_Ethernet/src/LwipIntfDev.h

@@ -50,6 +50,11 @@
 #define DEFAULT_MTU 1500
 #endif
 
+enum EthernetLinkStatus {
+    Unknown,
+    LinkON,
+    LinkOFF
+};
 
 extern "C" void cyw43_hal_generate_laa_mac(__unused int idx, uint8_t buf[6]);
 
@@ -149,6 +154,9 @@ public:
 
     wl_status_t status();
 
+    // Arduino Ethernet compatibility
+    EthernetLinkStatus linkStatus();
+
 protected:
     err_t netif_init();
     void  check_route();
@@ -399,7 +407,7 @@ bool LwipIntfDev<RawDev>::begin(const uint8_t* macAddress, const uint16_t mtu) {
         if (RawDev::interruptIsPossible()) {
             noInterrupts(); // Ensure this is atomically set up
             pinMode(_intrPin, INPUT);
-            attachInterruptParam(_intrPin, _irq, LOW, (void*)this);
+            attachInterruptParam(_intrPin, _irq, RawDev::interruptMode(), (void*)this);
             __addEthernetGPIO(_intrPin);
             interrupts();
         } else {
@@ -442,6 +450,11 @@ wl_status_t LwipIntfDev<RawDev>::status() {
     return _started ? (connected() ? WL_CONNECTED : WL_DISCONNECTED) : WL_NO_SHIELD;
 }
 
+template<class RawDev>
+EthernetLinkStatus LwipIntfDev<RawDev>::linkStatus() {
+    return RawDev::isLinkDetectable() ? _started && RawDev::isLinked() ? LinkON : LinkOFF : Unknown;
+}
+
 template<class RawDev>
 err_t LwipIntfDev<RawDev>::linkoutput_s(netif* netif, struct pbuf* pbuf) {
     LwipIntfDev* lid = (LwipIntfDev*)netif->state;

libraries/lwIP_WINC1500/README.md

@@ -0,0 +1,21 @@
+# lwIP_WINC1500 library 
+
+RP2040 Arduino driver for Arduino WiFi101 shield and Adafruit WINC1500 shields and modules.
+
+The Adafruit learning system has instruction for wiring the WINC1500 modules and the shields should work well with Adafruit Metro RP2040.
+
+The driver wraps the Atmel driver for ATWIC1500 chip and is based on code from the Arduino WiFi101 library. 
+
+## Configuration
+
+Pins are configured with defines. To add the defines, modify boards.txt or create boards.local.txt next to boards.txt and add `<board>.build.extra_flags`.
+
+The WiFi library uses this driver if `WINC1501_SPI` is defined. The value of `WINC1501_SPI` is the SPI interface to use. The driver will use default pins of the SPI interface.
+
+Defaults for additional pins are as for the shields: RESET 5, INTN 7 and CS 10. The pins can be changed with defines in `<board>.build.extra_flags`
+
+Example of complete settings:
+
+```
+rpipico.build.extra_flags=-DWINC1501_SPI=SPI -DWINC1501_RESET_PIN=D5 -DWINC1501_INTN_PIN=D7 -DWINC1501_SPI_CS_PIN=D10 
+```

libraries/lwIP_WINC1500/examples/WiFiClient-WINC/.ci.defines

@@ -0,0 +1 @@
+-DWINC1501_SPI=SPI -DWINC1501_RESET_PIN=D5 -DWINC1501_INTN_PIN=D7 -DWINC1501_SPI_CS_PIN=D10

libraries/lwIP_WINC1500/examples/WiFiClient-WINC/WiFiClient-WINC.ino

@@ -0,0 +1,101 @@
+/*
+    This sketch establishes a TCP connection to a "quote of the day" service.
+    It sends a "hello" message, and then prints received data.
+*/
+
+#ifndef WINC1501_SPI
+#error This example requires a WINC1500 WiFi chip to be defined, see the documentation
+// For example, add this to your boards.local.txt:
+// rpipico.build.extra_flags=-DWINC1501_SPI=SPI -DWINC1501_RESET_PIN=D5 -DWINC1501_INTN_PIN=D7 -DWINC1501_SPI_CS_PIN=D10
+#endif
+
+#include <WiFi.h>
+
+#ifndef STASSID
+#define STASSID "your-ssid"
+#define STAPSK "your-password"
+#endif
+
+const char* ssid = STASSID;
+const char* password = STAPSK;
+
+const char* host = "djxmmx.net";
+const uint16_t port = 17;
+
+WiFiMulti multi;
+
+void setup() {
+  Serial.begin(115200);
+
+  // We start by connecting to a WiFi network
+
+  Serial.println();
+  Serial.println();
+  Serial.print("Connecting to ");
+  Serial.println(ssid);
+
+  multi.addAP(ssid, password);
+
+  if (multi.run() != WL_CONNECTED) {
+    Serial.println("Unable to connect to network, rebooting in 10 seconds...");
+    delay(10000);
+    rp2040.reboot();
+  }
+
+  Serial.println("");
+  Serial.println("WiFi connected");
+  Serial.println("IP address: ");
+  Serial.println(WiFi.localIP());
+}
+
+void loop() {
+  static bool wait = false;
+
+  Serial.print("connecting to ");
+  Serial.print(host);
+  Serial.print(':');
+  Serial.println(port);
+
+  // Use WiFiClient class to create TCP connections
+  WiFiClient client;
+  if (!client.connect(host, port)) {
+    Serial.println("connection failed");
+    delay(5000);
+    return;
+  }
+
+  // This will send a string to the server
+  Serial.println("sending data to server");
+  if (client.connected()) {
+    client.println("hello from RP2040");
+  }
+
+  // wait for data to be available
+  unsigned long timeout = millis();
+  while (client.available() == 0) {
+    if (millis() - timeout > 5000) {
+      Serial.println(">>> Client Timeout !");
+      client.stop();
+      delay(60000);
+      return;
+    }
+  }
+
+  // Read all the lines of the reply from server and print them to Serial
+  Serial.println("receiving from remote server");
+  // not testing 'client.connected()' since we do not need to send data here
+  while (client.available()) {
+    char ch = static_cast<char>(client.read());
+    Serial.print(ch);
+  }
+
+  // Close the connection
+  Serial.println();
+  Serial.println("closing connection");
+  client.stop();
+
+  if (wait) {
+    delay(300000);  // execute once every 5 minutes, don't flood remote service
+  }
+  wait = true;
+}

libraries/lwIP_WINC1500/library.properties

@@ -0,0 +1,10 @@
+name=lwIP_WINC1500
+version=1
+author=Juraj Andrassy
+maintainer=Juraj Andrassy <juraj.andrassy@gmail.com>
+sentence=RP2040 Core ATWINC1500 wifi driver
+paragraph=This library implements a network driver for devices based on the ATMEL WINC1500 WiFi module
+category=Communication
+url=https://github.com/earlephilhower/arduino-pico
+architectures=rp2040
+dot_a_linkage=true

libraries/lwIP_WINC1500/src/bsp/include/nm_bsp.h

@@ -0,0 +1,283 @@
+/**
+ *
+ * \file
+ *
+ * \brief WINC BSP API Declarations.
+ *
+ * Copyright (c) 2015 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+ 
+/** \defgroup nm_bsp BSP
+ */
+/**@defgroup  BSPDefine Defines
+ * @ingroup nm_bsp
+ * @{
+ */
+#ifndef _NM_BSP_H_
+#define _NM_BSP_H_
+
+#define NMI_API
+/*!< 
+*        Attribute used to define memory section to map Functions in host memory.
+*/
+#define CONST const
+
+/*!< 
+*     Used for code portability.
+*/
+
+/*!
+ * @typedef      void (*tpfNmBspIsr) (void);
+ * @brief           Pointer to function.\n
+ *                     Used as a data type of ISR function registered by \ref nm_bsp_register_isr
+ * @return         None
+ */
+typedef void (*tpfNmBspIsr)(void);
+
+
+
+#ifndef NULL
+#define NULL ((void*)0)
+#endif
+/*!<
+*    Void Pointer to '0' in case of NULL is not defined.
+*/
+
+
+#define BSP_MIN(x,y) ((x)>(y)?(y):(x))
+/*!<
+*     Computes the minimum of \b x and \b y.
+*/
+
+ //@}
+
+/**@defgroup  DataT  DataTypes
+ * @ingroup nm_bsp
+ * @{
+ */
+
+  /*!
+ * @ingroup DataTypes
+ * @typedef      unsigned char	uint8;
+ * @brief        Range of values between 0 to 255
+ */
+typedef unsigned char	uint8;
+
+ /*!
+ * @ingroup DataTypes
+ * @typedef      unsigned short	uint16;
+ * @brief        Range of values between 0 to 65535
+ */
+typedef unsigned short	uint16;
+
+ /*!
+ * @ingroup Data Types
+ * @typedef      unsigned long	uint32;
+ * @brief        Range of values between 0 to 4294967295
+ */
+typedef unsigned long	uint32;
+
+
+  /*!
+ * @ingroup Data Types
+ * @typedef      signed char		sint8;
+ * @brief        Range of values between -128 to 127
+ */
+typedef signed char		sint8;
+
+ /*!
+ * @ingroup DataTypes
+ * @typedef      signed short	sint16;
+ * @brief        Range of values between -32768 to 32767
+ */
+typedef signed short	sint16;
+
+  /*!
+ * @ingroup DataTypes
+ * @typedef      signed long		sint32;
+ * @brief        Range of values between -2147483648 to 2147483647
+ */
+
+typedef signed long		sint32;
+ //@}
+
+#ifndef CORTUS_APP
+
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/** \defgroup BSPAPI Function
+ *   @ingroup nm_bsp
+ */
+
+
+/** @defgroup NmBspInitFn nm_bsp_init
+ *  @ingroup BSPAPI
+ *  Initialization for BSP such as Reset and Chip Enable Pins for WINC, delays, register ISR, enable/disable IRQ for WINC, ...etc. You must use this function in the head of your application to
+ *  enable WINC and Host Driver communicate each other.
+ */
+ /**@{*/
+/*!
+ * @fn           sint8 nm_bsp_init(void);
+ * @note         Implementation of this function is host dependent.
+ * @warning      Missing use will lead to unavailability of host communication.\n
+ *
+ * @return       The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
+
+ */
+sint8 nm_bsp_init(void);
+ /**@}*/
+
+
+ /** @defgroup NmBspDeinitFn nm_bsp_deinit
+ *    @ingroup BSPAPI
+ *   	 De-initialization for BSP (\e Board \e Support \e Package)
+ */
+ /**@{*/
+/*!
+ * @fn           sint8 nm_bsp_deinit(void);
+ * @pre          Initialize \ref nm_bsp_init first
+ * @note         Implementation of this function is host dependent.
+ * @warning      Missing use may lead to unknown behavior in case of soft reset.\n
+ * @see          nm_bsp_init
+ * @return      The function returns @ref M2M_SUCCESS for successful operations and a negative value otherwise.
+
+ */
+sint8 nm_bsp_deinit(void);
+ /**@}*/
+
+
+/** @defgroup NmBspResetFn  nm_bsp_reset
+*     @ingroup BSPAPI
+*      Resetting NMC1500 SoC by setting CHIP_EN and RESET_N signals low, then after specific delay the function will put CHIP_EN high then RESET_N high,
+*      for the timing between signals please review the WINC data-sheet
+*/
+/**@{*/
+ /*!
+ * @fn           void nm_bsp_reset(void);
+ * @param [in]   None
+ * @pre          Initialize \ref nm_bsp_init first
+ * @note         Implementation of this function is host dependent and called by HIF layer.
+ * @see          nm_bsp_init
+ * @return       None
+
+ */
+void nm_bsp_reset(void);
+ /**@}*/
+
+
+/** @defgroup NmBspSleepFn nm_bsp_sleep
+*     @ingroup BSPAPI
+*     Sleep in units of milliseconds.\n
+*    This function used by HIF Layer according to different situations.
+*/
+/**@{*/
+/*!
+ * @fn           void nm_bsp_sleep(uint32);
+ * @brief
+ * @param [in]   u32TimeMsec
+ *               Time unit in milliseconds
+ * @pre          Initialize \ref nm_bsp_init first
+ * @warning      Maximum value must nor exceed 4294967295 milliseconds which is equal to 4294967.295 seconds.\n
+ * @note         Implementation of this function is host dependent.
+ * @see           nm_bsp_init
+ * @return       None
+ */
+void nm_bsp_sleep(uint32 u32TimeMsec);
+/**@}*/
+
+
+/** @defgroup NmBspRegisterFn nm_bsp_register_isr
+*     @ingroup BSPAPI
+*   Register ISR (Interrupt Service Routine) in the initialization of HIF (Host Interface) Layer.
+*   When the interrupt trigger the BSP layer should call the pfisr function once inside the interrupt.
+*/
+/**@{*/
+/*!
+ * @fn           void nm_bsp_register_isr(tpfNmBspIsr);
+ * @param [in]   tpfNmBspIsr  pfIsr
+ *               Pointer to ISR handler in HIF
+ * @warning      Make sure that ISR for IRQ pin for WINC is disabled by default in your implementation.
+ * @note         Implementation of this function is host dependent and called by HIF layer.
+ * @see          tpfNmBspIsr
+ * @return       None
+
+ */
+void nm_bsp_register_isr(tpfNmBspIsr pfIsr);
+/**@}*/
+
+
+/** @defgroup NmBspInterruptCtrl nm_bsp_interrupt_ctrl
+*     @ingroup BSPAPI
+*    Synchronous enable/disable interrupts function
+*/
+/**@{*/
+/*!
+ * @fn           void nm_bsp_interrupt_ctrl(uint8);
+ * @brief        Enable/Disable interrupts
+ * @param [in]   u8Enable
+ *               '0' disable interrupts. '1' enable interrupts 
+ * @see          tpfNmBspIsr           
+ * @note         Implementation of this function is host dependent and called by HIF layer.
+ * @return       None
+
+ */
+void nm_bsp_interrupt_ctrl(uint8 u8Enable);
+  /**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#ifdef _NM_BSP_BIG_END
+#define NM_BSP_B_L_32(x) \
+((((x) & 0x000000FF) << 24) + \
+(((x) & 0x0000FF00) << 8)  + \
+(((x) & 0x00FF0000) >> 8)   + \
+(((x) & 0xFF000000) >> 24))
+#define NM_BSP_B_L_16(x) \
+((((x) & 0x00FF) << 8) + \
+(((x)  & 0xFF00) >> 8))
+#else
+#define NM_BSP_B_L_32(x)  (x)
+#define NM_BSP_B_L_16(x)  (x)
+#endif
+
+
+#endif	/*_NM_BSP_H_*/

libraries/lwIP_WINC1500/src/bsp/include/nm_bsp_arduino.h

@@ -0,0 +1,74 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains NMC1500 BSP APIs definitions.
+ *
+ * Copyright (c) 2015 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _NM_BSP_ARDUINO_H_
+#define _NM_BSP_ARDUINO_H_
+
+#include <stdint.h>
+
+#include <Arduino.h>
+
+/*
+ * Arduino variants may redefine those pins.
+ * If no pins are specified the following defaults are used:
+ *  WINC1501_RESET_PIN   - pin 5
+ *  WINC1501_INTN_PIN    - pin 7
+ *  WINC1501_CHIP_EN_PIN - not connected (tied to VCC)
+ */
+#if !defined(WINC1501_RESET_PIN)
+  #define WINC1501_RESET_PIN  5
+#endif
+#if !defined(WINC1501_INTN_PIN)
+  #define WINC1501_INTN_PIN   7
+#endif
+#if !defined(WINC1501_SPI_CS_PIN)
+  #define WINC1501_SPI_CS_PIN 10
+#endif
+#if !defined(WINC1501_CHIP_EN_PIN)
+  #define WINC1501_CHIP_EN_PIN -1
+#endif
+
+extern int8_t gi8Winc1501CsPin;
+extern int8_t gi8Winc1501ResetPin;
+extern int8_t gi8Winc1501IntnPin;
+extern int8_t gi8Winc1501ChipEnPin;
+
+#endif /* _NM_BSP_ARDUINO_H_ */

libraries/lwIP_WINC1500/src/bsp/include/nm_bsp_internal.h

@@ -0,0 +1,59 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains NMC1500 BSP APIs declarations.
+ *
+ * Copyright (c) 2015 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+/**@defgroup  BSPDefine Defines
+ * @ingroup nm_bsp
+ * @{
+ */
+#ifndef _NM_BSP_INTERNAL_H_
+#define _NM_BSP_INTERNAL_H_
+
+void winc1500debug(const char* fmt, ...);
+#define CONF_WINC_PRINTF winc1500debug
+
+#define CONF_WINC_USE_SPI   1
+
+#define NM_EDGE_INTERRUPT   1
+
+#define ETH_MODE
+
+#define CONF_PERIPH
+
+#endif //_NM_BSP_INTERNAL_H_

libraries/lwIP_WINC1500/src/bsp/source/nm_bsp_arduino.c

@@ -0,0 +1,214 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains SAMD21 BSP APIs implementation.
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "bsp/include/nm_bsp.h"
+#include "bsp/include/nm_bsp_arduino.h"
+#include "common/include/nm_common.h"
+
+int8_t gi8Winc1501CsPin = WINC1501_SPI_CS_PIN;
+int8_t gi8Winc1501ResetPin = WINC1501_RESET_PIN;
+int8_t gi8Winc1501IntnPin = WINC1501_INTN_PIN;
+int8_t gi8Winc1501ChipEnPin = WINC1501_CHIP_EN_PIN;
+
+static tpfNmBspIsr gpfIsr;
+
+void __attribute__((weak)) attachInterruptMultiArch(uint32_t pin, void *chip_isr, uint32_t mode)
+{
+	attachInterrupt(pin, chip_isr, mode);
+}
+
+void __attribute__((weak)) detachInterruptMultiArch(uint32_t pin)
+{
+	detachInterrupt(pin);
+}
+
+static void chip_isr(void)
+{
+	if (gpfIsr) {
+		gpfIsr();
+	}
+}
+
+/*
+ *	@fn		init_chip_pins
+ *	@brief	Initialize reset, chip enable and wake pin
+ *	@author	M.S.M
+ *	@date	11 July 2012
+ *	@version	1.0
+ */
+static void init_chip_pins(void)
+{
+	if (gi8Winc1501ResetPin > -1)
+	{
+		/* Configure RESETN pin as output. */
+		pinMode(gi8Winc1501ResetPin, OUTPUT);
+		digitalWrite(gi8Winc1501ResetPin, HIGH);
+	}
+
+	/* Configure INTN pins as input. */
+	pinMode(gi8Winc1501IntnPin, INPUT);
+
+	if (gi8Winc1501ChipEnPin > -1)
+	{
+		/* Configure CHIP_EN as pull-up */
+		pinMode(gi8Winc1501ChipEnPin, INPUT_PULLUP);
+	}
+}
+
+static void deinit_chip_pins(void)
+{
+	if (gi8Winc1501ResetPin > -1)
+	{
+		digitalWrite(gi8Winc1501ResetPin, LOW);
+		pinMode(gi8Winc1501ResetPin, INPUT);
+	}
+
+	if (gi8Winc1501ChipEnPin > -1)
+	{
+		pinMode(gi8Winc1501ChipEnPin, INPUT);
+	}
+}
+
+/*
+ *	@fn		nm_bsp_init
+ *	@brief	Initialize BSP
+ *	@return	0 in case of success and -1 in case of failure
+ *	@author	M.S.M
+ *	@date	11 July 2012
+ *	@version	1.0
+ */
+sint8 nm_bsp_init(void)
+{
+	gpfIsr = NULL;
+
+	init_chip_pins();
+
+	nm_bsp_reset();
+
+	return M2M_SUCCESS;
+}
+
+/**
+ *	@fn		nm_bsp_deinit
+ *	@brief	De-iInitialize BSP
+ *	@return	0 in case of success and -1 in case of failure
+ *	@author	M. Abdelmawla
+ *	@date	11 July 2012
+ *	@version	1.0
+ */
+sint8 nm_bsp_deinit(void)
+{
+	deinit_chip_pins();
+
+	return M2M_SUCCESS;
+}
+
+/**
+ *	@fn		nm_bsp_reset
+ *	@brief	Reset NMC1500 SoC by setting CHIP_EN and RESET_N signals low,
+ *           CHIP_EN high then RESET_N high
+ *	@author	M. Abdelmawla
+ *	@date	11 July 2012
+ *	@version	1.0
+ */
+void nm_bsp_reset(void)
+{
+	if (gi8Winc1501ResetPin > -1)
+	{
+		digitalWrite(gi8Winc1501ResetPin, LOW);
+		nm_bsp_sleep(100);
+		digitalWrite(gi8Winc1501ResetPin, HIGH);
+		nm_bsp_sleep(100);
+	}
+}
+
+/*
+ *	@fn		nm_bsp_sleep
+ *	@brief	Sleep in units of mSec
+ *	@param[IN]	u32TimeMsec
+ *				Time in milliseconds
+ *	@author	M.S.M
+ *	@date	28 OCT 2013
+ *	@version	1.0
+ */
+void nm_bsp_sleep(uint32 u32TimeMsec)
+{
+	while (u32TimeMsec--) {
+		delay(1);
+	}
+}
+
+/*
+ *	@fn		nm_bsp_register_isr
+ *	@brief	Register interrupt service routine
+ *	@param[IN]	pfIsr
+ *				Pointer to ISR handler
+ *	@author	M.S.M
+ *	@date	28 OCT 2013
+ *	@sa		tpfNmBspIsr
+ *	@version	1.0
+ */
+void nm_bsp_register_isr(tpfNmBspIsr pfIsr)
+{
+	gpfIsr = pfIsr;
+	attachInterruptMultiArch(gi8Winc1501IntnPin, chip_isr, FALLING);
+}
+
+/*
+ *	@fn		nm_bsp_interrupt_ctrl
+ *	@brief	Enable/Disable interrupts
+ *	@param[IN]	u8Enable
+ *				'0' disable interrupts. '1' enable interrupts
+ *	@author	M.S.M
+ *	@date	28 OCT 2013
+ *	@version	1.0
+ */
+void nm_bsp_interrupt_ctrl(uint8 u8Enable)
+{
+	if (u8Enable) {
+		attachInterruptMultiArch(gi8Winc1501IntnPin, chip_isr, FALLING);
+	} else {
+		detachInterruptMultiArch(gi8Winc1501IntnPin);
+	}
+}

libraries/lwIP_WINC1500/src/bus_wrapper/include/nm_bus_wrapper.h

@@ -0,0 +1,177 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains NMC1000 bus wrapper APIs declarations.
+ *
+ * Copyright (c) 2015 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _NM_BUS_WRAPPER_H_
+#define _NM_BUS_WRAPPER_H_
+
+#include "common/include/nm_common.h"
+
+/**
+	BUS Type
+**/
+#define  NM_BUS_TYPE_I2C	((uint8)0)
+#define  NM_BUS_TYPE_SPI	((uint8)1)
+#define  NM_BUS_TYPE_UART	((uint8)2)
+/**
+	IOCTL commands
+**/
+#define NM_BUS_IOCTL_R			((uint8)0)	/*!< Read only ==> I2C/UART. Parameter:tstrNmI2cDefault/tstrNmUartDefault */
+#define NM_BUS_IOCTL_W			((uint8)1)	/*!< Write only ==> I2C/UART. Parameter type tstrNmI2cDefault/tstrNmUartDefault*/
+#define NM_BUS_IOCTL_W_SPECIAL	((uint8)2)	/*!< Write two buffers within the same transaction
+												(same start/stop conditions) ==> I2C only. Parameter:tstrNmI2cSpecial */
+#define NM_BUS_IOCTL_RW			((uint8)3)	/*!< Read/Write at the same time ==> SPI only. Parameter:tstrNmSpiRw */
+
+#define NM_BUS_IOCTL_WR_RESTART	((uint8)4)				/*!< Write buffer then made restart condition then read ==> I2C only. parameter:tstrNmI2cSpecial */
+/**
+*	@struct	tstrNmBusCapabilities
+*	@brief	Structure holding bus capabilities information
+*	@sa	NM_BUS_TYPE_I2C, NM_BUS_TYPE_SPI
+*/
+typedef struct
+{
+	uint16	u16MaxTrxSz;	/*!< Maximum transfer size. Must be >= 16 bytes*/
+} tstrNmBusCapabilities;
+
+/**
+*	@struct	tstrNmI2cDefault
+*	@brief	Structure holding I2C default operation parameters
+*	@sa		NM_BUS_IOCTL_R, NM_BUS_IOCTL_W
+*/
+typedef struct
+{
+	uint8 u8SlaveAdr;
+	uint8	*pu8Buf;	/*!< Operation buffer */
+	uint16	u16Sz;		/*!< Operation size */
+} tstrNmI2cDefault;
+
+/**
+*	@struct	tstrNmI2cSpecial
+*	@brief	Structure holding I2C special operation parameters
+*	@sa		NM_BUS_IOCTL_W_SPECIAL
+*/
+typedef struct
+{
+	uint8 u8SlaveAdr;
+	uint8	*pu8Buf1;	/*!< pointer to the 1st buffer */
+	uint8	*pu8Buf2;	/*!< pointer to the 2nd buffer */
+	uint16	u16Sz1;		/*!< 1st buffer size */
+	uint16	u16Sz2;		/*!< 2nd buffer size */
+} tstrNmI2cSpecial;
+
+/**
+*	@struct	tstrNmSpiRw
+*	@brief	Structure holding SPI R/W parameters
+*	@sa		NM_BUS_IOCTL_RW
+*/
+typedef struct
+{
+	uint8	*pu8InBuf;		/*!< pointer to input buffer.
+							Can be set to null and in this case zeros should be sent at MOSI */
+	uint8	*pu8OutBuf;		/*!< pointer to output buffer.
+							Can be set to null and in this case data from MISO can be ignored  */
+	uint16	u16Sz;			/*!< Transfere size */
+} tstrNmSpiRw;
+
+
+/**
+*	@struct	tstrNmUartDefault
+*	@brief	Structure holding UART default operation parameters
+*	@sa		NM_BUS_IOCTL_R, NM_BUS_IOCTL_W
+*/
+typedef struct
+{
+	uint8	*pu8Buf;	/*!< Operation buffer */
+	uint16	u16Sz;		/*!< Operation size */
+} tstrNmUartDefault;
+/*!< Bus capabilities. This structure must be declared at platform specific bus wrapper */
+extern tstrNmBusCapabilities egstrNmBusCapabilities;
+
+
+#ifdef __cplusplus
+     extern "C" {
+ #endif
+/**
+*	@fn		nm_bus_init
+*	@brief	Initialize the bus wrapper
+*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+sint8 nm_bus_init(void *);
+
+/**
+*	@fn		nm_bus_ioctl
+*	@brief	send/receive from the bus
+*	@param [in]	u8Cmd
+*					IOCTL command for the operation
+*	@param [in]	pvParameter
+*					Arbitrary parameter depending on IOCTL
+*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@note	For SPI only, it's important to be able to send/receive at the same time
+*/
+sint8 nm_bus_ioctl(uint8 u8Cmd, void* pvParameter);
+
+/**
+*	@fn		nm_bus_deinit
+*	@brief	De-initialize the bus wrapper
+*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+sint8 nm_bus_deinit(void);
+
+/*
+*	@fn			nm_bus_reinit
+*	@brief		re-initialize the bus wrapper
+*	@param [in]	void *config
+*					re-init configuration data
+*	@return		ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+sint8 nm_bus_reinit(void *);
+/*
+*	@fn			nm_bus_get_chip_type
+*	@brief		get chip type
+*	@return		ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+#ifdef CONF_WINC_USE_UART
+uint8 nm_bus_get_chip_type(void);
+#endif
+#ifdef __cplusplus
+	 }
+ #endif
+
+#endif	/*_NM_BUS_WRAPPER_H_*/

libraries/lwIP_WINC1500/src/bus_wrapper/source/nm_bus_wrapper_samd21.cpp

@@ -0,0 +1,200 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains NMC1000 bus wrapper APIs implementation.
+ *
+ * Copyright (c) 2014 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * 4. This software may only be redistributed and used in connection with an
+ *    Atmel microcontroller product.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include <Arduino.h>
+#include <SPI.h>
+
+/*
+ * Variants may define an alternative SPI instace to use for WiFi101.
+ * If not defined the following defaults are used:
+ *   WINC1501_SPI    - SPI
+ */
+#if !defined(WINC1501_SPI)
+  #define WINC1501_SPI SPI
+#endif
+
+extern "C" {
+
+#include "bsp/include/nm_bsp.h"
+#include "bsp/include/nm_bsp_arduino.h"
+#include "common/include/nm_common.h"
+#include "bus_wrapper/include/nm_bus_wrapper.h"
+
+}
+
+#define NM_BUS_MAX_TRX_SZ	256
+
+tstrNmBusCapabilities egstrNmBusCapabilities =
+{
+	NM_BUS_MAX_TRX_SZ
+};
+
+static const SPISettings wifi_SPISettings(12000000L, MSBFIRST, SPI_MODE0);
+
+static sint8 spi_rw(uint8* pu8Mosi, uint8* pu8Miso, uint16 u16Sz)
+{
+	uint8 u8Dummy = 0;
+	uint8 u8SkipMosi = 0, u8SkipMiso = 0;
+
+	if (!pu8Mosi) {
+		pu8Mosi = &u8Dummy;
+		u8SkipMosi = 1;
+	}
+	else if(!pu8Miso) {
+		pu8Miso = &u8Dummy;
+		u8SkipMiso = 1;
+	}
+	else {
+		return M2M_ERR_BUS_FAIL;
+	}
+
+	WINC1501_SPI.beginTransaction(wifi_SPISettings);
+	digitalWrite(gi8Winc1501CsPin, LOW);
+
+	while (u16Sz) {
+		*pu8Miso = WINC1501_SPI.transfer(*pu8Mosi);
+			
+		u16Sz--;
+		if (!u8SkipMiso)
+			pu8Miso++;
+		if (!u8SkipMosi)
+			pu8Mosi++;
+	}
+
+	digitalWrite(gi8Winc1501CsPin, HIGH);
+	WINC1501_SPI.endTransaction();
+
+	return M2M_SUCCESS;
+}
+
+extern "C" {
+
+/*
+*	@fn		nm_bus_init
+*	@brief	Initialize the bus wrapper
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	M.S.M
+*	@date	28 oct 2013
+*	@version	1.0
+*/
+sint8 nm_bus_init(void * /* pvInitValue */)
+{
+	sint8 result = M2M_SUCCESS;
+
+	/* Configure SPI peripheral. */
+	WINC1501_SPI.begin();
+	
+	/* Configure CS PIN. */
+	pinMode(gi8Winc1501CsPin, OUTPUT);
+	digitalWrite(gi8Winc1501CsPin, HIGH);
+
+	/* Reset WINC1500. */
+	nm_bsp_reset();
+	nm_bsp_sleep(1);
+
+	return result;
+}
+
+/*
+*	@fn		nm_bus_ioctl
+*	@brief	send/receive from the bus
+*	@param[IN]	u8Cmd
+*					IOCTL command for the operation
+*	@param[IN]	pvParameter
+*					Arbitrary parameter depenging on IOCTL
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	M.S.M
+*	@date	28 oct 2013
+*	@note	For SPI only, it's important to be able to send/receive at the same time
+*	@version	1.0
+*/
+sint8 nm_bus_ioctl(uint8 u8Cmd, void* pvParameter)
+{
+	sint8 s8Ret = 0;
+	switch(u8Cmd)
+	{
+		case NM_BUS_IOCTL_RW: {
+			tstrNmSpiRw *pstrParam = (tstrNmSpiRw *)pvParameter;
+			s8Ret = spi_rw(pstrParam->pu8InBuf, pstrParam->pu8OutBuf, pstrParam->u16Sz);
+		}
+		break;
+		default:
+			s8Ret = -1;
+			M2M_ERR("invalide ioclt cmd\n");
+			break;
+	}
+
+	return s8Ret;
+}
+
+/*
+*	@fn		nm_bus_deinit
+*	@brief	De-initialize the bus wrapper
+*	@author	M.S.M
+*	@date	28 oct 2013
+*	@version	1.0
+*/
+sint8 nm_bus_deinit(void)
+{
+	WINC1501_SPI.end();
+	return 0;
+}
+
+/*
+*	@fn			nm_bus_reinit
+*	@brief		re-initialize the bus wrapper
+*	@param [in]	void *config
+*					re-init configuration data
+*	@return		M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author		Dina El Sissy
+*	@date		19 Sept 2012
+*	@version	1.0
+*/
+sint8 nm_bus_reinit(void* /* config */)
+{
+	return M2M_SUCCESS;
+}
+
+} // extern "C"
+

libraries/lwIP_WINC1500/src/common/include/nm_common.h

@@ -0,0 +1,153 @@
+/**
+ *
+ * \file
+ *
+ * \brief WINC Driver Common API Declarations.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _NM_COMMON_H_
+#define _NM_COMMON_H_
+
+#include "bsp/include/nm_bsp.h"
+#include "common/include/nm_debug.h"
+
+/**@defgroup  CommonDefines CommonDefines
+ * @ingroup WlanDefines
+ */
+/**@{*/
+#define M2M_TIME_OUT_DELAY 10000
+
+/*states*/
+#define M2M_SUCCESS         ((sint8)0)
+#define M2M_ERR_SEND		((sint8)-1)
+#define M2M_ERR_RCV			((sint8)-2)
+#define M2M_ERR_MEM_ALLOC	((sint8)-3)
+#define M2M_ERR_TIME_OUT	((sint8)-4)
+#define M2M_ERR_INIT        ((sint8)-5)
+#define M2M_ERR_BUS_FAIL    ((sint8)-6)
+#define M2M_NOT_YET			((sint8)-7)
+#define M2M_ERR_FIRMWARE	((sint8)-8)
+#define M2M_SPI_FAIL		((sint8)-9)
+#define M2M_ERR_FIRMWARE_bURN	 ((sint8)-10)
+#define M2M_ACK				((sint8)-11)
+#define M2M_ERR_FAIL		((sint8)-12)
+#define M2M_ERR_FW_VER_MISMATCH         ((sint8)-13)
+#define M2M_ERR_SCAN_IN_PROGRESS         ((sint8)-14)
+#define M2M_ERR_INVALID_ARG				 ((sint8)-15)
+#define M2M_ERR_INVALID					((sint8)-16)
+
+/*i2c MAASTER ERR*/
+#define I2C_ERR_LARGE_ADDRESS 	  0xE1UL	/*the address exceed the max addressing mode in i2c flash*/
+#define I2C_ERR_TX_ABRT 		  0xE2UL	/*NO ACK from slave*/
+#define I2C_ERR_OVER_SIZE 		  0xE3UL	/**/
+#define ERR_PREFIX_NMIS		      0xE4UL	/*wrong first four byte in flash NMIS*/
+#define ERR_FIRMEWARE_EXCEED_SIZE 0xE5UL	/*Total size of firmware exceed the max size 256k*/
+/**/
+#define PROGRAM_START		0x26961735UL
+#define BOOT_SUCCESS		0x10add09eUL
+#define BOOT_START		    0x12345678UL
+
+
+#define NBIT31				(0x80000000)
+#define NBIT30				(0x40000000)
+#define NBIT29				(0x20000000)
+#define NBIT28				(0x10000000)
+#define NBIT27				(0x08000000)
+#define NBIT26				(0x04000000)
+#define NBIT25				(0x02000000)
+#define NBIT24				(0x01000000)
+#define NBIT23				(0x00800000)
+#define NBIT22				(0x00400000)
+#define NBIT21				(0x00200000)
+#define NBIT20				(0x00100000)
+#define NBIT19				(0x00080000)
+#define NBIT18				(0x00040000)
+#define NBIT17				(0x00020000)
+#define NBIT16				(0x00010000)
+#define NBIT15				(0x00008000)
+#define NBIT14				(0x00004000)
+#define NBIT13				(0x00002000)
+#define NBIT12				(0x00001000)
+#define NBIT11				(0x00000800)
+#define NBIT10				(0x00000400)
+#define NBIT9				(0x00000200)
+#define NBIT8				(0x00000100)
+#define NBIT7				(0x00000080)
+#define NBIT6				(0x00000040)
+#define NBIT5				(0x00000020)
+#define NBIT4				(0x00000010)
+#define NBIT3				(0x00000008)
+#define NBIT2				(0x00000004)
+#define NBIT1				(0x00000002)
+#define NBIT0				(0x00000001)
+
+#define M2M_MAX(A,B)					((A) > (B) ? (A) : (B))
+#define M2M_SEL(x,m1,m2,m3)				((x>1)?((x>2)?(m3):(m2)):(m1))
+#define WORD_ALIGN(val) 				(((val) & 0x03) ? ((val) + 4 - ((val) & 0x03)) : (val))
+
+
+
+#define DATA_PKT_OFFSET	4
+
+#ifndef BIG_ENDIAN
+#define BYTE_0(word)   					((uint8)(((word) >> 0 	) & 0x000000FFUL))
+#define BYTE_1(word)  	 				((uint8)(((word) >> 8 	) & 0x000000FFUL))
+#define BYTE_2(word)   					((uint8)(((word) >> 16) & 0x000000FFUL))
+#define BYTE_3(word)   					((uint8)(((word) >> 24) & 0x000000FFUL))
+#else
+#define BYTE_0(word)   					((uint8)(((word) >> 24) & 0x000000FFUL))
+#define BYTE_1(word)  	 				((uint8)(((word) >> 16) & 0x000000FFUL))
+#define BYTE_2(word)   					((uint8)(((word) >> 8 	) & 0x000000FFUL))
+#define BYTE_3(word)   					((uint8)(((word) >> 0 	) & 0x000000FFUL))
+#endif
+
+/**@}*/
+#ifdef __cplusplus
+     extern "C" {
+ #endif
+NMI_API void m2m_memcpy(uint8* pDst,uint8* pSrc,uint32 sz);
+NMI_API void m2m_memset(uint8* pBuf,uint8 val,uint32 sz);
+NMI_API uint16 m2m_strlen(uint8 * pcStr);
+NMI_API sint8 m2m_memcmp(uint8 *pu8Buff1,uint8 *pu8Buff2 ,uint32 u32Size);
+NMI_API uint8 m2m_strncmp(uint8 *pcS1, uint8 *pcS2, uint16 u16Len);
+NMI_API uint8 * m2m_strstr(uint8 *pcIn, uint8 *pcStr);
+NMI_API uint8 m2m_checksum(uint8* buf, int sz);
+
+#ifdef __cplusplus
+}
+ #endif
+#endif	/*_NM_COMMON_H_*/

libraries/lwIP_WINC1500/src/common/include/nm_debug.h

@@ -0,0 +1,95 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains debug APIs declarations.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _NM_DEBUG_H_
+#define _NM_DEBUG_H_
+
+#include "bsp/include/nm_bsp.h"
+#include "bsp/include/nm_bsp_internal.h"
+
+/**@defgroup  DebugDefines DebugDefines
+ * @ingroup WlanDefines
+ */
+/**@{*/
+
+
+#define M2M_LOG_NONE									0
+#define M2M_LOG_ERROR									1
+#define M2M_LOG_INFO									2
+#define M2M_LOG_REQ										3
+#define M2M_LOG_DBG										4
+
+#if (defined __APS3_CORTUS__)
+#define M2M_LOG_LEVEL									M2M_LOG_INFO
+#else
+#define M2M_LOG_LEVEL									M2M_LOG_REQ
+#endif
+
+
+#define M2M_ERR(...)
+#define M2M_INFO(...)
+#define M2M_REQ(...)
+#define M2M_DBG(...)
+#define M2M_PRINT(...)
+
+#if (CONF_WINC_DEBUG == 1)
+#undef M2M_PRINT
+#define M2M_PRINT(...)							do{CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
+#if (M2M_LOG_LEVEL >= M2M_LOG_ERROR)
+#undef M2M_ERR
+#define M2M_ERR(...)							do{CONF_WINC_PRINTF("(APP)(ERR)[%s][%d]",__FUNCTION__,__LINE__); CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
+#if (M2M_LOG_LEVEL >= M2M_LOG_INFO)
+#undef M2M_INFO
+#define M2M_INFO(...)							do{CONF_WINC_PRINTF("(APP)(INFO)"); CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
+#if (M2M_LOG_LEVEL >= M2M_LOG_REQ)
+#undef M2M_REQ
+#define M2M_REQ(...)							do{CONF_WINC_PRINTF("(APP)(R)"); CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
+#if (M2M_LOG_LEVEL >= M2M_LOG_DBG)
+#undef M2M_DBG
+#define M2M_DBG(...)							do{CONF_WINC_PRINTF("(APP)(DBG)[%s][%d]",__FUNCTION__,__LINE__); CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
+#endif /*M2M_LOG_DBG*/
+#endif /*M2M_LOG_REQ*/
+#endif /*M2M_LOG_INFO*/
+#endif /*M2M_LOG_ERROR*/
+#endif /*CONF_WINC_DEBUG */
+
+/**@}*/
+#endif /* _NM_DEBUG_H_ */

libraries/lwIP_WINC1500/src/common/source/nm_common.c

@@ -0,0 +1,136 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains common APIs declarations.
+ *
+ * Copyright (c) 2016 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+#include "common/include/nm_common.h"
+
+void m2m_memcpy(uint8* pDst,uint8* pSrc,uint32 sz)
+{
+	if(sz == 0) return;
+	do
+	{
+		*pDst = *pSrc;
+		pDst++;
+		pSrc++;
+	}while(--sz);
+}
+uint8 m2m_checksum(uint8* buf, int sz)
+{
+	uint8 cs = 0;
+	while(--sz)
+	{
+		cs ^= *buf;
+		buf++;
+	}
+
+	return cs;
+}
+
+void m2m_memset(uint8* pBuf,uint8 val,uint32 sz)
+{
+	if(sz == 0) return;
+	do
+	{
+		*pBuf = val;
+		pBuf++;
+	}while(--sz);
+}
+
+uint16 m2m_strlen(uint8 * pcStr)
+{
+	uint16	u16StrLen = 0;
+	while(*pcStr)
+	{
+		u16StrLen ++;
+		pcStr++;
+	}
+	return u16StrLen;
+}
+
+uint8 m2m_strncmp(uint8 *pcS1, uint8 *pcS2, uint16 u16Len)
+{
+    for ( ; u16Len > 0; pcS1++, pcS2++, --u16Len)
+	if (*pcS1 != *pcS2)
+	    return ((*(uint8 *)pcS1 < *(uint8 *)pcS2) ? -1 : +1);
+	else if (*pcS1 == '\0')
+	    return 0;
+    return 0;
+}
+
+/* Finds the occurance of pcStr in pcIn.
+If pcStr is part of pcIn it returns a valid pointer to the start of pcStr within pcIn.
+Otherwise a NULL Pointer is returned.
+*/
+uint8 * m2m_strstr(uint8 *pcIn, uint8 *pcStr)
+{
+    uint8 u8c;
+    uint16 u16StrLen;
+
+    u8c = *pcStr++;
+    if (!u8c)
+        return (uint8 *) pcIn;	// Trivial empty string case
+
+    u16StrLen = m2m_strlen(pcStr);
+    do {
+        uint8 u8Sc;
+
+        do {
+            u8Sc = *pcIn++;
+            if (!u8Sc)
+                return (uint8 *) 0;
+        } while (u8Sc != u8c);
+    } while (m2m_strncmp(pcIn, pcStr, u16StrLen) != 0);
+
+    return (uint8 *) (pcIn - 1);
+}
+
+sint8 m2m_memcmp(uint8 *pu8Buff1,uint8 *pu8Buff2 ,uint32 u32Size)
+{
+	uint32	i;
+	sint8		s8Result = 0;
+	for(i	 = 0 ; i < u32Size ; i++)
+	{
+		if(pu8Buff1[i] != pu8Buff2[i])
+		{
+			s8Result = 1;
+			break;
+		}
+	}
+	return s8Result;
+}

libraries/lwIP_WINC1500/src/driver/include/ecc_types.h

@@ -0,0 +1,245 @@
+/**
+ *
+ * \file
+ *
+ * \brief WINC Application Interface Internal Types.
+ *
+ * Copyright (c) 2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+ 
+#ifndef __ECC_TYPES_H__
+#define __ECC_TYPES_H__
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+INCLUDES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+#include "m2m_types.h"
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+MACROS
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+
+
+#define ECC_LARGEST_CURVE_SIZE						(32)
+/*!<	
+	The size of the the largest supported EC. For now, assuming
+	the 256-bit EC is the largest supported curve type.
+*/
+
+
+#define ECC_POINT_MAX_SIZE							ECC_LARGEST_CURVE_SIZE
+/*!<
+	Maximum size of one coordinate of an EC point.
+*/
+
+
+#define ECC_POINT_MAX_SIZE_WORDS					(ECC_POINT_MAX_SIZE / 4)
+/*!<
+	SIZE in 32-bit words.
+*/
+
+#if 0
+#define ECC_NUM_SUPP_CURVES							((sizeof(gastrECCSuppList)) / (sizeof(tstrEllipticCurve)))
+#endif
+/*!<
+*/
+
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+DATA TYPES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+
+/*!
+@enum	\
+	tenuEcNamedCurve
+
+@brief	EC Named Curves
+
+	Defines a list of supported ECC named curves.
+*/
+typedef enum EcNamedCurve{
+	EC_SECP192R1		= 19,
+	/*!<
+		It is defined by NIST as P192 and by the SEC Group as secp192r1.
+	*/
+	EC_SECP256R1		= 23,
+	/*!<
+		It is defined by NIST as P256 and by the SEC Group as secp256r1.
+	*/
+	EC_SECP384R1		= 24,
+	/*!<
+		It is defined by NIST as P384 and by the SEC Group as secp384r1.
+	*/
+	EC_SECP521R1		= 25,
+	/*!<
+		It is defined by NIST as P521 and by the SEC Group as secp521r1.
+	*/
+	EC_UNKNOWN			= 255
+}tenuEcNamedCurve;
+
+
+/*!
+@struct	\
+	tstrECPoint
+
+@brief	Elliptic Curve point representation	
+*/
+typedef struct EcPoint{
+	uint8	X[ECC_POINT_MAX_SIZE];
+	/*!<
+		The X-coordinate of the ec point.
+	*/
+	uint8	Y[ECC_POINT_MAX_SIZE];
+	/*!<
+		The Y-coordinate of the ec point.
+	*/
+	uint16	u16Size;
+	/*!<
+		Point size in bytes (for each of the coordinates).
+	*/
+	uint16	u16PrivKeyID;
+	/*!<
+		ID for the corresponding private key.
+	*/
+}tstrECPoint;
+
+
+/*!
+@struct	\
+	tstrECDomainParam
+	
+@brief	ECC Curve Domain Parameters
+
+	The structure defines the ECC domain parameters for curves defined over prime finite fields.
+*/
+typedef struct EcDomainParam{
+	uint32		p[ECC_POINT_MAX_SIZE_WORDS];
+	uint32		a[ECC_POINT_MAX_SIZE_WORDS];
+	uint32		b[ECC_POINT_MAX_SIZE_WORDS];
+	tstrECPoint	G;
+}tstrECDomainParam;
+
+
+/*!
+@struct	\
+	tstrEllipticCurve
+
+@brief
+	Definition of an elliptic curve
+*/
+typedef struct{
+	tenuEcNamedCurve	enuType;
+	tstrECDomainParam	strParam;
+}tstrEllipticCurve;
+
+
+typedef enum{
+	ECC_REQ_NONE,
+	ECC_REQ_CLIENT_ECDH,
+	ECC_REQ_SERVER_ECDH,
+	ECC_REQ_GEN_KEY,
+	ECC_REQ_SIGN_GEN,
+	ECC_REQ_SIGN_VERIFY
+}tenuEccREQ;
+
+
+typedef struct{
+	tstrECPoint	strPubKey;
+	uint8		au8Key[ECC_POINT_MAX_SIZE];
+}tstrEcdhReqInfo;
+
+
+typedef struct{
+	uint32	u32nSig;
+}tstrEcdsaVerifyReqInfo;
+
+
+typedef struct{
+	uint16	u16CurveType;
+	uint16	u16HashSz;
+}tstrEcdsaSignReqInfo;
+
+
+typedef struct{
+	uint16		u16REQ;
+	uint16		u16Status;
+	uint32		u32UserData;
+	uint32		u32SeqNo;
+	union{
+		tstrEcdhReqInfo			strEcdhREQ;
+		tstrEcdsaSignReqInfo	strEcdsaSignREQ;
+		tstrEcdsaVerifyReqInfo	strEcdsaVerifyREQ;
+	};
+}tstrEccReqInfo;
+
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+GLOBALS
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+#if 0
+static tstrEllipticCurve	gastrECCSuppList[] = {
+	{
+		EC_SECP256R1,
+		{
+			{0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0xFFFFFFFF},
+			{0xFFFFFFFC, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0xFFFFFFFF},
+			{0x27D2604B, 0x3BCE3C3E, 0xCC53B0F6, 0x651D06B0, 0x769886BC, 0xB3EBBD55, 0xAA3A93E7, 0x5AC635D8},
+			{
+				{
+					0x6B, 0x17, 0xD1, 0xF2, 0xE1, 0x2C, 0x42, 0x47, 0xF8, 0xBC, 0xE6, 0xE5, 0x63, 0xA4, 0x40, 0xF2,
+					0x77, 0x03, 0x7D, 0x81, 0x2D, 0xEB, 0x33, 0xA0, 0xF4, 0xA1, 0x39, 0x45, 0xD8, 0x98, 0xC2, 0x96
+				},
+				{
+					0x4F, 0xE3, 0x42, 0xE2, 0xFE, 0x1A, 0x7F, 0x9B, 0x8E, 0xE7, 0xEB, 0x4A, 0x7C, 0x0F, 0x9E, 0x16,
+					0x2B, 0xCE, 0x33, 0x57, 0x6B, 0x31, 0x5E, 0xCE, 0xCB, 0xB6, 0x40, 0x68, 0x37, 0xBF, 0x51, 0xF5
+				},
+				32
+			}
+		}
+	}
+};
+#endif
+
+/*!<
+	List of supported Elliptic Curves ordered by security level (most secure curve is at index ZERO).
+*/
+
+
+
+#endif /* __ECC_TYPES_H__ */

libraries/lwIP_WINC1500/src/driver/include/m2m_ate_mode.h

@@ -0,0 +1,732 @@
+/**
+ *
+ * \file
+ *
+ * \brief WINC ATE Test Driver Interface.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifdef _M2M_ATE_FW_
+
+#ifndef _M2M_ATE_MODE_H_
+#define _M2M_ATE_MODE_H_
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+INCLUDES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+#include "common/include/nm_common.h"
+#include "driver/include/m2m_types.h"
+
+/** \defgroup m2m_ate ATE
+*/
+/**@defgroup  ATEDefine Defines
+ * @ingroup m2m_ate
+ * @{
+ */
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+MACROS
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+#define M2M_ATE_MAX_NUM_OF_RATES		(20)
+/*!<
+Maximum number of all rates (b,g and n)
+ */
+#define M2M_ATE_MAX_FRAME_LENGTH		(1024)
+/*!< Maximum number of length for each frame
+ */
+#define M2M_ATE_MIN_FRAME_LENGTH		(1)
+/*!< Minimum number of length for each frame
+ */ 
+#define M2M_ATE_SUCCESS					(M2M_SUCCESS)
+/*!< No Error and operation has been completed successfully.
+*/
+#define M2M_ATE_ERR_VALIDATE			(M2M_ERR_FAIL)	
+/*!< Error in parameters passed to functions.
+ */
+#define M2M_ATE_ERR_TX_ALREADY_RUNNING	(-1)
+/*!< Error in starting a transmission test. Another test is already running and its not allowed to start another ATE test.
+ */
+#define M2M_ATE_ERR_RX_ALREADY_RUNNING	(-2)			
+/*!< Error in starting a reception test. Another test is already running and its not allowed to start another ATE test.
+ */
+#define M2M_ATE_ERR_UNHANDLED_CASE		(-3)	
+/*!< Invalid case.
+ */
+#define M2M_ATE_RX_DISABLE_DA          		0x0
+/*!< Filter selection for received frames: Disable filtering received frames by the destination address.
+ */
+#define M2M_ATE_RX_ENABLE_DA          		0x1
+/*!< Filter selection for received frames: Enable filtering received frames by the destination address.
+ */
+#define M2M_ATE_RX_DISABLE_SA          		0x0
+/*!< Filter selection for received frames: Disable filtering received frames by the source address.
+ */
+#define M2M_ATE_RX_ENABLE_SA          		0x1
+/*!< Filter selection for received frames: Enable filtering received frames by the source address.
+ */
+#define M2M_ATE_DISABLE_SELF_MACADDR       0x0
+/*!<Disable setting a new mac address through the ATE test application and use the pre-set mac address in the firmware.
+ */
+#define M2M_ATE_SET_SELF_MACADDR         	0x1
+/*!<Enable setting a new mac address through the ATE test application and use the pre-set mac address.
+ */
+#define M2M_ATE_TX_DUTY_MAX_VALUE	M2M_ATE_TX_DUTY_1
+/*!< The maximum value of duty cycle
+*/
+#define M2M_ATE_TX_DUTY_MIN_VALUE	M2M_ATE_TX_DUTY_10
+/*!< The minimum value of duty cycle
+*/
+  //@}
+/**@defgroup  ATEDataTypes DataTypes
+ * @ingroup m2m_ate
+ * @{
+ */
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+DATA TYPES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+/*!
+ *@enum		tenuM2mAteFwState	
+ *@brief	Enumeration used to change ATE firmware states
+ */
+typedef enum {
+	M2M_ATE_FW_STATE_STOP			= 0x00,
+	/*!< State to stop ATE firmware
+	 */
+	M2M_ATE_FW_STATE_RUN			= 0x01,
+	/*!< State to run ATE firmware
+	 */
+}tenuM2mAteFwState;
+
+/*!
+ *@enum		tenuM2mAteTxRates	
+ *@brief	Enumeration used to index the TX rates that can be used during the transmission test.
+ */
+typedef enum {
+	M2M_ATE_TX_RATE_1_Mbps_INDEX	= 0x00,
+	M2M_ATE_TX_RATE_2_Mbps_INDEX	= 0x01,
+	M2M_ATE_TX_RATE_55_Mbps_INDEX	= 0x02,
+	M2M_ATE_TX_RATE_11_Mbps_INDEX	= 0x03,
+	/*!< B-Rates
+	 */
+	M2M_ATE_TX_RATE_6_Mbps_INDEX	= 0x04,
+	M2M_ATE_TX_RATE_9_Mbps_INDEX	= 0x05,
+	M2M_ATE_TX_RATE_12_Mbps_INDEX	= 0x06,
+	M2M_ATE_TX_RATE_18_Mbps_INDEX	= 0x07,
+	M2M_ATE_TX_RATE_24_Mbps_INDEX	= 0x08,
+	M2M_ATE_TX_RATE_36_Mbps_INDEX	= 0x09,
+	M2M_ATE_TX_RATE_48_Mbps_INDEX	= 0x0A,
+	M2M_ATE_TX_RATE_54_Mbps_INDEX	= 0x0B,
+	/*!< G-Rates
+	 */
+	M2M_ATE_TX_RATE_MCS_0_INDEX		= 0x0C,
+	M2M_ATE_TX_RATE_MCS_1_INDEX		= 0x0D,
+	M2M_ATE_TX_RATE_MCS_2_INDEX		= 0x0E,
+	M2M_ATE_TX_RATE_MCS_3_INDEX		= 0x0F,
+	M2M_ATE_TX_RATE_MCS_4_INDEX		= 0x10,
+	M2M_ATE_TX_RATE_MCS_5_INDEX		= 0x11,
+	M2M_ATE_TX_RATE_MCS_6_INDEX		= 0x12,
+	M2M_ATE_TX_RATE_MCS_7_INDEX		= 0x13,
+	/*!< N-Rates
+	 */
+}tenuM2mAteTxIndexOfRates;
+
+/*!
+ *@enum		tenuM2mAteTxDutyCycle	
+ *@brief	Enumeration used to index the TX duty cycle that can be used during the transmission test.
+ */
+typedef enum {
+	M2M_ATE_TX_DUTY_1				= 0x01,
+	M2M_ATE_TX_DUTY_2				= 0x02,
+	M2M_ATE_TX_DUTY_3				= 0x03,
+	M2M_ATE_TX_DUTY_4				= 0x04,
+	M2M_ATE_TX_DUTY_5				= 0x05,
+	M2M_ATE_TX_DUTY_6				= 0x06,
+	M2M_ATE_TX_DUTY_7				= 0x07,
+	M2M_ATE_TX_DUTY_8				= 0x08,
+	M2M_ATE_TX_DUTY_9				= 0x09,
+	M2M_ATE_TX_DUTY_10				= 0xA0,
+}tenuM2mAteTxDutyCycle;
+
+/*!
+ *@enum		tenuM2mAteTxDpdControl	
+ *@brief	Enumeration for the allowed Digital-pre distortion(DPD) control values.
+ */
+typedef enum {
+	M2M_ATE_TX_DPD_DYNAMIC	= 0x00,
+	/*!< Dynamic mode indicates that DPD values will be set dynamically from a lookup table pre-set with the DPD coefficents.
+	*/
+	M2M_ATE_TX_DPD_BYPASS	= 0x01,
+	/*!< Bypass mode indicates that the DPD control will be bypassed.
+	*/
+	M2M_ATE_TX_DPD_ENABLED	= 0x02,
+	/*!< Enabled mode allows the tester to manually set the DPD coefficients.
+	*/
+}tenuM2mAteTxDpdControl;
+
+/*!
+ *@enum		tenuM2mAteTxGainSetting	
+ *@brief	Enumeration for the allowed TX gain selection modes.
+ */
+typedef enum {
+	M2M_ATE_TX_GAIN_DYNAMIC	= 0x00,
+	/*!< Dynamic mode indicates that Tx gain values for the digital gain,pa and ppa, will be set dynamically from a lookup table based on the Tx_rate configured.
+	*/
+	M2M_ATE_TX_GAIN_BYPASS	= 0x01,
+	/*!< Bypass mode indicates that Tx gain configurations will be bypassed.
+	*/
+	M2M_ATE_TX_GAIN_FCC		= 0x02,
+	/*!< Using the FCC tx gain configuration indicates that the tx gain values will be used from the FCC flashed table(pre-configured values from a customer).
+	*/
+	M2M_ATE_TX_GAIN_TELEC	= 0x03,
+	/*!< Using the TELEC tx gain configuration indicates that the tx gain values will be used from the TELEC flashed table(pre-configured values from a customer).
+	*/
+}tenuM2mAteTxGainSetting;
+
+/*!
+ *@enum		tenuM2mAtePMUSetting	
+ *@brief	Used to Enable PMU or disable it
+ */
+typedef enum {
+	M2M_ATE_PMU_DISBLE	= 0x00,
+	/*!< Disable using PMU mode
+	*/
+	M2M_ATE_PMU_ENABLE	= 0x01,
+	/*!< Enable using PMU mode
+	*/
+}tenuM2mAtePMUSetting;
+
+/*!
+ *@enum	 tenuM2mAteTxSource	
+ *@brief	Used to define the Tx source, either PHY mode or MAC mode.
+ */
+typedef enum {
+	M2M_ATE_TX_SRC_MAC	= 0x00,
+	/*!< When the TX Source is set to MAC, it indicates that the TX frames are manually framed and sent from the MAC layer
+	*/
+	M2M_ATE_TX_SRC_PHY	= 0x01,
+	/*!< When the TX source is set to PHY, it indicates that transmission sequence occurs from PHY layer in the form of  pulses
+	*/
+}tenuM2mAteTxSource;
+
+/*!
+ *@enum	tenuM2mAteTxMode	
+ *@brief	Used to define the mode of PHY TX transmission source: Continuous Wave(CW) or Normal(i.e CW is disabled) TX sequence
+ */
+typedef enum {
+	M2M_ATE_TX_MODE_NORM	= 0x00,
+	/*!< When the TX source is set to PHY,normal mode indicates that continous transmission is disabled. 
+	*/
+	M2M_ATE_TX_MODE_CW		= 0x01,
+	/*!< When the TX source is set to PHY, continous mode indicates that transmission sequences occur back to back in a continous wave from the PHY layer.
+	*/
+}tenuM2mAteTxMode;
+
+/*!
+ *@enum		tenuM2mAteRxPwrMode	
+ *@brief	Used to define type of RX mode either high power or low power
+ */
+typedef enum {
+	M2M_ATE_RX_PWR_HIGH	= 0x00,
+	/*!< Indicates that receive mode is operating at high power
+	*/	
+	M2M_ATE_RX_PWR_LOW	= 0x01,
+	/*!< Indicates that receive mode is operating at low power
+	*/
+}tenuM2mAteRxPwrMode;
+
+/*!
+ *@enum		tenuM2mAteChannels	
+ *@brief	Available channels for TX and RX in the 2.4GHz spectrum starting at 2412MHz with a 5MHz bandwidth.
+ */
+typedef enum {
+	M2M_ATE_CHANNEL_1	= 0x01,
+	/*!< Channel 1: 2412MHz
+	 */
+	M2M_ATE_CHANNEL_2	= 0x02,
+	/*!< Channel 2: 2417MHz
+	 */
+	M2M_ATE_CHANNEL_3	= 0x03,
+	/*!< Channel 3: 2422MHz
+	 */
+	M2M_ATE_CHANNEL_4	= 0x04,
+	/*!< Channel 4: 2427MHz
+	 */
+	M2M_ATE_CHANNEL_5	= 0x05,
+	/*!< Channel 5: 2432MHz
+	 */
+	M2M_ATE_CHANNEL_6	= 0x06,
+	/*!< Channel 6: 2437MHz
+	 */
+	M2M_ATE_CHANNEL_7	= 0x07,
+	/*!< Channel 7: 2442MHz
+	 */
+	M2M_ATE_CHANNEL_8	= 0x08,
+	/*!< Channel 8: 2447MHz
+	 */
+	M2M_ATE_CHANNEL_9	= 0x09,
+	/*!< Channel 9: 2452MHz
+	 */
+	M2M_ATE_CHANNEL_10	= 0x0A,
+	/*!< Channel 10: 2462MHz
+	 */
+	M2M_ATE_CHANNEL_11	= 0x0B,
+	/*!< Channel 11: 2467MHz
+	 */
+	M2M_ATE_CHANNEL_12	= 0x0C,
+	/*!< Channel 12: 2472MHz
+	 */
+	M2M_ATE_CHANNEL_13	= 0x0D,
+	/*!< Channel 13: 2472MHz
+	 */
+	M2M_ATE_CHANNEL_14	= 0x0E,
+	/*!< Channel 14: 2484MHz
+	 */
+}tenuM2mAteChannels;
+
+/*!
+ *@struct	tstrM2mAteRxStatus
+ *@brief	Used to save statistics for receive(RX) test case
+ */
+typedef struct {
+	uint32 num_rx_pkts;
+	/*!< Number of total RX packets
+	 */
+	uint32 num_err_pkts;
+	/*!< Number of RX failed packets
+	 */
+	 uint32 num_good_pkts;
+	/*!< Number of RX packets actually received
+	 */
+} tstrM2mAteRxStatus;
+
+/*!
+ *@struct	tstrM2mAteRxStatus
+ *@brief	Used to save recieve test case configuration  
+ *@see    tenuM2mAteRxPwrMode
+ */
+typedef struct {
+	uint8 u8RxPwrMode;
+	/*!< RX power mode review \ref tenuM2mAteRxPwrMode
+	 */
+} tstrM2mAteInit;
+
+/*!
+ *@struct	tstrM2mAteTx
+ *@brief	Used for the transmission(Tx) test configuration.
+ */
+typedef struct {
+	uint32	num_frames;	
+	/*!< Number of frames to be sent where maximum number allowed is 4294967295 ul, and ZERO means infinite number of frames
+	 */
+	uint32	data_rate;
+	/*!< Rate to send packets, to select a rate use values from the enumeration \ref tenuM2mAteTxIndexOfRates and pass it to \ref m2m_ate_get_tx_rate
+	 */
+	uint8	channel_num;
+	/*!< Channel number as enumerated at \ref tenuM2mAteChannels
+	 */
+	uint8    duty_cycle; 
+	/*!< Duty cycle value between from 1 to 10, where maximum = 1, minimum = 10. As enumerated \ref tenuM2mAteTxDutyCycle
+	 */
+	uint16    frame_len;
+    /*!< Use @ref M2M_ATE_MAX_FRAME_LENGTH (1024) as the maximum value while @ref M2M_ATE_MIN_FRAME_LENGTH (1) is the minimum value
+	 */
+	uint8     tx_gain_sel;
+	/*!< TX gain mode selection value \ref tenuM2mAteTxGainSetting
+	 */
+	uint8     dpd_ctrl;
+	/*!< DPD mode value\ref tenuM2mAteTxDpdControl
+	 */
+	uint8     use_pmu;
+	/*!< This is 0 if PMU is not used otherwise it must be be 1 \ref tenuM2mAtePMUSetting
+	 */
+	uint8     phy_burst_tx; 
+	/*!< Source of Burst TX either PHY or MAC \ref tenuM2mAteTxSource
+	 */
+	uint8     cw_tx; 
+	/*!< Mode of Phy TX transmission either normal TX sequence or CW(Continuous Wave) TX sequence \ref tenuM2mAteTxMode
+	 */
+	uint32     xo_offset_x1000; 
+	/*!< Signed XO offset value in Part Per Million(PPM) multiplied by 1000.
+	 */
+	uint8     use_efuse_xo_offset;
+	/*!< Set to 0 to use the XO offset provided in xo_offset_x1000. Set to 1 to use XO offset programmed on WINC efuse. 
+	*/
+	uint8 peer_mac_addr[6];
+	/*!< Set peer address to send directed frames to a certain address.
+	*/
+} tstrM2mAteTx;
+
+/*!
+ *@struct	tstrM2mAteRx
+ *@brief	Used for the reception(Rx) test configuration.
+ */
+typedef struct {
+	uint8		channel_num;
+	/*!< Channel number \ref tenuM2mAteChannels
+	 */
+	uint8     use_pmu;
+	/*!< This is 0 if PMU is not used otherwise it must be be 1 \ref tenuM2mAtePMUSetting
+	 */
+	uint32     xo_offset_x1000; 
+	/*!< Signed XO offset value in PPM (Part Per Million) multiplied by 1000.
+	 */
+	uint8     use_efuse_xo_offset;
+	/*!< Set to 0 to use the XO offset provided in xo_offset_x1000. Set to 1 to use XO offset programmed on WINC efuse. 
+	*/
+	uint8    self_mac_addr[6];
+	/*!< Set to the self mac address required to be overriden. 
+	*/
+	uint8    peer_mac_addr[6];
+	/*!< Set to the source mac address expected to filter frames from. 
+	*/
+	uint8    mac_filter_en_da;
+	/*!< Flag set to enable or disable reception with destination address as a filter. Using the following flags \ref M2M_ATE_RX_ENABLE_DA 
+	\ref M2M_ATE_RX_DISABLE_DA 
+	*/
+	uint8    mac_filter_en_sa;
+	/*!< Flag set to enable or disable reception with source address as a filter.Using the following flags \ref M2M_ATE_RX_ENABLE_SA 
+	\ref M2M_ATE_RX_DISABLE_SA 
+	*/
+	uint8   override_self_mac_addr;
+	/*!< Flag set to enable or disable self mac address feature. Using the following flags \ref M2M_ATE_DISABLE_SELF_MACADDR 
+	\ref M2M_ATE_SET_SELF_MACADDR 
+	*/
+} tstrM2mAteRx;
+  //@}
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+FUNCTION PROTOTYPES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+#ifdef __cplusplus
+     extern "C" {
+#endif
+/**@defgroup  ATEFunction Function
+ * @ingroup m2m_ate
+ * @{
+ */
+/*!
+@fn	\
+	sint8 m2m_ate_init(void);
+
+@brief
+	This function used to download the ATE firmware from flash and start it.
+
+@return
+	The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
+@see
+	m2m_ate_init_param	
+*/
+sint8 m2m_ate_init(void);
+
+
+/*!
+@fn	\
+	sint8 m2m_ate_init(tstrM2mAteInit *pstrInit);
+
+@brief
+	This function is used to download and start the ATE firmware with an initialization value 
+	stating the rx mode power \ref tstrM2mAteInit.
+@param [in]	tstrM2mAteInit *
+	Pointer to a structure \ref tstrM2mAteInit, defining the initial RX mode value.
+@return
+	The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
+@see
+	m2m_ate_init
+*/
+sint8 m2m_ate_init_param(tstrM2mAteInit *pstrInit);
+
+/*!
+@fn	\
+	sint8 m2m_ate_deinit(void);
+
+@brief
+	De-Initialization of ATE firmware mode 
+
+@return
+	The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
+*/
+sint8 m2m_ate_deinit(void);
+
+/*!
+@fn	\
+	sint8 m2m_ate_set_fw_state(uint8);
+
+@brief
+	This function is used to change the ATE firmware status from running to stopped or vice versa.
+
+@param [in]	u8State
+		Required state of the ATE firmware, one of \ref tenuM2mAteFwState enumeration values.
+@return
+	The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
+@see
+	m2m_ate_init
+*/
+sint8 m2m_ate_set_fw_state(uint8);
+
+/*!
+@fn	\
+	sint8 m2m_ate_get_fw_state(uint8);
+
+@brief
+	This function is used to return the status of ATE firmware.
+
+@return
+	The function SHALL return the status of ATE firmware, one of \ref tenuM2mAteFwState enumeration values.
+@see
+	m2m_ate_init, m2m_ate_set_fw_state
+*/
+sint8 m2m_ate_get_fw_state(void);
+
+/*!
+@fn	\
+	uint32 m2m_ate_get_tx_rate(uint8);
+
+@brief
+	This function is used to return value of TX rate required by application developer.
+
+@param [in]	u8Index
+		Index of the required rate , one of \ref tenuM2mAteTxIndexOfRates enumeration values.
+@return
+	The function SHALL return 0 in case of receiving invalid index, otherwise the selected rate value is returned.
+@see
+	tenuM2mAteTxIndexOfRates
+*/
+uint32 m2m_ate_get_tx_rate(uint8);
+
+/*!
+@fn	\
+	sint8 m2m_ate_get_tx_status(void);
+
+@brief
+	This function is used to return the status of TX test case either running or stopped.
+
+@return
+	The function SHALL return the status of ATE firmware, 1 if TX test case is running or 0 if TX test case has been stopped.
+@see
+	m2m_ate_start_tx, m2m_ate_stop_tx
+*/
+sint8 m2m_ate_get_tx_status(void);
+
+/*!
+@fn	\
+	sint8 m2m_ate_start_tx(tstrM2mAteTx *)
+
+@brief
+	This function is used to start the TX test case.
+
+@param [in]	strM2mAteTx
+		Type of \ref tstrM2mAteTx, with the values required to enable TX test case. Application must use \ref m2m_ate_init first.
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+@see
+	m2m_ate_init, m2m_ate_stop_tx, m2m_ate_get_tx_status
+*/
+sint8 m2m_ate_start_tx(tstrM2mAteTx *);
+
+/*!
+@fn	\
+	sint8 m2m_ate_stop_tx(void)
+
+@brief
+	This function is used to stop the TX test case.
+
+@return
+	The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
+@see
+	m2m_ate_init, m2m_ate_start_tx, m2m_ate_get_tx_status
+*/
+sint8 m2m_ate_stop_tx(void);
+
+/*!
+@fn	\
+	sint8 m2m_ate_get_rx_status(uint8);
+
+@brief
+	This function is used to return the status of RX test case either running or stopped.
+
+@return
+	The function SHALL return status of ATE firmware, 1 if RX test case is running or 0 when the test case has been stopped.
+@see
+	m2m_ate_start_rx, m2m_ate_stop_rx
+*/
+sint8 m2m_ate_get_rx_status(void);
+
+/*!
+@fn	\
+	sint8 m2m_ate_start_rx(tstrM2mAteRx *)
+
+@brief
+	This function is used to start RX test case.
+
+@param [in]	strM2mAteRx
+		Type of \ref tstrM2mAteRx, with the values required to enable RX test case. Application must use \ref m2m_ate_init first.
+@return
+	The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
+@see
+	m2m_ate_init, m2m_ate_stop_rx, m2m_ate_get_rx_status
+*/
+sint8 m2m_ate_start_rx(tstrM2mAteRx *);
+
+/*!
+@fn	\
+	sint8 m2m_ate_stop_rx(void)
+
+@brief
+	This function is used to stop RX test case.
+
+@return
+	The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
+@see
+	m2m_ate_init, m2m_ate_start_rx, m2m_ate_get_rx_status
+*/
+sint8 m2m_ate_stop_rx(void);
+
+/*!
+@fn	\
+	sint8 m2m_ate_read_rx_status(tstrM2mAteRxStatus *)
+
+@brief
+	This function is used to read RX statistics from the ATE firmware.
+
+@param [out]	strM2mAteRxStatus
+		Type of \ref tstrM2mAteRxStatus used to save statistics of RX test case. Application must use \ref m2m_ate_start_rx first.
+@return
+	The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
+@see
+	m2m_ate_init, m2m_ate_start_rx
+*/
+sint8 m2m_ate_read_rx_status(tstrM2mAteRxStatus *);
+
+/*!
+@fn	\
+	sint8 m2m_ate_set_dig_gain(double dGaindB)
+
+@brief
+	This function is used to set the digital gain value to the HW registers in dB.
+
+@param [in]	double dGaindB
+		The digital gain value required to be set.
+@return
+	The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
+@see
+m2m_ate_get_dig_gain, m2m_ate_get_pa_gain,m2m_ate_get_ppa_gain,m2m_ate_get_tot_gain
+*/
+sint8 m2m_ate_set_dig_gain(double dGaindB);
+
+/*!
+@fn	\
+	sint8 m2m_ate_get_dig_gain(double * dGaindB)
+
+@brief
+	This function is used to retrieve the digital gain value from the HW registers in dB. 
+	Digital gain is one of the values that are set to calculate the total tx gain value.
+
+@param [out]	double * dGaindB
+		The retrieved digital gain value obtained from HW registers in dB.
+@return
+	The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
+@see
+m2m_ate_set_dig_gain, m2m_ate_get_pa_gain,m2m_ate_get_ppa_gain,m2m_ate_get_tot_gain
+*/
+sint8 m2m_ate_get_dig_gain(double * dGaindB);
+
+/*!
+@fn	\
+	void m2m_ate_set_pa_gain(uint8 gain_db)
+
+@brief
+	This function is used to set the PA gain (18/15/12/9/6/3/0 only)
+
+@param [in]	uint8 gain_db
+		PA gain level allowed (18/15/12/9/6/3/0 only)
+
+*/
+void m2m_ate_set_pa_gain(uint8 gain_db);
+/*!
+@fn	\
+	sint8 m2m_ate_get_pa_gain(double *paGaindB)
+
+@brief
+	This function is used to get the Power Amplifier(PA) gain
+
+@param [out]	double *paGaindB
+	The retrieved PA gain value obtained from HW registers in dB.
+@return
+		The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
+@see
+m2m_ate_set_dig_gain, m2m_ate_get_dig_gain,m2m_ate_get_ppa_gain,m2m_ate_get_tot_gain
+*/
+sint8 m2m_ate_get_pa_gain(double *paGaindB);
+
+/*!
+@fn	\
+	sint8 m2m_ate_get_ppa_gain(double * ppaGaindB)
+
+@brief
+	This function is used to get the Pre-Power Amplifier(PPA) gain
+
+@param [out]	uint32 * ppaGaindB
+		The retrieved PPA gain value obtained from HW registers in dB.
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+@see
+m2m_ate_set_dig_gain, m2m_ate_get_dig_gain,m2m_ate_get_pa_gain,m2m_ate_get_tot_gain
+*/
+sint8 m2m_ate_get_ppa_gain(double * ppaGaindB);
+
+/*!
+@fn	\
+	sint8 m2m_ate_get_tot_gain(double * totGaindB)
+
+@brief
+	This function is used to calculate the total tx gain value
+
+@param [out]	double * totGaindB
+		The retrieved total gain value obtained from calculations made based on the digital gain, PA and PPA gain values.
+@return
+	The function SHALL return @ref M2M_SUCCESS for success and a negative value otherwise.
+@see
+m2m_ate_set_dig_gain, m2m_ate_get_dig_gain,m2m_ate_get_pa_gain,m2m_ate_get_ppa_gain
+*/
+sint8 m2m_ate_get_tot_gain(double * totGaindB);
+   //@}
+	
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _M2M_CONFIG_MODE_H_ */
+
+#endif //_M2M_ATE_FW_

libraries/lwIP_WINC1500/src/driver/include/m2m_crypto.h

@@ -0,0 +1,272 @@
+/**
+ *
+ * \file
+ *
+ * \brief WINC Crypto Application Interface.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef __M2M_CRYPTO_H__
+#define __M2M_CRYPTO_H__
+
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+INCLUDES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+
+#include "common/include/nm_common.h"
+#include "driver/include/m2m_types.h"
+#include "driver/source/m2m_hif.h"
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+MACROS
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+#define M2M_MAX_RSA_LEN					(256)
+#define M2M_SHA256_DIGEST_LEN			32
+#define M2M_SHA256_MAX_DATA				(M2M_BUFFER_MAX_SIZE - M2M_SHA256_CONTEXT_BUFF_LEN - M2M_HIF_HDR_OFFSET)
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+DATA TYPES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+/*!
+@struct	\
+	tstrM2mSha256Ctxt
+
+@brief
+	SHA256 context data
+*/
+typedef struct sha256ctxt{
+	uint32	au32Sha256CtxtBuff[M2M_SHA256_CONTEXT_BUFF_LEN/sizeof(uint32)];
+} tstrM2mSha256Ctxt;
+
+
+
+/*!
+@enum	\
+	tenuRsaSignStatus
+
+@brief
+	RSA Signature status: pass or fail.
+	
+@see
+	m2m_crypto_rsa_sign_gen
+*/
+typedef enum{
+	M2M_RSA_SIGN_OK,
+	M2M_RSA_SIGN_FAIL
+} tenuRsaSignStatus;
+
+/*!
+@typedef \
+	tpfAppCryproCb
+
+@brief			Crypto Calback function receiving the crypto related messages
+@param [in]	u8MsgType
+				Crypto command about which the notification is received.
+@param [in]	pvResp
+				A pointer to the result associated with the notification.  				
+@param [in]	pvMsg
+				A pointer to a buffer containing the notification parameters (if any). It should be
+				Casted to the correct data type corresponding to the notification type.
+@see
+	m2m_crypto_init
+	tenuM2mCryptoCmd
+*/
+typedef void (*tpfAppCryproCb) (uint8 u8MsgType,void * pvResp, void * pvMsg);
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+FUNCTION PROTOTYPES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+
+#ifdef __cplusplus
+     extern "C" {
+#endif
+/*!
+@fn	\
+	sint8 m2m_crypto_init();
+	
+@brief	crypto initialization.
+
+@param[in]	pfAppCryproCb
+				Pointer to the Crypto Calback function receiving the crypto related messages.
+@see
+	tpfAppCryproCb
+	
+@return		
+	The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
+*/
+sint8 m2m_crypto_init(tpfAppCryproCb pfAppCryproCb);
+/*!
+@fn	\
+	sint8 m2m_sha256_hash_init(tstrM2mSha256Ctxt *psha256Ctxt);
+	
+@brief	SHA256 hash initialization
+
+@param[in]	psha256Ctxt
+				Pointer to a sha256 context allocated by the caller.				
+@return		
+	The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
+*/
+sint8 m2m_crypto_sha256_hash_init(tstrM2mSha256Ctxt *psha256Ctxt);
+
+
+/*!
+@fn	\
+	sint8 m2m_sha256_hash_update(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Data, uint16 u16DataLength);
+	
+@brief	SHA256 hash update
+
+@param [in]	psha256Ctxt
+				Pointer to the sha256 context.
+				
+@param [in]	pu8Data
+				Buffer holding the data submitted to the hash.
+				
+@param [in]	u16DataLength
+				Size of the data bufefr in bytes.
+@pre SHA256 module should be initialized first through m2m_crypto_sha256_hash_init function.
+
+@see m2m_crypto_sha256_hash_init
+
+@return		
+	The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
+
+*/
+sint8 m2m_crypto_sha256_hash_update(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Data, uint16 u16DataLength);
+
+
+/*!
+@fn	\
+	sint8 m2m_sha256_hash_finish(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Sha256Digest);
+	
+@brief	SHA256 hash finalization
+
+@param[in]	psha256Ctxt
+				Pointer to a sha256 context allocated by the caller.
+				
+@param [in] pu8Sha256Digest
+				Buffer allocated by the caller which will hold the resultant SHA256 Digest. It must be allocated no less than M2M_SHA256_DIGEST_LEN.
+				
+@return		
+	The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
+*/
+sint8 m2m_crypto_sha256_hash_finish(tstrM2mSha256Ctxt *psha256Ctxt, uint8 *pu8Sha256Digest);
+
+
+/*!
+@fn	\
+	sint8 m2m_rsa_sign_verify(uint8 *pu8N, uint16 u16NSize, uint8 *pu8E, uint16 u16ESize, uint8 *pu8SignedMsgHash, \
+		uint16 u16HashLength, uint8 *pu8RsaSignature);
+	
+@brief	RSA Signature Verification
+
+	The function shall request the RSA Signature verification from the WINC Firmware for the given message. The signed message shall be 
+	compressed to the corresponding hash algorithm before calling this function.
+	The hash type is identified by the given hash length. For example, if the hash length is 32 bytes, then it is SHA256.
+
+@param[in]	pu8N
+				RSA Key modulus n.
+				
+@param[in]	u16NSize
+				Size of the RSA modulus n in bytes.
+				
+@param[in]	pu8E
+				RSA public exponent.
+				
+@param[in]	u16ESize
+				Size of the RSA public exponent in bytes.
+
+@param[in]	pu8SignedMsgHash
+				The hash digest of the signed message.
+				
+@param[in]	u16HashLength
+				The length of the hash digest.
+				
+@param[out] pu8RsaSignature
+				Signature value to be verified.
+				
+@return		
+	The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
+*/
+sint8 m2m_crypto_rsa_sign_verify(uint8 *pu8N, uint16 u16NSize, uint8 *pu8E, uint16 u16ESize, uint8 *pu8SignedMsgHash, 
+						  uint16 u16HashLength, uint8 *pu8RsaSignature);
+
+
+/*!
+@fn	\
+	sint8 m2m_rsa_sign_gen(uint8 *pu8N, uint16 u16NSize, uint8 *pu8d, uint16 u16dSize, uint8 *pu8SignedMsgHash, \
+		uint16 u16HashLength, uint8 *pu8RsaSignature);
+	
+@brief	RSA Signature Generation
+
+	The function shall request the RSA Signature generation from the WINC Firmware for the given message. The signed message shall be 
+	compressed to the corresponding hash algorithm before calling this function.
+	The hash type is identified by the given hash length. For example, if the hash length is 32 bytes, then it is SHA256.
+
+@param[in]	pu8N
+				RSA Key modulus n.
+				
+@param[in]	u16NSize
+				Size of the RSA modulus n in bytes.
+				
+@param[in]	pu8d
+				RSA private exponent.
+				
+@param[in]	u16dSize
+				Size of the RSA private exponent in bytes.
+
+@param[in]	pu8SignedMsgHash
+				The hash digest of the signed message.
+				
+@param[in]	u16HashLength
+				The length of the hash digest.
+				
+@param[out] pu8RsaSignature
+				Pointer to a user buffer allocated by teh caller shall hold the generated signature.
+				
+@return		
+	The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
+*/
+sint8 m2m_crypto_rsa_sign_gen(uint8 *pu8N, uint16 u16NSize, uint8 *pu8d, uint16 u16dSize, uint8 *pu8SignedMsgHash, 
+					   uint16 u16HashLength, uint8 *pu8RsaSignature);
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* __M2M_CRYPTO_H__ */

libraries/lwIP_WINC1500/src/driver/include/m2m_ota.h

@@ -0,0 +1,428 @@
+/**
+ *
+ * \file
+ *
+ * \brief WINC OTA Upgrade API Interface.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef __M2M_OTA_H__
+#define __M2M_OTA_H__
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+INCLUDES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+#include "common/include/nm_common.h"
+#include "driver/include/m2m_types.h"
+#include "driver/source/nmdrv.h"
+/**@addtogroup WlanEnums DataTypes
+ * @ingroup m2m_wifi
+ */
+ /* @{ */
+
+
+/*!
+@typedef void (*tpfOtaNotifCb) (tstrOtaUpdateInfo *);
+
+@brief 	
+		A callback to get notification about a potential OTA update.
+ 
+@param[in] pstrOtaUpdateInfo 
+		A structure to provide notification payload.
+@sa 
+	tstrOtaUpdateInfo
+@warning 
+		The notification is not supported (Not implemented yet)
+
+*/
+typedef void (*tpfOtaNotifCb) (tstrOtaUpdateInfo * pstrOtaUpdateInfo);
+
+
+/*!
+@typedef void (*tpfOtaUpdateCb) (uint8 u8OtaUpdateStatusType ,uint8 u8OtaUpdateStatus);
+
+@brief 
+   A callback to get OTA status update, the callback provide the status type and its status.
+   The OTA callback provides the download status, the switch to the downloaded firmware status and roll-back status. 
+ 
+@param[in] u8OtaUpdateStatusType Possible values are listed in tenuOtaUpdateStatusType.
+
+@param[in] u8OtaUpdateStatus Possible values are listed as enumerated by @ref tenuOtaUpdateStatus. 
+
+@see
+	tenuOtaUpdateStatusType
+	tenuOtaUpdateStatus
+ */
+typedef void (*tpfOtaUpdateCb) (uint8 u8OtaUpdateStatusType ,uint8 u8OtaUpdateStatus);
+ /**@}*/
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+FUNCTION PROTOTYPES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+#ifdef __cplusplus
+     extern "C" {
+#endif
+
+/** @defgroup OtaInitFn m2m_ota_init
+ *  @ingroup WLANAPI
+* Synchronous initialization function for the OTA layer by registering the update callback.
+* The notification callback is not supported at the current version. Calling this API is a
+* MUST for all the OTA API's.
+
+ */
+ /**@{*/
+/*!
+@fn	\
+	NMI_API sint8  m2m_ota_init(tpfOtaUpdateCb  pfOtaUpdateCb,tpfOtaNotifCb  pfOtaNotifCb)
+
+@param [in]	pfOtaUpdateCb
+				OTA Update callback function
+				
+@param [in]	pfOtaNotifCb
+				OTA notify callback function 
+
+@return		
+	The function returns @ref M2M_SUCCESS for successful operations  and a negative value otherwise.
+*/
+NMI_API sint8  m2m_ota_init(tpfOtaUpdateCb  pfOtaUpdateCb,tpfOtaNotifCb  pfOtaNotifCb);
+ /**@}*/
+ 
+ /** @defgroup OtaNotifStFn m2m_ota_notif_set_url
+ *  @ingroup WLANAPI
+ * Set the OTA notification server URL, the functions need to be called before any check for update
+ */
+ /**@{*/
+/*!
+@fn	\
+	NMI_API sint8  m2m_ota_notif_set_url(uint8 * u8Url);
+
+@param [in]	u8Url
+			 Set the OTA notification server URL, the functions need to be called before any check for update.
+@warning 
+			Calling m2m_ota_init is required
+			Notification Server is not supported in the current version (function is not implemented)
+@see    
+			m2m_ota_init			
+@return		
+	The function returns @ref M2M_SUCCESS for successful operations  and a negative value otherwise.
+*/
+NMI_API sint8  m2m_ota_notif_set_url(uint8 * u8Url);
+ /**@}*/
+ /** @defgroup OtaNotifCheckFn m2m_ota_notif_check_for_update
+ *  @ingroup WLANAPI
+ * Synchronous function to check for the OTA update using the Notification Server
+ * URL. Function is not implemented (not supported at the current version)
+ *
+ */
+  /**@{*/
+/*!
+@fn	\
+	NMI_API sint8  m2m_ota_notif_check_for_update(void);
+
+@warning 
+		Function is not implemented (not supported at the current version)
+		
+@sa   
+			m2m_ota_init
+			m2m_ota_notif_set_url
+@return		
+	The function returns @ref M2M_SUCCESS for successful operations  and a negative value otherwise.
+*/
+NMI_API sint8  m2m_ota_notif_check_for_update(void);
+ /**@}*/
+ /** @defgroup OtaSched m2m_ota_notif_sched
+*  @ingroup WLANAPI
+* Schedule OTA notification Server check for update request after specific number of days
+*/
+  /**@{*/
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_notif_sched(uint32 u32Period);
+
+
+@param [in]	u32Period
+			Period in days
+
+@sa 
+		m2m_ota_init
+		m2m_ota_notif_check_for_update
+		m2m_ota_notif_set_url
+@return		
+	The function returns @ref M2M_SUCCESS for successful operations  and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_notif_sched(uint32 u32Period);
+  /**@}*/
+/** @defgroup OtaStartUpdatefn m2m_ota_start_update
+*  @ingroup WLANAPI
+*	Request OTA start update using the downloaded URL, the OTA module will download the OTA image and ensure integrity of the image, 
+*   and update the validity of the image in control structure. Switching to that image requires calling @ref m2m_ota_switch_firmware API. 
+*   As a prerequisite @ref m2m_ota_init should be called before using @ref m2m_ota_start().
+*/
+  /**@{*/
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_start_update(uint8 * u8DownloadUrl);
+
+@param [in]	u8DownloadUrl
+		The download firmware URL, you get it from device info according to the application server
+
+@warning
+	Calling this API does not guarantee OTA WINC image update, It depends on the connection with the download server and the validity of the image.
+	If the API response is failure this may invalidate the roll-back image if it was previously valid, since the WINC does not have any internal memory 
+	except the flash roll-back image location to validate the downloaded image from
+				
+@see		
+		m2m_ota_init
+		tpfOtaUpdateCb
+		
+@return		
+	The function returns @ref M2M_SUCCESS for successful operations  and a negative value otherwise.
+\section Example
+   The example shows an example of how the OTA image update is carried out.
+@code
+static void OtaUpdateCb(uint8 u8OtaUpdateStatusType ,uint8 u8OtaUpdateStatus)
+{
+	if(u8OtaUpdateStatusType == DL_STATUS) {
+		if(u8OtaUpdateStatus == OTA_STATUS_SUCSESS) {
+			//switch to the upgraded firmware
+			m2m_ota_switch_firmware();
+		}
+	}
+	else if(u8OtaUpdateStatusType == SW_STATUS) {
+		if(u8OtaUpdateStatus == OTA_STATUS_SUCSESS) {
+			M2M_INFO("Now OTA successfully done");
+			//start the host SW upgrade then system reset is required (Reinitialize the driver)
+		}
+	}
+}
+void wifi_event_cb(uint8 u8WiFiEvent, void * pvMsg)
+{
+	case M2M_WIFI_REQ_DHCP_CONF:
+	{
+		//after successfully connection, start the over air upgrade
+		m2m_ota_start_update(OTA_URL);
+	}
+	break;
+	default:
+	break;
+}
+int main (void)
+{
+	tstrWifiInitParam param;
+	tstr1xAuthCredentials gstrCred1x    = AUTH_CREDENTIALS;
+	nm_bsp_init();
+	
+	m2m_memset((uint8*)&param, 0, sizeof(param));
+	param.pfAppWifiCb = wifi_event_cb;
+	
+	//Initialize the WINC Driver
+	ret = m2m_wifi_init(&param);
+	if (M2M_SUCCESS != ret)
+	{
+		M2M_ERR("Driver Init Failed <%d>\n",ret);
+		while(1);
+	}
+	//Initialize the OTA module
+	m2m_ota_init(OtaUpdateCb,NULL);
+	//connect to AP that provide connection to the OTA server
+	m2m_wifi_default_connect();
+
+	while(1)
+	{
+		
+		//Handle the app state machine plus the WINC event handler                                                                     
+		while(m2m_wifi_handle_events(NULL) != M2M_SUCCESS) {
+			
+		}
+		
+	}
+}
+@endcode		
+
+*/
+NMI_API sint8 m2m_ota_start_update(uint8 * u8DownloadUrl);
+    /**@}*/
+/** @defgroup OtaStartUpdatefn m2m_ota_start_update_crt
+*  @ingroup WLANAPI
+*	Request OTA start for cortus application image using the downloaded URL, the OTA module will download the OTA image and ensure integrity of the image, 
+*   and update the validity of the image in control structure. Switching to that image requires calling @ref m2m_ota_switch_crt API. 
+*   As a prerequisite @ref m2m_ota_init should be called before using @ref m2m_ota_start_update_crt().
+*/
+  /**@{*/
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_start_update_crt(uint8 * u8DownloadUrl);
+
+@param [in]	u8DownloadUrl
+		The cortus application image url.
+@warning
+	Calling this API does not guarantee cortus application image update, It depends on the connection with the download server and the validity of the image.
+	If the API response is failure this may invalidate the roll-back image if it was previously valid, since the WINC does not have any internal memory 
+	except the flash roll-back image location to validate the downloaded image from
+				
+@see		
+		m2m_ota_init
+		tpfOtaUpdateCb
+		
+@return		
+	The function returns @ref M2M_SUCCESS for successful operations  and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_start_update_crt(uint8 * u8DownloadUrl);
+  /**@}*/
+/** @defgroup OtaRollbackfn m2m_ota_rollback
+*  @ingroup WLANAPI
+	Request OTA Roll-back to the old (other) WINC image, the WINC firmware will check the validation of the Roll-back image
+	and switch to it if it is valid.
+	If the API response is success, system restart is required (re-initialize the driver with hardware rest) update the host driver version may
+	be required if it is did not match the minimum version supported by the  WINC firmware.
+
+*/
+  /**@{*/
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_rollback(void);
+
+@sa 
+	m2m_ota_init
+	m2m_ota_start_update	
+
+@return		
+	The function returns @ref M2M_SUCCESS for successful operations  and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_rollback(void);
+    /**@}*/
+/** @defgroup OtaRollbackfn m2m_ota_rollback_crt
+*  @ingroup WLANAPI
+	Request Cortus application OTA Roll-back to the old (other) cortus application image, the WINC firmware will check the validation of the Roll-back image
+	and switch to it if it is valid.
+	If the API response is success, system restart is required (re-initialize the driver with hardware rest) update the host driver version may
+	be required.
+
+*/
+  /**@{*/
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_rollback_crt(void);
+
+@sa 
+	m2m_ota_init
+	m2m_ota_start_update_crt	
+
+@return		
+	The function returns @ref M2M_SUCCESS for successful operations  and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_rollback_crt(void);
+  /**@}*/
+/** @defgroup OtaAbortfn m2m_ota_abort
+*  @ingroup WLANAPI
+	Request abort of current OTA download.
+	The WINC firmware will terminate the OTA download if one is in progress.
+	If no download is in progress, the API will respond with failure.
+*/
+  /**@{*/
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_abort(void);
+
+@return
+	The function returns @ref M2M_SUCCESS for successful operation and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_abort(void);
+  /**@}*/
+  /**@}*/
+/** @defgroup OtaSwitchFirmware m2m_ota_switch_firmware
+*  @ingroup WLANAPI
+* Switch to the upgraded Firmware, that API will update the control structure working image to the upgraded image
+  take effect will be on the next system restart
+*/
+  /**@{*/
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_switch_firmware(void);
+
+@warning
+   It is important to note that if the API succeeds, system restart is required (re-initializing the driver with hardware reset) updating the host driver version may be required 
+   if it does not match the minimum driver version supported by the WINC's firmware.
+@sa 
+	m2m_ota_init
+	m2m_ota_start_update
+
+@return		
+	The function returns @ref M2M_SUCCESS for successful operations  and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_switch_firmware(void);
+  /**@}*/
+  /**@}*/
+/** @defgroup OtaSwitchFirmware m2m_ota_switch_crt
+*  @ingroup WLANAPI
+* Switch to the upgraded cortus application, that API will update the control structure working image to the upgraded image
+  take effect will be on the next system restart
+*/
+  /**@{*/
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_switch_firmware(void);
+
+@warning
+   It is important to note that if the API succeeds, system restart is required (re-initializing the driver with hardware reset) updating the host driver version may be required 
+   if it does not match the minimum driver version supported by the WINC's firmware.
+@sa 
+	m2m_ota_init
+	m2m_ota_start_update_crt
+
+@return		
+	The function returns @ref M2M_SUCCESS for successful operations  and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_switch_crt(void);
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_get_firmware_version(void);
+
+@brief
+	Get the OTA Firmware version.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_get_firmware_version(tstrM2mRev *pstrRev);
+  /**@}*/
+NMI_API sint8 m2m_ota_test(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __M2M_OTA_H__ */

libraries/lwIP_WINC1500/src/driver/include/m2m_periph.h

@@ -0,0 +1,411 @@
+/**
+ *
+ * \file
+ *
+ * \brief WINC Peripherals Application Interface.
+ *
+ * Copyright (c) 2016 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _M2M_PERIPH_H_
+#define _M2M_PERIPH_H_
+
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+INCLUDES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+
+#include "common/include/nm_common.h"
+#include "driver/include/m2m_types.h"
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+MACROS
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+DATA TYPES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+/*!
+@struct	\
+	tstrPerphInitParam
+
+@brief
+	Peripheral module initialization parameters.
+*/
+typedef struct {
+	void * arg;
+} tstrPerphInitParam;
+
+
+/*!
+@enum	\
+	tenuGpioNum
+
+@brief
+	A list of GPIO numbers configurable through the m2m_periph module.
+*/
+typedef enum {
+	M2M_PERIPH_GPIO3, /*!< GPIO15 pad	*/
+	M2M_PERIPH_GPIO4, /*!< GPIO16 pad	*/
+	M2M_PERIPH_GPIO5, /*!< GPIO18 pad	*/
+	M2M_PERIPH_GPIO6, /*!< GPIO18 pad	*/
+	M2M_PERIPH_GPIO15, /*!< GPIO15 pad	*/
+	M2M_PERIPH_GPIO16, /*!< GPIO16 pad	*/
+	M2M_PERIPH_GPIO18, /*!< GPIO18 pad	*/
+	M2M_PERIPH_GPIO_MAX
+} tenuGpioNum;
+
+
+/*!
+@enum	\
+	tenuI2cMasterSclMuxOpt
+
+@brief
+	Allowed pin multiplexing options for I2C master SCL signal.
+*/
+typedef enum {
+	M2M_PERIPH_I2C_MASTER_SCL_MUX_OPT_HOST_WAKEUP, /*!< I2C master SCL is avaiable on HOST_WAKEUP. */
+	M2M_PERIPH_I2C_MASTER_SCL_MUX_OPT_SD_DAT3,     /*!< I2C master SCL is avaiable on SD_DAT3 (GPIO 7). */
+	M2M_PERIPH_I2C_MASTER_SCL_MUX_OPT_GPIO13,      /*!< I2C master SCL is avaiable on GPIO 13. */
+	M2M_PERIPH_I2C_MASTER_SCL_MUX_OPT_GPIO4,       /*!< I2C master SCL is avaiable on GPIO 4.*/
+	M2M_PERIPH_I2C_MASTER_SCL_MUX_OPT_I2C_SCL,     /*!< I2C master SCL is avaiable on I2C slave SCL. */
+	M2M_PERIPH_I2C_MASTER_SCL_MUX_OPT_NUM
+} tenuI2cMasterSclMuxOpt;
+
+/*!
+@enum	\
+	tenuI2cMasterSdaMuxOpt
+
+@brief
+	Allowed pin multiplexing options for I2C master SDA signal.
+*/
+typedef enum {
+	M2M_PERIPH_I2C_MASTER_SDA_MUX_OPT_RTC_CLK , /*!< I2C master SDA is avaiable on RTC_CLK. */
+	M2M_PERIPH_I2C_MASTER_SDA_MUX_OPT_SD_CLK,   /*!< I2C master SDA is avaiable on SD_CLK (GPIO 8). */
+	M2M_PERIPH_I2C_MASTER_SDA_MUX_OPT_GPIO14,   /*!< I2C master SDA is avaiable on GPIO 14. */
+	M2M_PERIPH_I2C_MASTER_SDA_MUX_OPT_GPIO6,    /*!< I2C master SDA is avaiable on GPIO 6.*/
+	M2M_PERIPH_I2C_MASTER_SDA_MUX_OPT_I2C_SDA,  /*!< I2C master SDA is avaiable on I2C slave SDA. */
+	M2M_PERIPH_I2C_MASTER_SDA_MUX_OPT_NUM
+} tenuI2cMasterSdaMuxOpt;
+
+
+/*!
+@struct	\
+	tstrI2cMasterInitParam
+
+@brief
+	I2C master configuration parameters.
+@sa
+	tenuI2cMasterSclMuxOpt
+	tenuI2cMasterSdaMuxOpt
+*/
+typedef struct {
+	uint8 enuSclMuxOpt; /*!< SCL multiplexing option. Allowed value are defined in tenuI2cMasterSclMuxOpt  */
+	uint8 enuSdaMuxOpt; /*!< SDA multiplexing option. Allowed value are defined in tenuI2cMasterSdaMuxOpt  */
+	uint8 u8ClkSpeedKHz; /*!< I2C master clock speed in KHz. */
+} tstrI2cMasterInitParam;
+
+/*!
+@enum	\
+	tenuI2cMasterFlags
+
+@brief
+	Bitwise-ORed flags for use in m2m_periph_i2c_master_write and m2m_periph_i2c_master_read
+@sa
+	m2m_periph_i2c_master_write
+	m2m_periph_i2c_master_read
+*/
+typedef enum  {
+    I2C_MASTER_NO_FLAGS          = 0x00,
+	/*!< No flags.  */
+    I2C_MASTER_NO_STOP           = 0x01,
+	/*!< No stop bit after this transaction. Useful for scattered buffer read/write operations. */
+	I2C_MASTER_NO_START          = 0x02,
+	/*!< No start bit at the beginning of this transaction. Useful for scattered buffer read/write operations.*/
+} tenuI2cMasterFlags;
+
+/*!
+@enum	\
+	tenuPullupMask
+
+@brief
+	Bitwise-ORed flags for use in m2m_perph_pullup_ctrl.
+@sa
+	m2m_periph_pullup_ctrl
+
+*/
+typedef enum {
+	M2M_PERIPH_PULLUP_DIS_HOST_WAKEUP     = (1ul << 0),
+	M2M_PERIPH_PULLUP_DIS_RTC_CLK         = (1ul << 1),
+	M2M_PERIPH_PULLUP_DIS_IRQN            = (1ul << 2),
+	M2M_PERIPH_PULLUP_DIS_GPIO_3          = (1ul << 3),
+	M2M_PERIPH_PULLUP_DIS_GPIO_4          = (1ul << 4),
+	M2M_PERIPH_PULLUP_DIS_GPIO_5          = (1ul << 5),
+	M2M_PERIPH_PULLUP_DIS_SD_DAT3         = (1ul << 6),
+	M2M_PERIPH_PULLUP_DIS_SD_DAT2_SPI_RXD = (1ul << 7),
+	M2M_PERIPH_PULLUP_DIS_SD_DAT1_SPI_SSN = (1ul << 9),
+	M2M_PERIPH_PULLUP_DIS_SD_CMD_SPI_SCK  = (1ul << 10),
+	M2M_PERIPH_PULLUP_DIS_SD_DAT0_SPI_TXD = (1ul << 11),
+	M2M_PERIPH_PULLUP_DIS_GPIO_6          = (1ul << 12),
+	M2M_PERIPH_PULLUP_DIS_SD_CLK          = (1ul << 13),
+	M2M_PERIPH_PULLUP_DIS_I2C_SCL         = (1ul << 14),
+	M2M_PERIPH_PULLUP_DIS_I2C_SDA         = (1ul << 15),
+	M2M_PERIPH_PULLUP_DIS_GPIO_11         = (1ul << 16),
+	M2M_PERIPH_PULLUP_DIS_GPIO_12         = (1ul << 17),
+	M2M_PERIPH_PULLUP_DIS_GPIO_13         = (1ul << 18),
+	M2M_PERIPH_PULLUP_DIS_GPIO_14         = (1ul << 19),
+	M2M_PERIPH_PULLUP_DIS_GPIO_15         = (1ul << 20),
+	M2M_PERIPH_PULLUP_DIS_GPIO_16         = (1ul << 21),
+	M2M_PERIPH_PULLUP_DIS_GPIO_17         = (1ul << 22),
+	M2M_PERIPH_PULLUP_DIS_GPIO_18         = (1ul << 23),
+	M2M_PERIPH_PULLUP_DIS_GPIO_19         = (1ul << 24),
+	M2M_PERIPH_PULLUP_DIS_GPIO_20         = (1ul << 25),
+	M2M_PERIPH_PULLUP_DIS_GPIO_21         = (1ul << 26),
+	M2M_PERIPH_PULLUP_DIS_GPIO_22         = (1ul << 27),
+	M2M_PERIPH_PULLUP_DIS_GPIO_23         = (1ul << 28),
+	M2M_PERIPH_PULLUP_DIS_GPIO_24         = (1ul << 29),
+} tenuPullupMask;
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+FUNCTION PROTOTYPES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+
+#ifdef __cplusplus
+     extern "C" {
+#endif
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_periph_init(tstrPerphInitParam * param);
+
+@brief
+	Initialize the NMC1500 peripheral driver module.
+
+@param [in]	param
+				Peripheral module initialization structure. See members of tstrPerphInitParam.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+
+@sa
+	tstrPerphInitParam
+*/
+NMI_API sint8 m2m_periph_init(tstrPerphInitParam * param);
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_periph_gpio_set_dir(uint8 u8GpioNum, uint8 u8GpioDir);
+
+@brief
+	Configure a specific NMC1500 pad as a GPIO and sets its direction (input or output).
+
+@param [in]	u8GpioNum
+				GPIO number. Allowed values are defined in tenuGpioNum.
+
+@param [in]	u8GpioDir
+				GPIO direction: Zero = input. Non-zero = output.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+
+@sa
+	tenuGpioNum
+*/
+NMI_API sint8 m2m_periph_gpio_set_dir(uint8 u8GpioNum, uint8 u8GpioDir);
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_periph_gpio_set_val(uint8 u8GpioNum, uint8 u8GpioVal);
+
+@brief
+	Set an NMC1500 GPIO output level high or low.
+
+@param [in]	u8GpioNum
+				GPIO number. Allowed values are defined in tenuGpioNum.
+
+@param [in]	u8GpioVal
+				GPIO output value. Zero = low, non-zero = high.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+
+@sa
+	tenuGpioNum
+*/
+NMI_API sint8 m2m_periph_gpio_set_val(uint8 u8GpioNum, uint8 u8GpioVal);
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_periph_gpio_get_val(uint8 u8GpioNum, uint8 * pu8GpioVal);
+
+@brief
+	Read an NMC1500 GPIO input level.
+
+@param [in]	u8GpioNum
+				GPIO number. Allowed values are defined in tenuGpioNum.
+
+@param [out] pu8GpioVal
+				GPIO input value. Zero = low, non-zero = high.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+
+@sa
+	tenuGpioNum
+*/
+NMI_API sint8 m2m_periph_gpio_get_val(uint8 u8GpioNum, uint8 * pu8GpioVal);
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_periph_gpio_pullup_ctrl(uint8 u8GpioNum, uint8 u8PullupEn);
+
+@brief
+	Set an NMC1500 GPIO pullup resisitor enable or disable.
+
+@param [in]	u8GpioNum
+				GPIO number. Allowed values are defined in tenuGpioNum.
+
+@param [in] u8PullupEn
+				Zero: pullup disabled. Non-zero: pullup enabled.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+
+@sa
+	tenuGpioNum
+*/
+NMI_API sint8 m2m_periph_gpio_pullup_ctrl(uint8 u8GpioNum, uint8 u8PullupEn);
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_periph_i2c_master_init(tstrI2cMasterInitParam * param);
+
+@brief
+	Initialize and configure the NMC1500 I2C master peripheral.
+
+@param [in]	param
+				I2C master initialization structure. See members of tstrI2cMasterInitParam.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+
+@sa
+	tstrI2cMasterInitParam
+*/
+NMI_API sint8 m2m_periph_i2c_master_init(tstrI2cMasterInitParam * param);
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_periph_i2c_master_write(uint8 u8SlaveAddr, uint8 * pu8Buf, uint16 u16BufLen, uint8 flags);
+
+@brief
+	Write a stream of bytes to the I2C slave device.
+
+@param [in]	u8SlaveAddr
+				7-bit I2C slave address.
+@param [in]	pu8Buf
+				A pointer to an input buffer which contains a stream of bytes.
+@param [in]	u16BufLen
+				Input buffer length in bytes.
+@param [in]	flags
+				Write operation bitwise-ORed flags. See tenuI2cMasterFlags.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+
+@sa
+	tenuI2cMasterFlags
+*/
+NMI_API sint8 m2m_periph_i2c_master_write(uint8 u8SlaveAddr, uint8 * pu8Buf, uint16 u16BufLen, uint8 flags);
+
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_periph_i2c_master_read(uint8 u8SlaveAddr, uint8 * pu8Buf, uint16 u16BufLen, uint16 * pu16ReadLen, uint8 flags);
+
+@brief
+	Write a stream of bytes to the I2C slave device.
+
+@param [in]	u8SlaveAddr
+				7-bit I2C slave address.
+@param [out] pu8Buf
+				A pointer to an output buffer in which a stream of bytes are received.
+@param [in]	u16BufLen
+				Max output buffer length in bytes.
+@param [out] pu16ReadLen
+				Actual number of bytes received.
+@param [in]	flags
+				Write operation bitwise-ORed flags. See tenuI2cMasterFlags.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+
+@sa
+	tenuI2cMasterFlags
+*/
+NMI_API sint8 m2m_periph_i2c_master_read(uint8 u8SlaveAddr, uint8 * pu8Buf, uint16 u16BufLen, uint16 * pu16ReadLen, uint8 flags);
+
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_periph_pullup_ctrl(uint32 pinmask, uint8 enable);
+
+@brief
+	Control the programmable pull-up resistor on the chip pads .
+
+
+@param [in]	pinmask
+				Write operation bitwise-ORed mask for which pads to control. Allowed values are defined in tenuPullupMask.
+
+@param [in]	enable
+				Set to 0 to disable pull-up resistor. Non-zero will enable the pull-up.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+
+@sa
+	tenuPullupMask
+*/
+NMI_API sint8 m2m_periph_pullup_ctrl(uint32 pinmask, uint8 enable);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif /* _M2M_PERIPH_H_ */

libraries/lwIP_WINC1500/src/driver/source/m2m_ate_mode.c

@@ -0,0 +1,826 @@
+/**
+ *
+ * \file
+ *
+ * \brief NMC1500 Peripherials Application Interface.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifdef _M2M_ATE_FW_
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+INCLUDES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+#include "driver/include/m2m_ate_mode.h"
+#include "driver/source/nmasic.h"
+#include "driver/source/nmdrv.h"
+#include "m2m_hif.h"
+#include "driver/source/nmbus.h"
+#include "bsp/include/nm_bsp.h"
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+MACROS
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+#define rInterrupt_CORTUS_0				(0x10a8)
+#define rInterrupt_CORTUS_1				(0x10ac)
+#define rInterrupt_CORTUS_2				(0x10b0)
+
+#define rBurstTx_NMI_TX_RATE				(0x161d00)
+#define rBurstTx_NMI_NUM_TX_FRAMES			(0x161d04)
+#define rBurstTx_NMI_TX_FRAME_LEN			(0x161d08)
+#define rBurstTx_NMI_TX_CW_PARAM			(0x161d0c)
+#define rBurstTx_NMI_TX_GAIN				(0x161d10)
+#define rBurstTx_NMI_TX_DPD_CTRL			(0x161d14)
+#define rBurstTx_NMI_USE_PMU				(0x161d18)
+#define rBurstTx_NMI_TEST_CH				(0x161d1c)
+#define rBurstTx_NMI_TX_PHY_CONT			(0x161d20)
+#define rBurstTx_NMI_TX_CW_MODE				(0x161d24)
+#define rBurstTx_NMI_TEST_XO_OFF			(0x161d28)
+#define rBurstTx_NMI_USE_EFUSE_XO_OFF 		(0x161d2c)
+
+#define rBurstTx_NMI_MAC_FILTER_ENABLE_DA 	(0x161d30)
+#define rBurstTx_NMI_MAC_ADDR_LO_PEER 		(0x161d34)
+#define rBurstTx_NMI_MAC_ADDR_LO_SELF 		(0x161d38)
+#define rBurstTx_NMI_MAC_ADDR_HI_PEER 		(0x161d3c)
+#define rBurstTx_NMI_MAC_ADDR_HI_SELF		(0x161d40)
+#define rBurstTx_NMI_RX_PKT_CNT_SUCCESS 	(0x161d44)
+#define rBurstTx_NMI_RX_PKT_CNT_FAIL 		(0x161d48)
+#define rBurstTx_NMI_SET_SELF_MAC_ADDR 		(0x161d4c)
+#define rBurstTx_NMI_MAC_ADDR_LO_SA 		(0x161d50)
+#define rBurstTx_NMI_MAC_ADDR_HI_SA 		(0x161d54)
+#define rBurstTx_NMI_MAC_FILTER_ENABLE_SA 	(0x161d58)
+
+#define rBurstRx_NMI_RX_ALL_PKTS_CONT	(0x9898)
+#define rBurstRx_NMI_RX_ERR_PKTS_CONT	(0x988c)
+
+#define TX_DGAIN_MAX_NUM_REGS			(4)
+#define TX_DGAIN_REG_BASE_ADDRESS		(0x1240)
+#define TX_GAIN_CODE_MAX_NUM_REGS		(3)
+#define TX_GAIN_CODE_BASE_ADDRESS		(0x1250)
+#define TX_PA_MAX_NUM_REGS				(3)
+#define TX_PA_BASE_ADDRESS				(0x1e58)
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+VARIABLES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+volatile static uint8	gu8AteIsRunning	= 0;	/*!< ATE firmware status, 1 means ATE is running otherwise stopped */
+volatile static uint8	gu8RxState		= 0;	/*!< RX status, 1 means Rx is running otherwise stopped */
+volatile static uint8	gu8TxState		= 0;	/*!< TX status, 1 means Tx is running otherwise stopped */
+volatile static uint32	gaAteFwTxRates[M2M_ATE_MAX_NUM_OF_RATES] =
+{
+	0x01, 0x02, 0x05, 0x0B,							/*B-Rats*/
+	0x06, 0x09, 0x0C, 0x12, 0x18, 0x24, 0x30, 0x36,	/*G-Rats*/
+	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87	/*N-Rats*/
+};
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+STATIC FUNCTIONS
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+static void m2m_ate_set_rx_status(uint8 u8Value)
+{
+	gu8RxState = u8Value;
+}
+
+static void m2m_ate_set_tx_status(uint8 u8Value)
+{
+	gu8TxState = u8Value;
+}
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+FUNCTION IMPLEMENTATION
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+/*!
+@fn	\
+	sint8 m2m_ate_init(void);
+
+@brief
+	This function used to download ATE firmware from flash and start it
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+sint8 m2m_ate_init(void)
+{
+	sint8 s8Ret = M2M_SUCCESS;
+	uint8 u8WifiMode = M2M_WIFI_MODE_ATE_HIGH;
+	
+	s8Ret = nm_drv_init(&u8WifiMode);
+	
+	return s8Ret;
+}
+
+/*!
+@fn	\
+	sint8 m2m_ate_init(tstrM2mAteInit *pstrInit);
+
+@brief
+	This function used to download ATE firmware from flash and start it
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+sint8 m2m_ate_init_param(tstrM2mAteInit *pstrInit)
+{
+	sint8 s8Ret = M2M_SUCCESS;
+	
+	s8Ret = nm_drv_init((void*)&pstrInit->u8RxPwrMode);
+	
+	return s8Ret;
+}
+
+/*!
+@fn	\
+	sint8 m2m_ate_deinit(void);
+
+@brief
+	De-Initialization of ATE firmware mode 
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+sint8 m2m_ate_deinit(void)
+{
+	return nm_drv_deinit(NULL);
+}
+
+/*!
+@fn	\
+	sint8 m2m_ate_set_fw_state(uint8);
+
+@brief
+	This function used to change ATE firmware status from running to stopped or vice versa.
+
+@param [in]	u8State
+		Required state of ATE firmware, one of \ref tenuM2mAteFwState enumeration values.
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+\sa
+	m2m_ate_init
+*/
+sint8 m2m_ate_set_fw_state(uint8 u8State)
+{
+	sint8		s8Ret	= M2M_SUCCESS;
+	uint32_t	u32Val	= 0;
+	
+	if((M2M_ATE_FW_STATE_STOP == u8State) && (M2M_ATE_FW_STATE_STOP != gu8AteIsRunning))
+	{
+		u32Val = nm_read_reg(rNMI_GLB_RESET);
+		u32Val &= ~(1 << 10);
+		s8Ret = nm_write_reg(rNMI_GLB_RESET, u32Val);
+		gu8AteIsRunning = M2M_ATE_FW_STATE_STOP;
+	}
+	else if((M2M_ATE_FW_STATE_RUN == u8State) && (M2M_ATE_FW_STATE_RUN != gu8AteIsRunning))
+	{
+		/* 0x1118[0]=0 at power-on-reset: pad-based control. */
+		/* Switch cortus reset register to register control. 0x1118[0]=1. */
+		u32Val = nm_read_reg(rNMI_BOOT_RESET_MUX);
+		u32Val |= (1 << 0);
+		s8Ret = nm_write_reg(rNMI_BOOT_RESET_MUX, u32Val);
+		if(M2M_SUCCESS != s8Ret) 
+		{
+			goto __EXIT;
+		}
+		/**
+		Write the firmware download complete magic value 0x10ADD09E at
+		location 0xFFFF000C (Cortus map) or C000C (AHB map).
+		This will let the boot-rom code execute from RAM.
+		**/
+		s8Ret = nm_write_reg(0xc0000, 0x71);
+		if(M2M_SUCCESS != s8Ret) 
+		{
+			goto __EXIT;
+		}
+
+		u32Val = nm_read_reg(rNMI_GLB_RESET);
+		if((u32Val & (1ul << 10)) == (1ul << 10)) 
+		{
+			u32Val &= ~(1ul << 10);
+			s8Ret = nm_write_reg(rNMI_GLB_RESET, u32Val);
+			if(M2M_SUCCESS != s8Ret) 
+			{
+				goto __EXIT;
+			}
+		}
+		
+		u32Val |= (1ul << 10);
+		s8Ret = nm_write_reg(rNMI_GLB_RESET, u32Val);
+		if(M2M_SUCCESS != s8Ret) 
+		{
+			goto __EXIT;
+		}
+		gu8AteIsRunning = M2M_ATE_FW_STATE_RUN;
+	}
+	else
+	{
+		s8Ret = M2M_ATE_ERR_UNHANDLED_CASE;
+	}
+	
+__EXIT:
+	if((M2M_SUCCESS == s8Ret) && (M2M_ATE_FW_STATE_RUN == gu8AteIsRunning))
+	{
+		nm_bsp_sleep(500);	/*wait for ATE firmware start up*/
+	}
+	return s8Ret;
+}
+
+/*!
+@fn	\
+	sint8 m2m_ate_get_fw_state(uint8);
+
+@brief
+	This function used to return status of ATE firmware.
+
+@return
+	The function SHALL return status of ATE firmware, one of \ref tenuM2mAteFwState enumeration values.
+\sa
+	m2m_ate_init, m2m_ate_set_fw_state
+*/
+sint8 m2m_ate_get_fw_state(void)
+{
+	return gu8AteIsRunning;
+}
+
+/*!
+@fn	\
+	uint32 m2m_ate_get_tx_rate(uint8);
+
+@brief
+	This function used to return value of TX rate required by application developer.
+
+@param [in]	u8Index
+		Index of required rate , one of \ref tenuM2mAteTxIndexOfRates enumeration values.
+@return
+	The function SHALL return 0 for in case of failure otherwise selected rate value.
+\sa
+	tenuM2mAteTxIndexOfRates
+*/
+uint32 m2m_ate_get_tx_rate(uint8 u8Index)
+{
+	if(M2M_ATE_MAX_NUM_OF_RATES <= u8Index)
+	{
+		return 0;
+	}
+	return gaAteFwTxRates[u8Index];
+}
+
+/*!
+@fn	\
+	sint8 m2m_ate_get_tx_status(void);
+
+@brief
+	This function used to return status of TX test case either running or stopped.
+
+@return
+	The function SHALL return status of ATE firmware, 1 if TX is running otherwise 0.
+\sa
+	m2m_ate_start_tx, m2m_ate_stop_tx
+*/
+sint8 m2m_ate_get_tx_status(void)
+{
+	return gu8TxState;
+}
+
+/*!
+@fn	\
+	sint8 m2m_ate_start_tx(tstrM2mAteTx *)
+
+@brief
+	This function used to start TX test case.
+
+@param [in]	strM2mAteTx
+		Type of \ref tstrM2mAteTx, with the values required to enable TX test case. You must use \ref m2m_ate_init first.
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+\sa
+	m2m_ate_init, m2m_ate_stop_tx, m2m_ate_get_tx_status
+*/
+sint8 m2m_ate_start_tx(tstrM2mAteTx * strM2mAteTx)
+{
+	sint8		s8Ret = M2M_SUCCESS;
+	uint8	u8LoopCntr = 0;
+	uint32_t 	val32;
+
+	
+	if(NULL == strM2mAteTx) 
+	{
+		s8Ret = M2M_ATE_ERR_VALIDATE;
+		goto __EXIT;
+	}
+	
+	if(0 != m2m_ate_get_tx_status()) 
+	{
+		s8Ret = M2M_ATE_ERR_TX_ALREADY_RUNNING;
+		goto __EXIT;
+	}
+	
+	if(0 != m2m_ate_get_rx_status())
+	{
+		s8Ret = M2M_ATE_ERR_RX_ALREADY_RUNNING;
+		goto __EXIT;
+	}
+	
+	if(	(strM2mAteTx->channel_num < M2M_ATE_CHANNEL_1) || 
+		(strM2mAteTx->channel_num > M2M_ATE_CHANNEL_14) || 
+		(strM2mAteTx->tx_gain_sel < M2M_ATE_TX_GAIN_DYNAMIC)	||
+		(strM2mAteTx->tx_gain_sel > M2M_ATE_TX_GAIN_TELEC) ||
+		(strM2mAteTx->frame_len > M2M_ATE_MAX_FRAME_LENGTH) ||
+		(strM2mAteTx->frame_len < M2M_ATE_MIN_FRAME_LENGTH)
+	)
+	{
+		s8Ret = M2M_ATE_ERR_VALIDATE;
+		goto __EXIT;
+	}
+	
+	if(	(strM2mAteTx->duty_cycle < M2M_ATE_TX_DUTY_MAX_VALUE /*1*/) ||
+		(strM2mAteTx->duty_cycle > M2M_ATE_TX_DUTY_MIN_VALUE /*10*/ ) ||
+		(strM2mAteTx->dpd_ctrl < M2M_ATE_TX_DPD_DYNAMIC)	||
+		(strM2mAteTx->dpd_ctrl > M2M_ATE_TX_DPD_ENABLED)  ||
+		(strM2mAteTx->use_pmu > M2M_ATE_PMU_ENABLE)	||
+		(strM2mAteTx->phy_burst_tx < M2M_ATE_TX_SRC_MAC) ||
+		(strM2mAteTx->phy_burst_tx > M2M_ATE_TX_SRC_PHY) ||
+		(strM2mAteTx->cw_tx < M2M_ATE_TX_MODE_NORM) ||
+		(strM2mAteTx->cw_tx > M2M_ATE_TX_MODE_CW)
+	)
+	{
+		s8Ret = M2M_ATE_ERR_VALIDATE;
+		goto __EXIT;
+	}
+	
+	for(u8LoopCntr=0; u8LoopCntr<M2M_ATE_MAX_NUM_OF_RATES; u8LoopCntr++) 
+	{
+		if(gaAteFwTxRates[u8LoopCntr] == strM2mAteTx->data_rate)
+		{
+			break;
+		}
+	}
+	
+	if(M2M_ATE_MAX_NUM_OF_RATES == u8LoopCntr) 
+	{
+		s8Ret = M2M_ATE_ERR_VALIDATE;
+		goto __EXIT;
+	}
+	
+
+	
+	s8Ret += nm_write_reg(rBurstTx_NMI_USE_PMU, strM2mAteTx->use_pmu);
+	s8Ret += nm_write_reg(rBurstTx_NMI_TX_PHY_CONT, strM2mAteTx->phy_burst_tx);
+	s8Ret += nm_write_reg(rBurstTx_NMI_NUM_TX_FRAMES, strM2mAteTx->num_frames);
+	s8Ret += nm_write_reg(rBurstTx_NMI_TX_GAIN, strM2mAteTx->tx_gain_sel);
+	s8Ret += nm_write_reg(rBurstTx_NMI_TEST_CH, strM2mAteTx->channel_num);
+	s8Ret += nm_write_reg(rBurstTx_NMI_TX_FRAME_LEN, strM2mAteTx->frame_len);
+	s8Ret += nm_write_reg(rBurstTx_NMI_TX_CW_PARAM, strM2mAteTx->duty_cycle);
+	s8Ret += nm_write_reg(rBurstTx_NMI_TX_DPD_CTRL, strM2mAteTx->dpd_ctrl);
+	s8Ret += nm_write_reg(rBurstTx_NMI_TX_RATE, strM2mAteTx->data_rate);
+	s8Ret += nm_write_reg(rBurstTx_NMI_TX_CW_MODE, strM2mAteTx->cw_tx);
+	s8Ret += nm_write_reg(rBurstTx_NMI_TEST_XO_OFF, strM2mAteTx->xo_offset_x1000);
+	s8Ret += nm_write_reg(rBurstTx_NMI_USE_EFUSE_XO_OFF, strM2mAteTx->use_efuse_xo_offset);
+
+	val32	 = strM2mAteTx->peer_mac_addr[5]   << 0;
+	val32	|= strM2mAteTx->peer_mac_addr[4]  << 8;
+	val32	|= strM2mAteTx->peer_mac_addr[3]  << 16;
+	nm_write_reg(rBurstTx_NMI_MAC_ADDR_LO_PEER, val32 );
+	
+	val32	 = strM2mAteTx->peer_mac_addr[2]  << 0;
+	val32	|= strM2mAteTx->peer_mac_addr[1] << 8;
+	val32	|= strM2mAteTx->peer_mac_addr[0] << 16;
+	nm_write_reg(rBurstTx_NMI_MAC_ADDR_HI_PEER, val32 );
+
+	if(M2M_SUCCESS == s8Ret) 
+	{
+		s8Ret += nm_write_reg(rInterrupt_CORTUS_0, 1);	/*Interrupt Cortus*/
+		m2m_ate_set_tx_status(1);
+		nm_bsp_sleep(200);  /*Recommended*/	
+	}
+	
+__EXIT:
+	return s8Ret;
+}
+
+/*!
+@fn	\
+	sint8 m2m_ate_stop_tx(void)
+
+@brief
+	This function used to stop TX test case.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+\sa
+	m2m_ate_init, m2m_ate_start_tx, m2m_ate_get_tx_status
+*/
+sint8 m2m_ate_stop_tx(void)
+{
+	sint8	s8Ret = M2M_SUCCESS;
+	
+	s8Ret = nm_write_reg(rInterrupt_CORTUS_1, 1);
+	if(M2M_SUCCESS == s8Ret)
+	{
+		m2m_ate_set_tx_status(0);
+	}
+	
+	return s8Ret;
+}
+
+/*!
+@fn	\
+	sint8 m2m_ate_get_rx_status(uint8);
+
+@brief
+	This function used to return status of RX test case either running or stopped.
+
+@return
+	The function SHALL return status of ATE firmware, 1 if RX is running otherwise 0.
+\sa
+	m2m_ate_start_rx, m2m_ate_stop_rx
+*/
+sint8 m2m_ate_get_rx_status(void)
+{
+	return gu8RxState;
+}
+
+/*!
+@fn	\
+	sint8 m2m_ate_start_rx(tstrM2mAteRx *)
+
+@brief
+	This function used to start RX test case.
+
+@param [in]	strM2mAteRx
+		Type of \ref tstrM2mAteRx, with the values required to enable RX test case. You must use \ref m2m_ate_init first.
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+\sa
+	m2m_ate_init, m2m_ate_stop_rx, m2m_ate_get_rx_status
+*/
+sint8 m2m_ate_start_rx(tstrM2mAteRx * strM2mAteRxStr)
+{
+	sint8		s8Ret = M2M_SUCCESS;
+	uint32  	val32;
+	if(NULL == strM2mAteRxStr) 
+	{
+		s8Ret = M2M_ATE_ERR_VALIDATE;
+		goto __EXIT;
+	}
+	
+	if(0 != m2m_ate_get_tx_status()) 
+	{
+		s8Ret = M2M_ATE_ERR_TX_ALREADY_RUNNING;
+		goto __EXIT;
+	}
+	
+	if(0 != m2m_ate_get_rx_status())
+	{
+		s8Ret = M2M_ATE_ERR_RX_ALREADY_RUNNING;
+		goto __EXIT;
+	}
+	
+	if(	(strM2mAteRxStr->channel_num < M2M_ATE_CHANNEL_1) ||
+		(strM2mAteRxStr->channel_num > M2M_ATE_CHANNEL_14)||
+		(strM2mAteRxStr->use_pmu > M2M_ATE_PMU_ENABLE)
+	)
+	{
+		s8Ret = M2M_ATE_ERR_VALIDATE;
+		goto __EXIT;
+	}
+	
+	s8Ret += nm_write_reg(rBurstTx_NMI_TEST_CH, strM2mAteRxStr->channel_num);
+	s8Ret += nm_write_reg(rBurstTx_NMI_USE_PMU, strM2mAteRxStr->use_pmu);
+	s8Ret += nm_write_reg(rBurstTx_NMI_TEST_XO_OFF, strM2mAteRxStr->xo_offset_x1000);
+	s8Ret += nm_write_reg(rBurstTx_NMI_USE_EFUSE_XO_OFF, strM2mAteRxStr->use_efuse_xo_offset);
+
+	if(strM2mAteRxStr->override_self_mac_addr)
+	{
+		val32	 = strM2mAteRxStr->self_mac_addr[5] << 0;
+		val32	|= strM2mAteRxStr->self_mac_addr[4] << 8;
+		val32	|= strM2mAteRxStr->self_mac_addr[3] << 16;
+		nm_write_reg(rBurstTx_NMI_MAC_ADDR_LO_SELF, val32 );
+
+		val32	 = strM2mAteRxStr->self_mac_addr[2] << 0;
+		val32	|= strM2mAteRxStr->self_mac_addr[1] << 8;
+		val32	|= strM2mAteRxStr->self_mac_addr[0] << 16;
+		nm_write_reg(rBurstTx_NMI_MAC_ADDR_HI_SELF, val32 );
+	}
+	
+	if(strM2mAteRxStr->mac_filter_en_sa)
+	{
+		val32	 = strM2mAteRxStr->peer_mac_addr[5] << 0;
+		val32	|= strM2mAteRxStr->peer_mac_addr[4] << 8;
+		val32	|= strM2mAteRxStr->peer_mac_addr[3] << 16;
+		nm_write_reg(rBurstTx_NMI_MAC_ADDR_LO_SA, val32 );
+	
+		val32	 = strM2mAteRxStr->peer_mac_addr[2] << 0;
+		val32	|= strM2mAteRxStr->peer_mac_addr[1] << 8;
+		val32	|= strM2mAteRxStr->peer_mac_addr[0] << 16;
+		nm_write_reg(rBurstTx_NMI_MAC_ADDR_HI_SA, val32 );
+	}
+	
+	nm_write_reg(rBurstTx_NMI_MAC_FILTER_ENABLE_DA, strM2mAteRxStr->mac_filter_en_da);
+	nm_write_reg(rBurstTx_NMI_MAC_FILTER_ENABLE_SA, strM2mAteRxStr->mac_filter_en_sa);
+	nm_write_reg(rBurstTx_NMI_SET_SELF_MAC_ADDR, strM2mAteRxStr->override_self_mac_addr);
+	
+	if(M2M_SUCCESS == s8Ret) 
+	{
+		s8Ret += nm_write_reg(rInterrupt_CORTUS_2, 1);	/*Interrupt Cortus*/
+		m2m_ate_set_rx_status(1);
+		nm_bsp_sleep(10);  /*Recommended*/	
+	}
+	
+__EXIT:
+	return s8Ret;
+}
+
+/*!
+@fn	\
+	sint8 m2m_ate_stop_rx(void)
+
+@brief
+	This function used to stop RX test case.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+\sa
+	m2m_ate_init, m2m_ate_start_rx, m2m_ate_get_rx_status
+*/
+sint8 m2m_ate_stop_rx(void)
+{
+	m2m_ate_set_rx_status(0);
+	nm_bsp_sleep(200);  /*Recommended*/	
+	return M2M_SUCCESS;
+}
+
+/*!
+@fn	\
+	sint8 m2m_ate_read_rx_status(tstrM2mAteRxStatus *)
+
+@brief
+	This function used to read RX statistics from ATE firmware.
+
+@param [out]	strM2mAteRxStatus
+		Type of \ref tstrM2mAteRxStatus used to save statistics of RX test case. You must use \ref m2m_ate_start_rx first.
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+\sa
+	m2m_ate_init, m2m_ate_start_rx
+*/
+sint8 m2m_ate_read_rx_status(tstrM2mAteRxStatus *strM2mAteRxStatus)
+{
+	sint8	s8Ret = M2M_SUCCESS;
+	
+	if(NULL == strM2mAteRxStatus) 
+	{
+		s8Ret = M2M_ATE_ERR_VALIDATE;
+		goto __EXIT;
+	}
+	
+	if(0 != m2m_ate_get_tx_status()) 
+	{
+		s8Ret = M2M_ATE_ERR_TX_ALREADY_RUNNING;
+		goto __EXIT;
+	}
+
+	if (nm_read_reg(rBurstTx_NMI_MAC_FILTER_ENABLE_DA) || nm_read_reg(rBurstTx_NMI_MAC_FILTER_ENABLE_SA)) 
+	{
+		strM2mAteRxStatus->num_rx_pkts 		= 		nm_read_reg(rBurstTx_NMI_RX_PKT_CNT_SUCCESS) + nm_read_reg(rBurstTx_NMI_RX_PKT_CNT_FAIL);
+		strM2mAteRxStatus->num_good_pkts 	= 		nm_read_reg(rBurstTx_NMI_RX_PKT_CNT_SUCCESS);
+		strM2mAteRxStatus->num_err_pkts 	= 		nm_read_reg(rBurstTx_NMI_RX_PKT_CNT_FAIL);
+	} 
+	else
+	{
+		strM2mAteRxStatus->num_rx_pkts = nm_read_reg(rBurstRx_NMI_RX_ALL_PKTS_CONT) + nm_read_reg(0x989c);
+		strM2mAteRxStatus->num_err_pkts = nm_read_reg(rBurstRx_NMI_RX_ERR_PKTS_CONT);
+		strM2mAteRxStatus->num_good_pkts = strM2mAteRxStatus->num_rx_pkts - strM2mAteRxStatus->num_err_pkts;
+	}
+
+__EXIT:
+	return s8Ret;
+}
+/*!
+@fn	\
+	sint8 m2m_ate_set_dig_gain(double dGaindB)
+
+@brief
+	This function is used to set the digital gain
+
+@param [in]	double dGaindB
+		The digital gain value required to be set.
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+sint8 m2m_ate_set_dig_gain(double dGaindB)
+{
+	uint32_t dGain, val32;
+	dGain = (uint32_t)(pow(10, dGaindB/20.0) * 1024.0);
+
+	val32 = nm_read_reg(0x160cd0);
+	val32 &= ~(0x1ffful << 0);
+	val32 |= (((uint32_t)dGain) << 0);
+	nm_write_reg(0x160cd0, val32);
+	return M2M_SUCCESS;
+}
+/*!
+@fn	\
+	sint8 m2m_ate_get_dig_gain(double * dGaindB)
+
+@brief
+	This function is used to get the digital gain
+
+@param [out]	double * dGaindB
+		The retrieved digital gain value obtained from HW registers in dB.
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+sint8 m2m_ate_get_dig_gain(double * dGaindB)
+{
+	uint32 dGain, val32;
+	
+	if(!dGaindB) return M2M_ERR_INVALID_ARG;
+	
+	val32 = nm_read_reg(0x160cd0);
+	
+	dGain = (val32 >> 0) & 0x1ffful;
+	*dGaindB = 20.0*log10((double)dGain / 1024.0);
+	
+	return M2M_SUCCESS;
+}
+/*!
+@fn	\
+	void m2m_ate_set_pa_gain(uint8 gain_db)
+
+@brief
+	This function is used to set the PA gain (18/15/12/9/6/3/0 only)
+
+@param [in]	uint8 gain_db
+		PA gain level allowed (18/15/12/9/6/3/0 only)
+
+*/
+void m2m_ate_set_pa_gain(uint8 gain_db)
+{
+	uint32 PA_1e9c;
+	uint8 aGain[] = {
+		/* "0 dB"  */ 0x00,
+		/* "3 dB"  */ 0x01,
+		/* "6 dB"  */ 0x03,
+		/* "9 dB"  */ 0x07,
+		/* "12 dB" */ 0x0f,
+		/* "15 dB" */ 0x1f,
+	/* "18 dB" */ 0x3f };
+	/* The variable PA gain is valid only for High power mode */
+	PA_1e9c = nm_read_reg(0x1e9c);
+	/* TX bank 0. */
+	PA_1e9c &= ~(0x3ful << 8);
+	PA_1e9c |= (((uint32)aGain[gain_db/3] & 0x3f) << 8);
+	nm_write_reg(0x1e9c, PA_1e9c);
+}
+/*!
+@fn	\
+	sint8 m2m_ate_get_pa_gain(double *paGaindB)
+
+@brief
+	This function is used to get the PA gain
+
+@param [out]	double *paGaindB
+		The retrieved PA gain value obtained from HW registers in dB.
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+sint8 m2m_ate_get_pa_gain(double *paGaindB)
+{
+	uint32 val32, paGain;
+	uint32 m_cmbPAGainStep;
+	
+	if(!paGaindB) 
+		return M2M_ERR_INVALID_ARG;
+	
+	val32 = nm_read_reg(0x1e9c);
+	
+	paGain = (val32 >> 8) & 0x3f;
+	
+	switch(paGain){
+		case 0x1:
+		m_cmbPAGainStep = 5;
+		break;
+		case 0x3:
+		m_cmbPAGainStep = 4;
+		break;
+		case 0x7:
+		m_cmbPAGainStep = 3;
+		break;
+		case 0xf:
+		m_cmbPAGainStep = 2;
+		break;
+		case 0x1f:
+		m_cmbPAGainStep = 1;
+		break;
+		case 0x3f:
+		m_cmbPAGainStep = 0;
+		break;
+		default:
+		m_cmbPAGainStep = 0;
+		break;
+	}
+	
+	*paGaindB = 18 - m_cmbPAGainStep*3;
+
+	return M2M_SUCCESS;
+}
+/*!
+@fn	\
+	sint8 m2m_ate_get_ppa_gain(double * ppaGaindB)
+
+@brief
+	This function is used to get the PPA gain
+
+@param [out]	uint32 * ppaGaindB
+		The retrieved PPA gain value obtained from HW registers in dB.
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+sint8 m2m_ate_get_ppa_gain(double * ppaGaindB)
+{
+	uint32 val32, ppaGain, m_cmbPPAGainStep;
+	
+	if(!ppaGaindB) return M2M_ERR_INVALID_ARG;
+
+	val32 = nm_read_reg(0x1ea0);
+		
+	ppaGain = (val32 >> 5) & 0x7;
+	
+	switch(ppaGain){
+		case 0x1:
+		m_cmbPPAGainStep = 2;
+		break;
+		case 0x3:
+		m_cmbPPAGainStep = 1;
+		break;
+		case 0x7:
+		m_cmbPPAGainStep = 0;
+		break;
+		default:
+		m_cmbPPAGainStep = 3;
+		break;
+	}
+	
+	*ppaGaindB = 9 - m_cmbPPAGainStep*3;
+			
+	
+	return M2M_SUCCESS;
+}
+/*!
+@fn	\
+	sint8 m2m_ate_get_tot_gain(double * totGaindB)
+
+@brief
+	This function is used to calculate the total gain
+
+@param [out]	double * totGaindB
+		The retrieved total gain value obtained from calculations made based on the digital gain, PA and PPA gain values.
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+sint8 m2m_ate_get_tot_gain(double * totGaindB)
+{
+	double dGaindB, paGaindB, ppaGaindB;	
+	
+	if(!totGaindB) return M2M_ERR_INVALID_ARG;
+	
+	m2m_ate_get_pa_gain(&paGaindB);
+	m2m_ate_get_ppa_gain(&ppaGaindB);
+	m2m_ate_get_dig_gain(&dGaindB);
+	
+	*totGaindB = dGaindB + paGaindB + ppaGaindB;
+	
+	return M2M_SUCCESS;
+}
+
+#endif //_M2M_ATE_FW_

libraries/lwIP_WINC1500/src/driver/source/m2m_hif.c

@@ -0,0 +1,766 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains M2M host interface APIs implementation.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "common/include/nm_common.h"
+#include "driver/source/nmbus.h"
+#include "bsp/include/nm_bsp.h"
+#include "m2m_hif.h"
+#include "driver/include/m2m_types.h"
+#include "driver/source/nmasic.h"
+#include "driver/include/m2m_periph.h"
+
+#if (defined NM_EDGE_INTERRUPT)&&(defined NM_LEVEL_INTERRUPT)
+#error "only one type of interrupt NM_EDGE_INTERRUPT,NM_LEVEL_INTERRUPT"
+#endif
+
+#if !((defined NM_EDGE_INTERRUPT)||(defined NM_LEVEL_INTERRUPT))
+#error "define interrupt type NM_EDGE_INTERRUPT,NM_LEVEL_INTERRUPT"
+#endif
+
+#ifndef CORTUS_APP
+#define NMI_AHB_DATA_MEM_BASE  0x30000
+#define NMI_AHB_SHARE_MEM_BASE 0xd0000
+
+#define WIFI_HOST_RCV_CTRL_0	(0x1070)
+#define WIFI_HOST_RCV_CTRL_1	(0x1084)
+#define WIFI_HOST_RCV_CTRL_2    (0x1078)
+#define WIFI_HOST_RCV_CTRL_3    (0x106c)
+#define WIFI_HOST_RCV_CTRL_4	(0x150400)
+#define WIFI_HOST_RCV_CTRL_5	(0x1088)
+
+typedef struct {
+ 	uint8 u8ChipMode;
+ 	uint8 u8ChipSleep;
+ 	uint8 u8HifRXDone;
+ 	uint8 u8Interrupt;
+ 	uint32 u32RxAddr;
+ 	uint32 u32RxSize;
+	tpfHifCallBack pfWifiCb;
+	tpfHifCallBack pfIpCb;
+	tpfHifCallBack pfOtaCb;
+	tpfHifCallBack pfSigmaCb;
+	tpfHifCallBack pfHifCb;
+	tpfHifCallBack pfCryptoCb;
+	tpfHifCallBack pfSslCb;
+}tstrHifContext;
+
+volatile tstrHifContext gstrHifCxt;
+#ifdef ARDUINO
+volatile uint8 hif_receive_blocked = 0;
+#endif
+
+static void isr(void)
+{
+	gstrHifCxt.u8Interrupt++;
+#ifdef NM_LEVEL_INTERRUPT
+	nm_bsp_interrupt_ctrl(0);
+#endif
+}
+static sint8 hif_set_rx_done(void)
+{
+	uint32 reg;
+	sint8 ret = M2M_SUCCESS;
+
+#ifdef ARDUINO
+	hif_receive_blocked = 0;
+#endif
+	gstrHifCxt.u8HifRXDone = 0;
+#ifdef NM_EDGE_INTERRUPT
+	nm_bsp_interrupt_ctrl(1);
+#endif
+	ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0,&reg);
+	if(ret != M2M_SUCCESS)goto ERR1;
+	/* Set RX Done */
+	reg |= NBIT1;
+	ret = nm_write_reg(WIFI_HOST_RCV_CTRL_0,reg);
+	if(ret != M2M_SUCCESS)goto ERR1;
+#ifdef NM_LEVEL_INTERRUPT
+	nm_bsp_interrupt_ctrl(1);
+#endif
+ERR1:
+	return ret;
+
+}
+/**
+*	@fn			static void m2m_hif_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
+*	@brief		WiFi call back function
+*	@param [in]	u8OpCode
+*					HIF Opcode type.
+*	@param [in]	u16DataSize
+*					HIF data length.
+*	@param [in]	u32Addr
+*					HIF address.
+*	@param [in]	grp
+*					HIF group type.
+*	@author
+*	@date
+*	@version	1.0
+*/
+static void m2m_hif_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
+{
+#ifdef ARDUINO
+	// Silence "unused" warning
+	(void)u8OpCode;
+	(void)u16DataSize;
+	(void)u32Addr;
+#endif
+}
+/**
+*	@fn		NMI_API sint8 hif_chip_wake(void);
+*	@brief	To Wakeup the chip.
+*    @return		The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+
+sint8 hif_chip_wake(void)
+{
+	sint8 ret = M2M_SUCCESS;
+	if(gstrHifCxt.u8HifRXDone)
+	{
+		/*chip already wake for the rx not done no need to send wake request*/
+		return ret;
+	}
+	if(gstrHifCxt.u8ChipSleep == 0)
+	{
+		if(gstrHifCxt.u8ChipMode != M2M_NO_PS)
+		{
+			ret = chip_wake();
+			if(ret != M2M_SUCCESS)goto ERR1;
+		}
+		else
+		{
+		}
+	}
+	gstrHifCxt.u8ChipSleep++;
+ERR1:
+	return ret;
+}
+/*!
+@fn	\
+	NMI_API void hif_set_sleep_mode(uint8 u8Pstype);
+
+@brief
+	Set the sleep mode of the HIF layer.
+
+@param [in]	u8Pstype
+				Sleep mode.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+
+void hif_set_sleep_mode(uint8 u8Pstype)
+{
+	gstrHifCxt.u8ChipMode = u8Pstype;
+}
+/*!
+@fn	\
+	NMI_API uint8 hif_get_sleep_mode(void);
+
+@brief
+	Get the sleep mode of the HIF layer.
+
+@return
+	The function SHALL return the sleep mode of the HIF layer.
+*/
+
+uint8 hif_get_sleep_mode(void)
+{
+	return gstrHifCxt.u8ChipMode;
+}
+
+/**
+*	@fn		NMI_API sint8 hif_chip_sleep_sc(void);
+*	@brief	To clear the chip sleep but keep the chip sleep
+*    @return		The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+
+sint8 hif_chip_sleep_sc(void)
+{
+	if(gstrHifCxt.u8ChipSleep >= 1)
+	{
+		gstrHifCxt.u8ChipSleep--;
+	}
+	return M2M_SUCCESS;
+}
+/**
+*	@fn		NMI_API sint8 hif_chip_sleep(void);
+*	@brief	To make the chip sleep.
+*    @return		The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+
+sint8 hif_chip_sleep(void)
+{
+	sint8 ret = M2M_SUCCESS;
+
+	if(gstrHifCxt.u8ChipSleep >= 1)
+	{
+		gstrHifCxt.u8ChipSleep--;
+	}
+	
+	if(gstrHifCxt.u8ChipSleep == 0)
+	{
+		if(gstrHifCxt.u8ChipMode != M2M_NO_PS)
+		{
+			ret = chip_sleep();
+			if(ret != M2M_SUCCESS)goto ERR1;
+
+		}
+		else
+		{
+		}
+	}
+ERR1:
+	return ret;
+}
+/**
+*   @fn		NMI_API sint8 hif_init(void * arg);
+*   @brief	To initialize HIF layer.
+*   @param [in]	arg
+*				Pointer to the arguments.
+*   @return		The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+
+sint8 hif_init(void * arg)
+{
+#ifdef ARDUINO
+	(void)arg; // Silence "unused" warning
+#endif
+	m2m_memset((uint8*)&gstrHifCxt,0,sizeof(tstrHifContext));
+	nm_bsp_register_isr(isr);
+	hif_register_cb(M2M_REQ_GROUP_HIF,m2m_hif_cb);
+	return M2M_SUCCESS;
+}
+/**
+*	@fn		NMI_API sint8 hif_deinit(void * arg);
+*	@brief	To De-initialize HIF layer.
+*    @param [in]	arg
+*				Pointer to the arguments.
+*    @return		The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+sint8 hif_deinit(void * arg)
+{
+#ifdef ARDUINO
+	(void)arg; // Silence "unused" warning
+#endif
+	sint8 ret = M2M_SUCCESS;
+	ret = hif_chip_wake();
+	m2m_memset((uint8*)&gstrHifCxt,0,sizeof(tstrHifContext));
+	return ret;
+}
+/**
+*	@fn		NMI_API sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSize,
+					   uint8 *pu8DataBuf,uint16 u16DataSize, uint16 u16DataOffset)
+*	@brief	Send packet using host interface.
+
+*	@param [in]	u8Gid
+*				Group ID.
+*	@param [in]	u8Opcode
+*				Operation ID.
+*	@param [in]	pu8CtrlBuf
+*				Pointer to the Control buffer.
+*	@param [in]	u16CtrlBufSize
+				Control buffer size.
+*	@param [in]	u16DataOffset
+				Packet Data offset.
+*	@param [in]	pu8DataBuf
+*				Packet buffer Allocated by the caller.
+*	@param [in]	u16DataSize
+				Packet buffer size (including the HIF header).
+*    @return		The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+
+sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSize,
+			   uint8 *pu8DataBuf,uint16 u16DataSize, uint16 u16DataOffset)
+{
+	sint8		ret = M2M_ERR_SEND;
+	volatile tstrHifHdr	strHif;
+
+	strHif.u8Opcode		= u8Opcode&(~NBIT7);
+	strHif.u8Gid		= u8Gid;
+	strHif.u16Length	= M2M_HIF_HDR_OFFSET;
+	if(pu8DataBuf != NULL)
+	{
+		strHif.u16Length += u16DataOffset + u16DataSize;
+	}
+	else
+	{
+		strHif.u16Length += u16CtrlBufSize;
+	}
+	ret = hif_chip_wake();
+	if(ret == M2M_SUCCESS)
+	{
+		volatile uint32 reg, dma_addr = 0;
+		volatile uint16 cnt = 0;
+//#define OPTIMIZE_BUS 
+/*please define in firmware also*/
+#ifndef OPTIMIZE_BUS
+		reg = 0UL;
+		reg |= (uint32)u8Gid;
+		reg |= ((uint32)u8Opcode<<8);
+		reg |= ((uint32)strHif.u16Length<<16);
+		ret = nm_write_reg(NMI_STATE_REG,reg);
+		if(M2M_SUCCESS != ret) goto ERR1;
+
+		reg = 0UL;
+		reg |= NBIT1;
+		ret = nm_write_reg(WIFI_HOST_RCV_CTRL_2, reg);
+		if(M2M_SUCCESS != ret) goto ERR1;
+#else
+		reg = 0UL;
+		reg |= NBIT1;
+		reg |= ((u8Opcode & NBIT7) ? (NBIT2):(0)); /*Data = 1 or config*/
+		reg |= (u8Gid == M2M_REQ_GROUP_IP) ? (NBIT3):(0); /*IP = 1 or non IP*/
+		reg |= ((uint32)strHif.u16Length << 4); /*length of pkt max = 4096*/
+		ret = nm_write_reg(WIFI_HOST_RCV_CTRL_2, reg);
+		if(M2M_SUCCESS != ret) goto ERR1;
+#endif
+		dma_addr = 0;
+		
+		for(cnt = 0; cnt < 1000; cnt ++)
+		{
+			ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_2,(uint32 *)&reg);
+			if(ret != M2M_SUCCESS) break;
+			/*
+			 * If it takes too long to get a response, the slow down to 
+			 * avoid back-to-back register read operations.
+			 */
+			if(cnt >= 500) {
+				if(cnt < 501) {
+					M2M_INFO("Slowing down...\n");
+				}
+				nm_bsp_sleep(1);
+			}
+			if (!(reg & NBIT1))
+			{
+				ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_4,(uint32 *)&dma_addr);
+				if(ret != M2M_SUCCESS) {
+					/*in case of read error clear the DMA address and return error*/
+					dma_addr = 0;
+					goto ERR1;
+				}
+				/*in case of success break */
+				break;
+			}
+		}
+
+		if (dma_addr != 0)
+		{
+			volatile uint32	u32CurrAddr;
+			u32CurrAddr = dma_addr;
+			strHif.u16Length=NM_BSP_B_L_16(strHif.u16Length);
+			ret = nm_write_block(u32CurrAddr, (uint8*)&strHif, M2M_HIF_HDR_OFFSET);
+			if(M2M_SUCCESS != ret) goto ERR1;
+			u32CurrAddr += M2M_HIF_HDR_OFFSET;
+			if(pu8CtrlBuf != NULL)
+			{
+				ret = nm_write_block(u32CurrAddr, pu8CtrlBuf, u16CtrlBufSize);
+				if(M2M_SUCCESS != ret) goto ERR1;
+				u32CurrAddr += u16CtrlBufSize;
+			}
+			if(pu8DataBuf != NULL)
+			{
+				u32CurrAddr += (u16DataOffset - u16CtrlBufSize);
+				ret = nm_write_block(u32CurrAddr, pu8DataBuf, u16DataSize);
+				if(M2M_SUCCESS != ret) goto ERR1;
+				u32CurrAddr += u16DataSize;
+			}
+
+			reg = dma_addr << 2;
+			reg |= NBIT1;
+			ret = nm_write_reg(WIFI_HOST_RCV_CTRL_3, reg);
+			if(M2M_SUCCESS != ret) goto ERR1;
+		}
+		else
+		{
+			ret = hif_chip_sleep();
+			M2M_DBG("Failed to alloc rx size %d\r",ret);
+			ret = M2M_ERR_MEM_ALLOC;
+			goto ERR2;
+		}
+
+	}
+	else
+	{
+		M2M_ERR("(HIF)Fail to wakup the chip\n");
+		goto ERR2;
+	}
+	/*actual sleep ret = M2M_SUCCESS*/
+ 	ret = hif_chip_sleep();
+	return ret;
+ERR1:
+	/*reset the count but no actual sleep as it already bus error*/
+	hif_chip_sleep_sc();
+ERR2:
+	/*logical error*/
+	return ret;
+}
+
+/**
+*	@fn		hif_isr
+*	@brief	Host interface interrupt service routine
+*	@author	M. Abdelmawla
+*	@date	15 July 2012
+*	@return	1 in case of interrupt received else 0 will be returned
+*	@version	1.0
+*/
+static sint8 hif_isr(void)
+{
+	sint8 ret = M2M_SUCCESS;
+	volatile uint32 reg;
+	volatile tstrHifHdr strHif;
+
+#ifdef ARDUINO
+	ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0, (uint32*)&reg);
+#else
+	ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_0, &reg);
+#endif
+	if(M2M_SUCCESS == ret)
+	{
+		if(reg & 0x1)	/* New interrupt has been received */
+		{
+			uint16 size;
+
+			nm_bsp_interrupt_ctrl(0);
+			/*Clearing RX interrupt*/
+			reg &= ~NBIT0;
+			ret = nm_write_reg(WIFI_HOST_RCV_CTRL_0,reg);
+			if(ret != M2M_SUCCESS)goto ERR1;
+			gstrHifCxt.u8HifRXDone = 1;
+			size = (uint16)((reg >> 2) & 0xfff);
+			if (size > 0) {
+				uint32 address = 0;
+				/**
+				start bus transfer
+				**/
+				ret = nm_read_reg_with_ret(WIFI_HOST_RCV_CTRL_1, &address);
+				if(M2M_SUCCESS != ret)
+				{
+					M2M_ERR("(hif) WIFI_HOST_RCV_CTRL_1 bus fail\n");
+					nm_bsp_interrupt_ctrl(1);
+					goto ERR1;
+				}
+				gstrHifCxt.u32RxAddr = address;
+				gstrHifCxt.u32RxSize = size;
+				ret = nm_read_block(address, (uint8*)&strHif, sizeof(tstrHifHdr));
+				strHif.u16Length = NM_BSP_B_L_16(strHif.u16Length);
+				if(M2M_SUCCESS != ret)
+				{
+					M2M_ERR("(hif) address bus fail\n");
+					nm_bsp_interrupt_ctrl(1);
+					goto ERR1;
+				}
+				if(strHif.u16Length != size)
+				{
+					if((size - strHif.u16Length) > 4)
+					{
+						M2M_ERR("(hif) Corrupted packet Size = %u <L = %u, G = %u, OP = %02X>\n",
+							size, strHif.u16Length, strHif.u8Gid, strHif.u8Opcode);
+						nm_bsp_interrupt_ctrl(1);
+						ret = M2M_ERR_BUS_FAIL;
+						goto ERR1;
+					}
+				}
+
+				if(M2M_REQ_GROUP_WIFI == strHif.u8Gid)
+				{
+					if(gstrHifCxt.pfWifiCb)
+						gstrHifCxt.pfWifiCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
+					else
+#ifdef ARDUINO
+					{
+#endif
+						M2M_ERR("WIFI callback is not registered\n");
+#ifdef ARDUINO
+					}
+#endif
+				}
+				else if(M2M_REQ_GROUP_IP == strHif.u8Gid)
+				{
+					if(gstrHifCxt.pfIpCb)
+						gstrHifCxt.pfIpCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
+					else
+#ifdef ARDUINO
+					{
+#endif
+						M2M_ERR("Scoket callback is not registered\n");
+#ifdef ARDUINO
+					}
+#endif
+				}
+				else if(M2M_REQ_GROUP_OTA == strHif.u8Gid)
+				{
+					if(gstrHifCxt.pfOtaCb)
+						gstrHifCxt.pfOtaCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
+					else
+#ifdef ARDUINO
+					{
+#endif
+						M2M_ERR("Ota callback is not registered\n");
+#ifdef ARDUINO
+					}
+#endif
+				}
+				else if(M2M_REQ_GROUP_CRYPTO == strHif.u8Gid)
+				{
+					if(gstrHifCxt.pfCryptoCb)
+						gstrHifCxt.pfCryptoCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
+
+					else
+#ifdef ARDUINO
+					{
+#endif
+						M2M_ERR("Crypto callback is not registered\n");
+#ifdef ARDUINO
+					}
+#endif
+				}
+				else if(M2M_REQ_GROUP_SIGMA == strHif.u8Gid)
+				{
+					if(gstrHifCxt.pfSigmaCb)
+						gstrHifCxt.pfSigmaCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
+					else
+#ifdef ARDUINO
+					{
+#endif
+						M2M_ERR("Sigma callback is not registered\n");
+#ifdef ARDUINO
+					}
+#endif
+				}
+				else if(M2M_REQ_GROUP_SSL == strHif.u8Gid)
+				{
+				    if(gstrHifCxt.pfSslCb)
+						gstrHifCxt.pfSslCb(strHif.u8Opcode,strHif.u16Length - M2M_HIF_HDR_OFFSET, address + M2M_HIF_HDR_OFFSET);
+				}
+				else
+				{
+					M2M_ERR("(hif) invalid group ID\n");
+					ret = M2M_ERR_BUS_FAIL;
+					goto ERR1;
+				}
+
+#ifdef ARDUINO
+				if (hif_receive_blocked) {
+					return ret;
+				}
+#endif
+				if(gstrHifCxt.u8HifRXDone)
+				{
+					M2M_ERR("(hif) host app didn't set RX Done <%u><%X>\n", strHif.u8Gid, strHif.u8Opcode);
+					ret = hif_set_rx_done();
+					if(ret != M2M_SUCCESS) goto ERR1;
+				}
+			}
+			else
+			{
+				M2M_ERR("(hif) Wrong Size\n");
+				ret = M2M_ERR_RCV;
+				goto ERR1;
+			}
+		}
+		else
+		{
+#ifndef WIN32
+			M2M_ERR("(hif) False interrupt %lx",reg);
+#ifdef ARDUINO
+			// ignore false interrupts, since they cause infinite loops in hif_handle_isr
+#else
+			ret = M2M_ERR_FAIL;
+#endif
+			goto ERR1;
+#else
+#endif
+		}
+	}
+	else
+	{
+		M2M_ERR("(hif) Fail to Read interrupt reg\n");
+		goto ERR1;
+	}
+
+ERR1:
+	return ret;
+}
+
+/**
+*	@fn		hif_handle_isr(void)
+*	@brief	Handle interrupt received from NMC1500 firmware.
+*   @return     The function SHALL return 0 for success and a negative value otherwise.
+*/
+
+sint8 hif_handle_isr(void)
+{
+	sint8 ret = M2M_SUCCESS;	
+
+#ifdef ARDUINO
+	if (hif_receive_blocked) {
+		return ret;
+	}
+#endif
+
+	while (gstrHifCxt.u8Interrupt) {
+		/*must be at that place because of the race of interrupt increment and that decrement*/
+		/*when the interrupt enabled*/
+		gstrHifCxt.u8Interrupt--;
+		while(1)
+		{
+			ret = hif_isr();
+#ifdef ARDUINO
+			if (hif_receive_blocked) {
+				return ret;
+			}
+#endif
+			if(ret == M2M_SUCCESS) {
+				/*we will try forever untill we get that interrupt*/
+				/*Fail return errors here due to bus errors (reading expected values)*/
+				break;
+			} else {
+				M2M_ERR("(HIF) Fail to handle interrupt %d try Again..\n",ret);
+			}
+		}
+	}
+
+	return ret;
+}
+/*
+*	@fn		hif_receive
+*	@brief	Host interface interrupt serviece routine
+*	@param [in]	u32Addr
+*				Receive start address
+*	@param [out]	pu8Buf
+*				Pointer to receive buffer. Allocated by the caller
+*	@param [in]	u16Sz
+*				Receive buffer size
+*	@param [in]	isDone
+*				If you don't need any more packets send True otherwise send false
+*    @return		The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+sint8 hif_receive(uint32 u32Addr, uint8 *pu8Buf, uint16 u16Sz, uint8 isDone)
+{
+	sint8 ret = M2M_SUCCESS;
+	if((u32Addr == 0)||(pu8Buf == NULL) || (u16Sz == 0))
+	{
+		if(isDone)
+		{			
+			/* set RX done */
+			ret = hif_set_rx_done();
+		}
+		else
+		{
+			ret = M2M_ERR_FAIL;
+			M2M_ERR(" hif_receive: Invalid argument\n");
+		}
+		goto ERR1;
+	}
+
+	if(u16Sz > gstrHifCxt.u32RxSize)
+	{
+		ret = M2M_ERR_FAIL;
+		M2M_ERR("APP Requested Size is larger than the recived buffer size <%u><%lu>\n",u16Sz, gstrHifCxt.u32RxSize);
+		goto ERR1;
+	}
+	if((u32Addr < gstrHifCxt.u32RxAddr)||((u32Addr + u16Sz)>(gstrHifCxt.u32RxAddr + gstrHifCxt.u32RxSize)))
+	{
+		ret = M2M_ERR_FAIL;
+		M2M_ERR("APP Requested Address beyond the recived buffer address and length\n");
+		goto ERR1;
+	}
+	
+	/* Receive the payload */
+	ret = nm_read_block(u32Addr, pu8Buf, u16Sz);
+	if(ret != M2M_SUCCESS)goto ERR1;
+
+	/* check if this is the last packet */
+	if((((gstrHifCxt.u32RxAddr + gstrHifCxt.u32RxSize) - (u32Addr + u16Sz)) <= 0) || isDone)
+	{
+		/* set RX done */
+		ret = hif_set_rx_done();
+	}
+
+ERR1:
+	return ret;
+}
+
+/**
+*	@fn		hif_register_cb
+*	@brief	To set Callback function for every compantent Component
+*	@param [in]	u8Grp
+*				Group to which the Callback function should be set.
+*	@param [in]	fn
+*				function to be set
+*    @return		The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+
+sint8 hif_register_cb(uint8 u8Grp,tpfHifCallBack fn)
+{
+	sint8 ret = M2M_SUCCESS;
+	switch(u8Grp)
+	{
+		case M2M_REQ_GROUP_IP:
+			gstrHifCxt.pfIpCb = fn;
+			break;
+		case M2M_REQ_GROUP_WIFI:
+			gstrHifCxt.pfWifiCb = fn;
+			break;
+		case M2M_REQ_GROUP_OTA:
+			gstrHifCxt.pfOtaCb = fn;
+			break;
+		case M2M_REQ_GROUP_HIF:
+			gstrHifCxt.pfHifCb = fn;
+			break;
+		case M2M_REQ_GROUP_CRYPTO:
+			gstrHifCxt.pfCryptoCb = fn;
+			break;
+		case M2M_REQ_GROUP_SIGMA:
+			gstrHifCxt.pfSigmaCb = fn;
+			break;
+		case M2M_REQ_GROUP_SSL:
+			gstrHifCxt.pfSslCb = fn;
+			break;
+		default:
+			M2M_ERR("GRp ? %d\n",u8Grp);
+			ret = M2M_ERR_FAIL;
+			break;
+	}
+	return ret;
+}
+
+#endif

libraries/lwIP_WINC1500/src/driver/source/m2m_hif.h

@@ -0,0 +1,249 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains M2M host interface APIs implementation.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _M2M_HIF_
+#define _M2M_HIF_
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+INCLUDES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+#include "common/include/nm_common.h"
+/*!< Include depends on UNO Board is used or not*/
+#ifdef ENABLE_UNO_BOARD
+#include "m2m_uno_hif.h"
+#endif
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+MACROS
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+#define M2M_HIF_MAX_PACKET_SIZE      (1600 - 4)
+/*!< Maximum size of the buffer could be transferred between Host and Firmware.
+*/
+
+#define M2M_HIF_HDR_OFFSET (sizeof(tstrHifHdr) + 4)
+
+/**
+*	@struct		tstrHifHdr
+*	@brief		Structure to hold HIF header
+*/
+typedef struct
+{
+    uint8   u8Gid;		/*!< Group ID */
+    uint8   u8Opcode;	/*!< OP code */
+    uint16  u16Length;	/*!< Payload length */
+}tstrHifHdr;
+
+#ifdef __cplusplus
+     extern "C" {
+#endif
+
+/*!
+@typedef typedef void (*tpfHifCallBack)(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr);
+@brief	used to point to Wi-Fi call back function depend on Arduino project or other projects.
+@param [in]	u8OpCode
+				HIF Opcode type.
+@param [in]	u16DataSize
+				HIF data length.
+@param [in]	u32Addr
+				HIF address.
+@param [in]	grp
+				HIF group type.
+*/
+typedef void (*tpfHifCallBack)(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr);
+/**
+*   @fn			NMI_API sint8 hif_init(void * arg);
+*   @brief
+				To initialize HIF layer.
+*   @param [in]	arg
+*				Pointer to the arguments.
+*   @return
+				The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+NMI_API sint8 hif_init(void * arg);
+/**
+*	@fn			NMI_API sint8 hif_deinit(void * arg);
+*	@brief
+				To Deinitialize HIF layer.
+*   @param [in]	arg
+*				Pointer to the arguments.
+*    @return
+				The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+NMI_API sint8 hif_deinit(void * arg);
+/**
+*	@fn		NMI_API sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSize,
+					   uint8 *pu8DataBuf,uint16 u16DataSize, uint16 u16DataOffset)
+*	@brief	Send packet using host interface.
+
+*	@param [in]	u8Gid
+*				Group ID.
+*	@param [in]	u8Opcode
+*				Operation ID.
+*	@param [in]	pu8CtrlBuf
+*				Pointer to the Control buffer.
+*	@param [in]	u16CtrlBufSize
+				Control buffer size.
+*	@param [in]	u16DataOffset
+				Packet Data offset.
+*	@param [in]	pu8DataBuf
+*				Packet buffer Allocated by the caller.
+*	@param [in]	u16DataSize
+				Packet buffer size (including the HIF header).
+*    @return	The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+NMI_API sint8 hif_send(uint8 u8Gid,uint8 u8Opcode,uint8 *pu8CtrlBuf,uint16 u16CtrlBufSize,
+					   uint8 *pu8DataBuf,uint16 u16DataSize, uint16 u16DataOffset);
+/*
+*	@fn		hif_receive
+*	@brief	Host interface interrupt serviece routine
+*	@param [in]	u32Addr
+*				Receive start address
+*	@param [out] pu8Buf
+*				Pointer to receive buffer. Allocated by the caller
+*	@param [in]	 u16Sz
+*				Receive buffer size
+*	@param [in]	isDone
+*				If you don't need any more packets send True otherwise send false
+*   @return
+				The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+
+NMI_API sint8 hif_receive(uint32 u32Addr, uint8 *pu8Buf, uint16 u16Sz, uint8 isDone);
+/**
+*	@fn			hif_register_cb
+*	@brief
+				To set Callback function for every  Component.
+
+*	@param [in]	u8Grp
+*				Group to which the Callback function should be set.
+
+*	@param [in]	fn
+*				function to be set to the specified group.
+*   @return
+				The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+NMI_API sint8 hif_register_cb(uint8 u8Grp,tpfHifCallBack fn);
+/**
+*	@fn		NMI_API sint8 hif_chip_sleep(void);
+*	@brief
+				To make the chip sleep.
+*   @return
+				The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+NMI_API sint8 hif_chip_sleep(void);
+/**
+*	@fn		NMI_API sint8 hif_chip_sleep_sc(void);
+*	@brief
+				To clear the chip count only but keep the chip awake
+*   @return
+				The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+NMI_API sint8 hif_chip_sleep_sc(void);
+/**
+*	@fn		NMI_API sint8 hif_chip_wake(void);
+*	@brief
+			To Wakeup the chip.
+*   @return
+			The function shall return ZERO for successful operation and a negative value otherwise.
+*/
+
+NMI_API sint8 hif_chip_wake(void);
+/*!
+@fn	\
+			NMI_API void hif_set_sleep_mode(uint8 u8Pstype);
+
+@brief
+			Set the sleep mode of the HIF layer.
+
+@param [in]	u8Pstype
+				Sleep mode.
+
+@return
+			The function SHALL return 0 for success and a negative value otherwise.
+*/
+
+NMI_API void hif_set_sleep_mode(uint8 u8Pstype);
+/*!
+@fn	\
+	NMI_API uint8 hif_get_sleep_mode(void);
+
+@brief
+	Get the sleep mode of the HIF layer.
+
+@return
+	The function SHALL return the sleep mode of the HIF layer.
+*/
+
+NMI_API uint8 hif_get_sleep_mode(void);
+
+#ifdef CORTUS_APP
+/**
+*	@fn		hif_Resp_handler(uint8 *pu8Buffer, uint16 u16BufferSize)
+*	@brief
+				Response handler for HIF layer.
+
+*	@param [in]	pu8Buffer
+				Pointer to the buffer.
+
+*	@param [in]	u16BufferSize
+				Buffer size.
+
+*   @return
+			    The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8 hif_Resp_handler(uint8 *pu8Buffer, uint16 u16BufferSize);
+#endif
+
+/**
+*	@fn		hif_handle_isr(void)
+*	@brief
+			Handle interrupt received from NMC1500 firmware.
+*   @return
+			The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8 hif_handle_isr(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif

libraries/lwIP_WINC1500/src/driver/source/m2m_ota.c

@@ -0,0 +1,417 @@
+/**
+ *
+ * \file
+ *
+ * \brief NMC1500 IoT OTA Interface.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+INCLUDES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+#include "common/include/nm_common.h"
+#include "driver/include/m2m_types.h"
+#include "driver/include/m2m_ota.h"
+#include "driver/source/m2m_hif.h"
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+MACROS
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+DATA TYPES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+static tpfOtaUpdateCb gpfOtaUpdateCb = NULL;
+static tpfOtaNotifCb  gpfOtaNotifCb = NULL;
+
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+FUNCTION PROTOTYPES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+/**
+*	@fn			m2m_wifi_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr, uint8 grp)
+*	@brief		WiFi call back function
+*	@param [in]	u8OpCode
+*					HIF Opcode type.
+*	@param [in]	u16DataSize
+*					HIF data length.
+*	@param [in]	u32Addr
+*					HIF address.
+*	@param [in]	grp
+*					HIF group type.
+*	@author
+*	@date
+*	@version	1.0
+*/
+static void m2m_ota_cb(uint8 u8OpCode, uint16 u16DataSize, uint32 u32Addr)
+{
+#ifdef ARDUINO
+	(void)u16DataSize; // Silence "unused" warning
+#endif
+	sint8 ret = M2M_SUCCESS;
+	if(u8OpCode == M2M_OTA_RESP_NOTIF_UPDATE_INFO)
+	{
+		tstrOtaUpdateInfo strOtaUpdateInfo;
+		m2m_memset((uint8*)&strOtaUpdateInfo,0,sizeof(tstrOtaUpdateInfo));
+		ret = hif_receive(u32Addr,(uint8*)&strOtaUpdateInfo,sizeof(tstrOtaUpdateInfo),0);
+		if(ret == M2M_SUCCESS)
+		{
+			if(gpfOtaNotifCb)
+				gpfOtaNotifCb(&strOtaUpdateInfo);
+		}
+	}
+	else if (u8OpCode == M2M_OTA_RESP_UPDATE_STATUS)
+	{
+		tstrOtaUpdateStatusResp strOtaUpdateStatusResp;
+		m2m_memset((uint8*)&strOtaUpdateStatusResp,0,sizeof(tstrOtaUpdateStatusResp));
+		ret = hif_receive(u32Addr, (uint8*) &strOtaUpdateStatusResp,sizeof(tstrOtaUpdateStatusResp), 0);
+		if(ret == M2M_SUCCESS)
+		{
+			if(gpfOtaUpdateCb)
+				gpfOtaUpdateCb(strOtaUpdateStatusResp.u8OtaUpdateStatusType,strOtaUpdateStatusResp.u8OtaUpdateStatus);
+		}
+	}
+	else
+	{
+		M2M_ERR("Invaild OTA resp %d ?\n",u8OpCode);
+	}
+
+}
+/*!
+@fn	\
+	NMI_API sint8  m2m_ota_init(tpfOtaUpdateCb pfOtaUpdateCb, tpfOtaNotifCb pfOtaNotifCb);
+
+@brief
+	Initialize the OTA layer.
+
+@param [in]	pfOtaUpdateCb
+				OTA Update callback function
+
+@param [in]	pfOtaNotifCb
+				OTA notify callback function
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8  m2m_ota_init(tpfOtaUpdateCb pfOtaUpdateCb, tpfOtaNotifCb pfOtaNotifCb)
+{
+	sint8 ret = M2M_SUCCESS;
+
+	if(pfOtaUpdateCb){
+		gpfOtaUpdateCb = pfOtaUpdateCb;
+	}else{
+		M2M_ERR("Invaild Ota update cb\n");
+	}
+	if(pfOtaNotifCb){
+		gpfOtaNotifCb = pfOtaNotifCb;
+	}else{
+		M2M_ERR("Invaild Ota notify cb\n");
+	}
+
+	hif_register_cb(M2M_REQ_GROUP_OTA,m2m_ota_cb);
+
+	return ret;
+}
+/*!
+@fn	\
+	NMI_API sint8  m2m_ota_notif_set_url(uint8 * u8Url);
+
+@brief
+	Set the OTA url
+
+@param [in]	u8Url
+			 The url server address
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8  m2m_ota_notif_set_url(uint8 * u8Url)
+{
+	sint8 ret = M2M_SUCCESS;
+	uint16 u16UrlSize = m2m_strlen(u8Url) + 1;
+	/*Todo: we may change it to data pkt but we need to give it higer priority
+			but the priorty is not implemnted yet in data pkt
+	*/
+	ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_NOTIF_SET_URL,u8Url,u16UrlSize,NULL,0,0);
+	return ret;
+
+}
+
+/*!
+@fn	\
+	NMI_API sint8  m2m_ota_notif_check_for_update(void);
+
+@brief
+	check for ota update
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8  m2m_ota_notif_check_for_update(void)
+{
+	sint8 ret = M2M_SUCCESS;
+	ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_NOTIF_CHECK_FOR_UPDATE,NULL,0,NULL,0,0);
+	return ret;
+}
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_notif_sched(uint32 u32Period);
+
+@brief
+	Schedule OTA update
+
+@param [in]	u32Period
+	Period in days
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_notif_sched(uint32 u32Period)
+{
+#ifdef ARDUINO
+	(void)u32Period; // Silence "unused" warning
+#endif
+	sint8 ret = M2M_SUCCESS;
+	ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_NOTIF_CHECK_FOR_UPDATE,NULL,0,NULL,0,0);
+	return ret;
+}
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_start_update(uint8 * u8DownloadUrl);
+
+@brief
+	Request OTA start update using the downloaded url
+
+@param [in]	u8DownloadUrl
+		The download firmware url, you get it from device info
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+
+*/
+NMI_API sint8 m2m_ota_start_update(uint8 * u8DownloadUrl)
+{
+	sint8 ret = M2M_SUCCESS;
+	uint16 u16DurlSize = m2m_strlen(u8DownloadUrl) + 1;
+	/*Todo: we may change it to data pkt but we need to give it higer priority
+			but the priorty is not implemnted yet in data pkt
+	*/
+	ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_START_FW_UPDATE,u8DownloadUrl,u16DurlSize,NULL,0,0);
+	return ret;
+}
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_start_update_crt(uint8 * u8DownloadUrl);
+
+@brief
+	Request OTA start for the Cortus app image.
+
+@param [in]	u8DownloadUrl
+		The cortus application image url.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+
+*/
+NMI_API sint8 m2m_ota_start_update_crt(uint8 * u8DownloadUrl)
+{
+	sint8 ret = M2M_SUCCESS;
+	uint16 u16DurlSize = m2m_strlen(u8DownloadUrl) + 1;
+	ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_START_CRT_UPDATE,u8DownloadUrl,u16DurlSize,NULL,0,0);
+	return ret;
+}
+
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_rollback(void);
+
+@brief
+	Request OTA Rollback image
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_rollback(void)
+{
+	sint8 ret = M2M_SUCCESS;
+	ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_ROLLBACK_FW,NULL,0,NULL,0,0);
+	return ret;
+}
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_rollback_crt(void);
+
+@brief
+	Request Cortus application OTA Rollback image
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_rollback_crt(void)
+{
+	sint8 ret = M2M_SUCCESS;
+	ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_ROLLBACK_CRT,NULL,0,NULL,0,0);
+	return ret;
+}
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_abort(void);
+
+@brief
+	Request OTA Abort
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_abort(void)
+{
+	sint8 ret = M2M_SUCCESS;
+	ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_ABORT,NULL,0,NULL,0,0);
+	return ret;
+}
+
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_switch_firmware(void);
+
+@brief
+	Switch to the upgraded Firmware
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_switch_firmware(void)
+{
+	sint8 ret = M2M_SUCCESS;
+	ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_SWITCH_FIRMWARE,NULL,0,NULL,0,0);
+	return ret;
+}
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_switch_crt(void);
+
+@brief
+	Switch to the upgraded cortus application.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_switch_crt(void)
+{
+	sint8 ret = M2M_SUCCESS;
+	ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_SWITCH_CRT_IMG,NULL,0,NULL,0,0);
+	return ret;
+}
+
+/*!
+@fn	\
+	NMI_API sint8 m2m_ota_get_firmware_version(tstrM2mRev * pstrRev);
+
+@brief
+	Get the OTA Firmware version.
+
+@return
+	The function SHALL return 0 for success and a negative value otherwise.
+*/
+NMI_API sint8 m2m_ota_get_firmware_version(tstrM2mRev * pstrRev)
+{
+	sint8 ret = M2M_SUCCESS;
+	ret = hif_chip_wake();
+	if(ret == M2M_SUCCESS)
+	{
+    	ret = nm_get_ota_firmware_info(pstrRev);
+		hif_chip_sleep();
+	}
+	return ret;
+}
+#if 0
+#define M2M_OTA_FILE	"../../../m2m_ota.dat"
+NMI_API sint8 m2m_ota_test(void)
+{
+	uint32 page  = 0;
+	uint8 buffer[1500];
+	uint32 u32Sz = 0;
+	sint8 ret = M2M_SUCCESS;
+	FILE *fp =NULL;
+	fp = fopen(M2M_OTA_FILE,"rb");
+	if(fp)
+	{
+		fseek(fp, 0L, SEEK_END);
+		u32Sz = ftell(fp);
+		fseek(fp, 0L, SEEK_SET);
+
+		while(u32Sz > 0)
+		{
+			{
+				page = (rand()%1400);
+
+				if((page<100)||(page>1400)) page  = 1400;
+			}
+
+			if(u32Sz>page)
+			{
+				u32Sz-=page;
+			}
+			else
+			{
+				page = u32Sz;
+				u32Sz = 0;
+			}
+			printf("page %d\n", (int)page);
+			fread(buffer,page,1,fp);
+			ret = hif_send(M2M_REQ_GROUP_OTA,M2M_OTA_REQ_TEST|M2M_REQ_DATA_PKT,NULL,0,(uint8*)&buffer,page,0);
+			if(ret != M2M_SUCCESS)
+			{
+				M2M_ERR("\n");
+			}
+			nm_bsp_sleep(1);
+		}
+
+	}
+	else
+	{
+		M2M_ERR("nO err\n");
+	}
+	return ret;
+}
+#endif
+

libraries/lwIP_WINC1500/src/driver/source/m2m_periph.c

@@ -0,0 +1,187 @@
+/**
+ *
+ * \file
+ *
+ * \brief NMC1500 Peripherials Application Interface.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+INCLUDES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+#include "driver/include/m2m_periph.h"
+#include "driver/source/nmasic.h"
+#include "m2m_hif.h"
+
+#ifdef CONF_PERIPH
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+MACROS
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+#define GPIO_OP_DIR     0
+#define GPIO_OP_SET     1
+#define GPIO_OP_GET     2
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+DATA TYPES
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+STATIC FUNCTIONS
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+static sint8 get_gpio_idx(uint8 u8GpioNum)
+{
+	if(u8GpioNum >= M2M_PERIPH_GPIO_MAX) return -1;
+	if(u8GpioNum == M2M_PERIPH_GPIO15) { return 15;
+	} else if(u8GpioNum == M2M_PERIPH_GPIO16) { return 16;
+	} else if(u8GpioNum == M2M_PERIPH_GPIO18) { return 18;
+	} else if(u8GpioNum == M2M_PERIPH_GPIO3) { return 3;
+	} else if(u8GpioNum == M2M_PERIPH_GPIO4) { return 4;
+	} else if(u8GpioNum == M2M_PERIPH_GPIO5) { return 5;
+	} else if(u8GpioNum == M2M_PERIPH_GPIO6) { return 6;
+	} else {
+		return -2;
+	}
+}
+/*
+ * GPIO read/write skeleton with wakeup/sleep capability.
+ */
+static sint8 gpio_ioctl(uint8 op, uint8 u8GpioNum, uint8 u8InVal, uint8 * pu8OutVal)
+{
+	sint8 ret, gpio;
+
+	ret = hif_chip_wake();
+	if(ret != M2M_SUCCESS) goto _EXIT;
+
+	gpio = get_gpio_idx(u8GpioNum);
+	if(gpio < 0) goto _EXIT1;
+
+	if(op == GPIO_OP_DIR) {
+		ret = set_gpio_dir((uint8)gpio, u8InVal);
+	} else if(op == GPIO_OP_SET) {
+		ret = set_gpio_val((uint8)gpio, u8InVal);
+	} else if(op == GPIO_OP_GET) {
+		ret = get_gpio_val((uint8)gpio, pu8OutVal);
+	}
+	if(ret != M2M_SUCCESS) goto _EXIT1;
+
+_EXIT1:
+	ret = hif_chip_sleep();
+_EXIT:
+	return ret;
+}
+/*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
+FUNCTION IMPLEMENTATION
+*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
+
+
+sint8 m2m_periph_init(tstrPerphInitParam * param)
+{
+#ifdef ARDUINO
+	(void)param; // Silence "unused" warning
+#endif
+	return M2M_SUCCESS;
+}
+
+sint8 m2m_periph_gpio_set_dir(uint8 u8GpioNum, uint8 u8GpioDir)
+{
+	return gpio_ioctl(GPIO_OP_DIR, u8GpioNum, u8GpioDir, NULL);
+}
+
+sint8 m2m_periph_gpio_set_val(uint8 u8GpioNum, uint8 u8GpioVal)
+{
+	return gpio_ioctl(GPIO_OP_SET, u8GpioNum, u8GpioVal, NULL);
+}
+
+sint8 m2m_periph_gpio_get_val(uint8 u8GpioNum, uint8 * pu8GpioVal)
+{
+	return gpio_ioctl(GPIO_OP_GET, u8GpioNum, 0, pu8GpioVal);
+}
+
+sint8 m2m_periph_gpio_pullup_ctrl(uint8 u8GpioNum, uint8 u8PullupEn)
+{
+#ifdef ARDUINO
+	(void)u8GpioNum; // Silence "unused" warning
+	(void)u8PullupEn;
+#endif
+	/* TBD */
+	return M2M_SUCCESS;
+}
+
+sint8 m2m_periph_i2c_master_init(tstrI2cMasterInitParam * param)
+{
+#ifdef ARDUINO
+	// Silence "unused" warning
+	(void)param;
+#endif
+	/* TBD */
+	return M2M_SUCCESS;
+}
+
+sint8 m2m_periph_i2c_master_write(uint8 u8SlaveAddr, uint8 * pu8Buf, uint16 u16BufLen, uint8 flags)
+{
+#ifdef ARDUINO
+	// Silence "unused" warning
+	(void)u8SlaveAddr;
+	(void)pu8Buf;
+	(void)u16BufLen;
+	(void)flags;
+#endif
+	/* TBD */
+	return M2M_SUCCESS;
+}
+
+sint8 m2m_periph_i2c_master_read(uint8 u8SlaveAddr, uint8 * pu8Buf, uint16 u16BufLen, uint16 * pu16ReadLen, uint8 flags)
+{
+#ifdef ARDUINO
+	// Silence "unused" warning
+	(void)u8SlaveAddr;
+	(void)pu8Buf;
+	(void)u16BufLen;
+	(void)pu16ReadLen;
+	(void)flags;
+#endif
+	/* TBD */
+	return M2M_SUCCESS;
+}
+
+
+sint8 m2m_periph_pullup_ctrl(uint32 pinmask, uint8 enable)
+{
+	return pullup_ctrl(pinmask, enable);
+}
+#endif /* CONF_PERIPH */

libraries/lwIP_WINC1500/src/driver/source/nmasic.c

@@ -0,0 +1,688 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains NMC1500 ASIC specific internal APIs.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "common/include/nm_common.h"
+#include "driver/source/nmbus.h"
+#include "bsp/include/nm_bsp.h"
+#include "driver/source/nmasic.h"
+#include "driver/include/m2m_types.h"
+
+#define NMI_GLB_RESET_0				(NMI_PERIPH_REG_BASE + 0x400)
+#define NMI_INTR_REG_BASE			(NMI_PERIPH_REG_BASE + 0xa00)
+#define NMI_PIN_MUX_0				(NMI_PERIPH_REG_BASE + 0x408)
+#define NMI_INTR_ENABLE				(NMI_INTR_REG_BASE)
+#define GET_UINT32(X,Y)				(X[0+Y] + ((uint32)X[1+Y]<<8) + ((uint32)X[2+Y]<<16) +((uint32)X[3+Y]<<24))
+
+/*SPI and I2C only*/
+#define CORT_HOST_COMM				(0x10)
+#define HOST_CORT_COMM				(0x0b)
+#define WAKE_CLK_REG				(0x1)
+#define CLOCKS_EN_REG				(0xf)
+
+
+
+#ifdef ARDUINO
+#define TIMEOUT						(2000)
+#else
+#define TIMEOUT						(0xfffffffful)
+#endif
+#define WAKUP_TRAILS_TIMEOUT		(4)
+
+sint8 chip_apply_conf(uint32 u32Conf)
+{
+	sint8 ret = M2M_SUCCESS;
+	uint32 val32 = u32Conf;
+	
+#if (defined __ENABLE_PMU__) || (defined CONF_WINC_INT_PMU)
+	val32 |= rHAVE_USE_PMU_BIT;
+#endif
+#ifdef __ENABLE_SLEEP_CLK_SRC_RTC__
+	val32 |= rHAVE_SLEEP_CLK_SRC_RTC_BIT;
+#elif defined __ENABLE_SLEEP_CLK_SRC_XO__
+	val32 |= rHAVE_SLEEP_CLK_SRC_XO_BIT;
+#endif
+#ifdef __ENABLE_EXT_PA_INV_TX_RX__
+	val32 |= rHAVE_EXT_PA_INV_TX_RX;
+#endif
+#ifdef __ENABLE_LEGACY_RF_SETTINGS__
+	val32 |= rHAVE_LEGACY_RF_SETTINGS;
+#endif
+#ifdef __DISABLE_FIRMWARE_LOGS__
+	val32 |= rHAVE_LOGS_DISABLED_BIT;
+#endif
+
+	val32 |= rHAVE_RESERVED1_BIT;
+	do  {
+		nm_write_reg(rNMI_GP_REG_1, val32);
+		if(val32 != 0) {		
+			uint32 reg = 0;
+			ret = nm_read_reg_with_ret(rNMI_GP_REG_1, &reg);
+			if(ret == M2M_SUCCESS) {
+				if(reg == val32)
+					break;
+			}
+		} else {
+			break;
+		}
+	} while(1);
+
+	return M2M_SUCCESS;
+}
+void chip_idle(void)
+{
+	uint32 reg = 0;
+	nm_read_reg_with_ret(WAKE_CLK_REG, &reg);
+	if(reg & NBIT1)
+	{
+		reg &=~ NBIT1;
+		nm_write_reg(WAKE_CLK_REG, reg);
+	}
+}
+
+sint8 enable_interrupts(void)
+{
+	uint32 reg = 0;
+	sint8 ret = M2M_SUCCESS;
+	/**
+	interrupt pin mux select
+	**/
+	ret = nm_read_reg_with_ret(NMI_PIN_MUX_0, &reg);
+	if (M2M_SUCCESS != ret) goto ERR1;
+	
+	reg |= ((uint32) 1 << 8);
+	ret = nm_write_reg(NMI_PIN_MUX_0, reg);
+	if (M2M_SUCCESS != ret) goto ERR1;
+	
+	/**
+	interrupt enable
+	**/
+	ret = nm_read_reg_with_ret(NMI_INTR_ENABLE, &reg);
+	if (M2M_SUCCESS != ret) goto ERR1;
+	
+	reg |= ((uint32) 1 << 16);
+	ret = nm_write_reg(NMI_INTR_ENABLE, reg);
+	if (M2M_SUCCESS != ret) goto ERR1;
+ERR1:	
+	return ret;
+}
+
+sint8 cpu_start(void) {
+	uint32 reg = 0;
+	sint8 ret;
+
+	/**
+	reset regs
+	*/
+	ret = nm_write_reg(BOOTROM_REG,0);
+	ret += nm_write_reg(NMI_STATE_REG,0);
+	ret += nm_write_reg(NMI_REV_REG,0);
+	/**
+	Go...
+	**/
+	ret += nm_read_reg_with_ret(0x1118, &reg);
+	reg |= (1 << 0);
+	ret += nm_write_reg(0x1118, reg);
+	ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, &reg);
+	if ((reg & (1ul << 10)) == (1ul << 10)) {
+		reg &= ~(1ul << 10);
+		ret += nm_write_reg(NMI_GLB_RESET_0, reg);
+	}
+	reg |= (1ul << 10);
+	ret += nm_write_reg(NMI_GLB_RESET_0, reg);
+	nm_bsp_sleep(1);
+	return ret;
+}
+
+uint32 nmi_get_chipid(void)
+{
+	static uint32 chipid = 0;
+
+	if (chipid == 0) {
+		uint32 rfrevid;
+		
+		if((nm_read_reg_with_ret(0x1000, &chipid)) != M2M_SUCCESS) {
+			chipid = 0;
+			return 0;
+		}
+		//if((ret = nm_read_reg_with_ret(0x11fc, &revid)) != M2M_SUCCESS) {
+		//	return 0;
+		//}
+		if((nm_read_reg_with_ret(0x13f4, &rfrevid)) != M2M_SUCCESS) {
+			chipid = 0;
+			return 0;
+		}
+
+		if (chipid == 0x1002a0)  {
+			if (rfrevid == 0x1) { /* 1002A0 */
+			} else /* if (rfrevid == 0x2) */ { /* 1002A1 */
+				chipid = 0x1002a1;
+			}
+		} else if(chipid == 0x1002b0) {
+			if(rfrevid == 3) { /* 1002B0 */
+			} else if(rfrevid == 4) { /* 1002B1 */
+				chipid = 0x1002b1;
+			} else /* if(rfrevid == 5) */ { /* 1002B2 */
+				chipid = 0x1002b2;
+			}
+		}else if(chipid == 0x1000F0) { 
+			if((nm_read_reg_with_ret(0x3B0000, &chipid)) != M2M_SUCCESS) {
+			chipid = 0;
+			return 0;
+			}
+		}else {
+			
+		}
+//#define PROBE_FLASH
+#ifdef PROBE_FLASH
+		if(chipid) {
+			UWORD32 flashid;
+
+			flashid = probe_spi_flash();
+			if(flashid == 0x1230ef) {
+				chipid &= ~(0x0f0000);
+				chipid |= 0x050000;
+			}
+			if(flashid == 0xc21320c2) {
+				chipid &= ~(0x0f0000);
+				chipid |= 0x050000;
+			}
+		}
+#else
+		/*M2M is by default have SPI flash*/
+		chipid &= ~(0x0f0000);
+		chipid |= 0x050000;
+#endif /* PROBE_FLASH */
+	}
+	return chipid;
+}
+
+uint32 nmi_get_rfrevid(void)
+{
+    uint32 rfrevid;
+    if((nm_read_reg_with_ret(0x13f4, &rfrevid)) != M2M_SUCCESS) {
+        rfrevid = 0;
+        return 0;
+    }
+    return rfrevid;
+}
+
+void restore_pmu_settings_after_global_reset(void)
+{
+	/*
+	* Must restore PMU register value after
+	* global reset if PMU toggle is done at
+	* least once since the last hard reset.
+	*/
+	if(REV(nmi_get_chipid()) >= REV_2B0) {
+		nm_write_reg(0x1e48, 0xb78469ce);
+	}
+}
+
+void nmi_update_pll(void)
+{
+	uint32 pll;
+
+	pll = nm_read_reg(0x1428);
+	pll &= ~0x1ul;
+	nm_write_reg(0x1428, pll);
+	pll |= 0x1ul;
+	nm_write_reg(0x1428, pll);
+
+}
+void nmi_set_sys_clk_src_to_xo(void)
+{
+	uint32 val32;
+
+	/* Switch system clock source to XO. This will take effect after nmi_update_pll(). */
+	val32 = nm_read_reg(0x141c);
+	val32 |= (1 << 2);
+	nm_write_reg(0x141c, val32);
+
+	/* Do PLL update */
+	nmi_update_pll();
+}
+sint8 chip_sleep(void)
+{
+	uint32 reg;
+	sint8 ret = M2M_SUCCESS;
+	
+	while(1)
+	{
+		ret = nm_read_reg_with_ret(CORT_HOST_COMM,&reg);
+		if(ret != M2M_SUCCESS) goto ERR1;
+		if((reg & NBIT0) == 0) break;
+	}
+	
+	/* Clear bit 1 */
+	ret = nm_read_reg_with_ret(WAKE_CLK_REG, &reg);
+	if(ret != M2M_SUCCESS)goto ERR1;
+	if(reg & NBIT1)
+	{
+		reg &=~NBIT1;
+		ret = nm_write_reg(WAKE_CLK_REG, reg);
+		if(ret != M2M_SUCCESS)goto ERR1;
+	}
+	
+	ret = nm_read_reg_with_ret(HOST_CORT_COMM, &reg);
+	if(ret != M2M_SUCCESS)goto ERR1;
+	if(reg & NBIT0)
+	{
+		reg &= ~NBIT0;
+		ret = nm_write_reg(HOST_CORT_COMM, reg);
+		if(ret != M2M_SUCCESS)goto ERR1;
+	}
+
+ERR1:
+	return ret;
+}
+sint8 chip_wake(void)
+{
+	sint8 ret = M2M_SUCCESS;
+	uint32 reg = 0, clk_status_reg = 0,trials = 0;
+
+	ret = nm_read_reg_with_ret(HOST_CORT_COMM, &reg);
+	if(ret != M2M_SUCCESS)goto _WAKE_EXIT;
+	
+	if(!(reg & NBIT0))
+	{
+		/*USE bit 0 to indicate host wakeup*/
+		ret = nm_write_reg(HOST_CORT_COMM, reg|NBIT0);
+		if(ret != M2M_SUCCESS)goto _WAKE_EXIT;
+	}
+		
+	ret = nm_read_reg_with_ret(WAKE_CLK_REG, &reg);
+	if(ret != M2M_SUCCESS)goto _WAKE_EXIT;
+	/* Set bit 1 */
+	if(!(reg & NBIT1))
+	{
+		ret = nm_write_reg(WAKE_CLK_REG, reg | NBIT1);
+		if(ret != M2M_SUCCESS) goto _WAKE_EXIT;	
+	}
+
+	do
+	{
+		ret = nm_read_reg_with_ret(CLOCKS_EN_REG, &clk_status_reg);
+		if(ret != M2M_SUCCESS) {
+			M2M_ERR("Bus error (5).%d %lx\n",ret,clk_status_reg);
+			goto _WAKE_EXIT;
+		}
+		if(clk_status_reg & NBIT2) {
+			break;
+		}
+		nm_bsp_sleep(2);
+		trials++;
+		if(trials > WAKUP_TRAILS_TIMEOUT)
+		{
+			M2M_ERR("Failed to wakup the chip\n");
+			ret = M2M_ERR_TIME_OUT;
+			goto _WAKE_EXIT;
+		}
+	}while(1);
+	
+	/*workaround sometimes spi fail to read clock regs after reading/writing clockless registers*/
+	nm_bus_reset();
+	
+_WAKE_EXIT:
+	return ret;
+}
+sint8 cpu_halt(void)
+{
+	sint8 ret;
+	uint32 reg = 0;
+	ret = nm_read_reg_with_ret(0x1118, &reg);
+	reg |= (1 << 0);
+	ret += nm_write_reg(0x1118, reg);
+	ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, &reg);
+	if ((reg & (1ul << 10)) == (1ul << 10)) {
+		reg &= ~(1ul << 10);
+		ret += nm_write_reg(NMI_GLB_RESET_0, reg);
+		ret += nm_read_reg_with_ret(NMI_GLB_RESET_0, &reg);
+	}
+	return ret;
+}
+sint8 chip_reset_and_cpu_halt(void)
+{
+	sint8 ret = M2M_SUCCESS;
+
+	/*Wakeup needed only for I2C interface*/
+	ret = chip_wake();
+	if(ret != M2M_SUCCESS) goto ERR1;
+	/*Reset and CPU halt need for no wait board only*/
+	ret = chip_reset();
+	if(ret != M2M_SUCCESS) goto ERR1;
+	ret = cpu_halt();
+	if(ret != M2M_SUCCESS) goto ERR1;	
+ERR1:
+	return ret;
+}
+sint8 chip_reset(void)
+{
+	sint8 ret = M2M_SUCCESS;
+	ret = nm_write_reg(NMI_GLB_RESET_0, 0);
+	nm_bsp_sleep(50);
+	return ret;
+}
+
+sint8 wait_for_bootrom(uint8 arg)
+{
+	sint8 ret = M2M_SUCCESS;
+	uint32 reg = 0, cnt = 0;
+	uint32 u32GpReg1 = 0;
+	uint32 u32DriverVerInfo = M2M_MAKE_VERSION_INFO(M2M_RELEASE_VERSION_MAJOR_NO,\
+				M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO,\
+				M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO,\
+				M2M_RELEASE_VERSION_PATCH_NO);
+
+
+	reg = 0;
+	while(1) {
+		reg = nm_read_reg(0x1014);	/* wait for efuse loading done */
+		if (reg & 0x80000000) {
+			break;
+		}
+		nm_bsp_sleep(1); /* TODO: Why bus error if this delay is not here. */
+	}
+	reg = nm_read_reg(M2M_WAIT_FOR_HOST_REG);
+	reg &= 0x1;
+
+	/* check if waiting for the host will be skipped or not */
+	if(reg == 0)
+	{
+		reg = 0;
+		while(reg != M2M_FINISH_BOOT_ROM)
+		{
+			nm_bsp_sleep(1);
+			reg = nm_read_reg(BOOTROM_REG);
+
+			if(++cnt > TIMEOUT)
+			{
+				M2M_DBG("failed to load firmware from flash.\n");
+				ret = M2M_ERR_INIT;
+				goto ERR2;
+			}
+		}
+	}
+	
+	if(M2M_WIFI_MODE_ATE_HIGH == arg) {
+		nm_write_reg(NMI_REV_REG, M2M_ATE_FW_START_VALUE);
+		nm_write_reg(NMI_STATE_REG, NBIT20);
+	}else if(M2M_WIFI_MODE_ATE_LOW == arg) {
+		nm_write_reg(NMI_REV_REG, M2M_ATE_FW_START_VALUE);
+		nm_write_reg(NMI_STATE_REG, 0);
+	}else if(M2M_WIFI_MODE_ETHERNET == arg){
+		u32GpReg1 = rHAVE_ETHERNET_MODE_BIT;
+		nm_write_reg(NMI_STATE_REG, u32DriverVerInfo);
+	} else {
+		/*bypass this step*/
+		nm_write_reg(NMI_STATE_REG, u32DriverVerInfo);
+	}
+
+	if(REV(nmi_get_chipid()) >= REV_3A0){
+		chip_apply_conf(u32GpReg1 | rHAVE_USE_PMU_BIT);
+	} else {
+		chip_apply_conf(u32GpReg1);
+	}
+	M2M_INFO("DriverVerInfo: 0x%08lx\n",u32DriverVerInfo);
+
+	nm_write_reg(BOOTROM_REG,M2M_START_FIRMWARE);
+
+#ifdef __ROM_TEST__
+	rom_test();
+#endif /* __ROM_TEST__ */
+
+ERR2:
+	return ret;
+}
+
+sint8 wait_for_firmware_start(uint8 arg)
+{
+	sint8 ret = M2M_SUCCESS;
+	uint32 reg = 0, cnt = 0;
+	uint32 u32Timeout = TIMEOUT;
+	volatile uint32 regAddress = NMI_STATE_REG;
+	volatile uint32 checkValue = M2M_FINISH_INIT_STATE;
+	
+	if((M2M_WIFI_MODE_ATE_HIGH == arg)||(M2M_WIFI_MODE_ATE_LOW == arg)) {
+		regAddress = NMI_REV_REG;
+		checkValue = M2M_ATE_FW_IS_UP_VALUE;
+	} else {
+		/*bypass this step*/
+	}
+	
+	
+	while (checkValue != reg)
+	{
+		nm_bsp_sleep(2); /* TODO: Why bus error if this delay is not here. */
+		M2M_DBG("%x %x %x\n",(unsigned int)nm_read_reg(0x108c),(unsigned int)nm_read_reg(0x108c),(unsigned int)nm_read_reg(0x14A0));
+		reg = nm_read_reg(regAddress);
+		if(++cnt >= u32Timeout)
+		{
+			M2M_DBG("Time out for wait firmware Run\n");
+			ret = M2M_ERR_INIT;
+			goto ERR;
+		}
+	}
+	if(M2M_FINISH_INIT_STATE == checkValue)
+	{
+		nm_write_reg(NMI_STATE_REG, 0);
+	}
+ERR:
+	return ret;
+}
+
+sint8 chip_deinit(void)
+{
+	uint32 reg = 0;
+	sint8 ret;
+
+	/**
+	stop the firmware, need a re-download
+	**/
+	ret = nm_read_reg_with_ret(NMI_GLB_RESET_0, &reg);
+	if (ret != M2M_SUCCESS) {
+		M2M_ERR("failed to de-initialize\n");
+		goto ERR1;
+	}
+	reg &= ~(1 << 10);
+	ret = nm_write_reg(NMI_GLB_RESET_0, reg);
+	if (ret != M2M_SUCCESS) {
+		M2M_ERR("failed to de-initialize\n");
+		goto ERR1;
+	}
+
+ERR1:
+	return ret;
+}
+
+#ifdef CONF_PERIPH
+
+sint8 set_gpio_dir(uint8 gpio, uint8 dir)
+{
+	uint32 val32;
+	sint8 ret;
+
+	ret = nm_read_reg_with_ret(0x20108, &val32);
+	if(ret != M2M_SUCCESS) goto _EXIT;
+
+	if(dir) {
+		val32 |= (1ul << gpio);
+	} else {
+		val32 &= ~(1ul << gpio);
+	}
+
+	ret = nm_write_reg(0x20108, val32);
+
+_EXIT:
+	return ret;
+}
+sint8 set_gpio_val(uint8 gpio, uint8 val)
+{
+	uint32 val32;
+	sint8 ret;
+
+	ret = nm_read_reg_with_ret(0x20100, &val32);
+	if(ret != M2M_SUCCESS) goto _EXIT;
+
+	if(val) {
+		val32 |= (1ul << gpio);
+	} else {
+		val32 &= ~(1ul << gpio);
+	}
+
+	ret = nm_write_reg(0x20100, val32);
+
+_EXIT:
+	return ret;
+}
+
+sint8 get_gpio_val(uint8 gpio, uint8* val)
+{
+	uint32 val32;
+	sint8 ret;
+
+	ret = nm_read_reg_with_ret(0x20104, &val32);
+	if(ret != M2M_SUCCESS) goto _EXIT;
+
+	*val = (uint8)((val32 >> gpio) & 0x01);
+
+_EXIT:
+	return ret;
+}
+
+sint8 pullup_ctrl(uint32 pinmask, uint8 enable)
+{
+	sint8 s8Ret;
+	uint32 val32;
+	s8Ret = nm_read_reg_with_ret(0x142c, &val32);
+	if(s8Ret != M2M_SUCCESS) {
+		M2M_ERR("[pullup_ctrl]: failed to read\n");
+		goto _EXIT;
+	}
+	if(enable) {
+		val32 &= ~pinmask;
+		} else {
+		val32 |= pinmask;
+	}
+	s8Ret = nm_write_reg(0x142c, val32);
+	if(s8Ret  != M2M_SUCCESS) {
+		M2M_ERR("[pullup_ctrl]: failed to write\n");
+		goto _EXIT;
+	}
+_EXIT:
+	return s8Ret;
+}
+#endif /* CONF_PERIPH */
+
+sint8 nmi_get_otp_mac_address(uint8 *pu8MacAddr,  uint8 * pu8IsValid)
+{
+	sint8 ret;
+	uint32	u32RegValue;
+	uint8	mac[6];
+	tstrGpRegs strgp = {0};
+
+	ret = nm_read_reg_with_ret(rNMI_GP_REG_2, &u32RegValue);
+	if(ret != M2M_SUCCESS) goto _EXIT_ERR;
+#ifdef ARDUINO
+	if (u32RegValue) {
+		ret = nm_read_block(u32RegValue|0x30000,(uint8*)&strgp,sizeof(tstrGpRegs));
+		if(ret != M2M_SUCCESS) goto _EXIT_ERR;
+		u32RegValue = strgp.u32Mac_efuse_mib;
+	} else {
+		// firmware version 19.3.0
+		ret = nm_read_reg_with_ret(rNMI_GP_REG_0, &u32RegValue);
+		if(ret != M2M_SUCCESS) goto _EXIT_ERR;
+	}
+#else
+	ret = nm_read_block(u32RegValue|0x30000,(uint8*)&strgp,sizeof(tstrGpRegs));
+	if(ret != M2M_SUCCESS) goto _EXIT_ERR;
+	u32RegValue = strgp.u32Mac_efuse_mib;
+#endif
+	if(!EFUSED_MAC(u32RegValue)) {
+		M2M_DBG("Default MAC\n");
+		m2m_memset(pu8MacAddr, 0, 6);
+		goto _EXIT_ERR;
+	}
+
+	M2M_DBG("OTP MAC\n");
+	u32RegValue >>=16;
+	ret = nm_read_block(u32RegValue|0x30000, mac, 6);
+	m2m_memcpy(pu8MacAddr,mac,6);
+	if(pu8IsValid) *pu8IsValid = 1;
+	return ret;
+
+_EXIT_ERR:
+	if(pu8IsValid) *pu8IsValid = 0;
+	return ret;
+}
+
+sint8 nmi_get_mac_address(uint8 *pu8MacAddr)
+{
+	sint8 ret;
+	uint32	u32RegValue;
+	uint8	mac[6];
+	tstrGpRegs strgp = {0};
+
+	ret = nm_read_reg_with_ret(rNMI_GP_REG_2, &u32RegValue);
+	if(ret != M2M_SUCCESS) goto _EXIT_ERR;
+#ifdef ARDUINO
+	if (u32RegValue) {
+		ret = nm_read_block(u32RegValue|0x30000,(uint8*)&strgp,sizeof(tstrGpRegs));
+		if(ret != M2M_SUCCESS) goto _EXIT_ERR;
+		u32RegValue = strgp.u32Mac_efuse_mib;
+	} else {
+		// firmware version 19.3.0
+		ret = nm_read_reg_with_ret(rNMI_GP_REG_0, &u32RegValue);
+		if(ret != M2M_SUCCESS) goto _EXIT_ERR;
+	}
+#else
+	ret = nm_read_block(u32RegValue|0x30000,(uint8*)&strgp,sizeof(tstrGpRegs));
+	if(ret != M2M_SUCCESS) goto _EXIT_ERR;
+	u32RegValue = strgp.u32Mac_efuse_mib;
+#endif
+	u32RegValue &=0x0000ffff;
+	ret = nm_read_block(u32RegValue|0x30000, mac, 6);
+	m2m_memcpy(pu8MacAddr, mac, 6);
+
+	return ret;
+
+_EXIT_ERR:
+	return ret;
+}

libraries/lwIP_WINC1500/src/driver/source/nmasic.h

@@ -0,0 +1,215 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains NMC1500 ASIC specific internal APIs.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+#ifndef _NMASIC_H_
+#define _NMASIC_H_
+
+#include "common/include/nm_common.h"
+
+#define NMI_PERIPH_REG_BASE     0x1000
+#define NMI_CHIPID	            (NMI_PERIPH_REG_BASE)
+#define rNMI_GP_REG_0			(0x149c)
+#define rNMI_GP_REG_1			(0x14A0)
+#define rNMI_GP_REG_2			(0xc0008)
+#define rNMI_GLB_RESET			(0x1400)
+#define rNMI_BOOT_RESET_MUX		(0x1118)
+#define NMI_STATE_REG			(0x108c)
+#define BOOTROM_REG				(0xc000c)
+#define NMI_REV_REG  			(0x207ac)	/*Also, Used to load ATE firmware from SPI Flash and to ensure that it is running too*/
+#define NMI_REV_REG_ATE			(0x1048) 	/*Revision info register in case of ATE FW*/
+#define M2M_WAIT_FOR_HOST_REG 	(0x207bc)
+#define M2M_FINISH_INIT_STATE 	0x02532636UL
+#define M2M_FINISH_BOOT_ROM   	 0x10add09eUL
+#define M2M_START_FIRMWARE   	 0xef522f61UL
+#define M2M_START_PS_FIRMWARE    0x94992610UL
+
+#define M2M_ATE_FW_START_VALUE	(0x3C1CD57D)	/*Also, Change this value in boot_firmware if it will be changed here*/
+#define M2M_ATE_FW_IS_UP_VALUE	(0xD75DC1C3)	/*Also, Change this value in ATE (Burst) firmware if it will be changed here*/
+
+#define REV_2B0        (0x2B0)
+#define REV_B0         (0x2B0)
+#define REV_3A0        (0x3A0)
+#define GET_CHIPID()	nmi_get_chipid()
+#define ISNMC1000(id)   ((((id) & 0xfffff000) == 0x100000) ? 1 : 0)
+#define ISNMC1500(id)   ((((id) & 0xfffff000) == 0x150000) ? 1 : 0)
+#define ISNMC3000(id)   ((((id) & 0xfff00000) == 0x300000) ? 1 : 0)
+#define REV(id)         (((id) & 0x00000fff ))
+#define EFUSED_MAC(value) (value & 0xffff0000)
+
+#define rHAVE_SDIO_IRQ_GPIO_BIT     (NBIT0)
+#define rHAVE_USE_PMU_BIT           (NBIT1)
+#define rHAVE_SLEEP_CLK_SRC_RTC_BIT (NBIT2)
+#define rHAVE_SLEEP_CLK_SRC_XO_BIT  (NBIT3)
+#define rHAVE_EXT_PA_INV_TX_RX      (NBIT4)
+#define rHAVE_LEGACY_RF_SETTINGS    (NBIT5)
+#define rHAVE_LOGS_DISABLED_BIT		(NBIT6)
+#define rHAVE_ETHERNET_MODE_BIT		(NBIT7)
+#define rHAVE_RESERVED1_BIT     	(NBIT8)
+
+typedef struct{
+	uint32 u32Mac_efuse_mib;
+	uint32 u32Firmware_Ota_rev;
+}tstrGpRegs;
+
+#ifdef __cplusplus
+     extern "C" {
+#endif
+
+/*
+*	@fn		cpu_halt
+*	@brief	
+*/
+sint8 cpu_halt(void);
+/*
+*	@fn		chip_sleep
+*	@brief	
+*/
+sint8 chip_sleep(void);
+/*
+*	@fn		chip_wake
+*	@brief	
+*/
+sint8 chip_wake(void);
+/*
+*	@fn		chip_idle
+*	@brief	
+*/
+void chip_idle(void);
+/*
+*	@fn		enable_interrupts
+*	@brief	
+*/
+sint8 enable_interrupts(void);
+/*
+*	@fn		cpu_start	
+*	@brief	
+*/
+sint8 cpu_start(void);
+/*
+*	@fn		nmi_get_chipid
+*	@brief	
+*/
+uint32 nmi_get_chipid(void);
+/*
+*	@fn		nmi_get_rfrevid
+*	@brief	
+*/
+uint32 nmi_get_rfrevid(void);
+/*
+*	@fn		restore_pmu_settings_after_global_reset
+*	@brief	
+*/
+void restore_pmu_settings_after_global_reset(void);
+/*
+*	@fn		nmi_update_pll
+*	@brief	
+*/
+void nmi_update_pll(void);
+/*
+*	@fn		nmi_set_sys_clk_src_to_xo
+*	@brief	
+*/
+void nmi_set_sys_clk_src_to_xo(void);
+/*
+*	@fn		chip_reset
+*	@brief	
+*/
+sint8 chip_reset(void);
+/*
+*	@fn		wait_for_bootrom
+*	@brief	
+*/
+sint8 wait_for_bootrom(uint8);
+/*
+*	@fn		wait_for_firmware_start
+*	@brief	
+*/
+sint8 wait_for_firmware_start(uint8);
+/*
+*	@fn		chip_deinit
+*	@brief	
+*/
+sint8 chip_deinit(void);
+/*
+*	@fn		chip_reset_and_cpu_halt
+*	@brief	
+*/
+sint8 chip_reset_and_cpu_halt(void);
+/*
+*	@fn		set_gpio_dir
+*	@brief	
+*/
+sint8 set_gpio_dir(uint8 gpio, uint8 dir);
+/*
+*	@fn		set_gpio_val
+*	@brief	
+*/
+sint8 set_gpio_val(uint8 gpio, uint8 val);
+/*
+*	@fn		get_gpio_val
+*	@brief	
+*/
+sint8 get_gpio_val(uint8 gpio, uint8* val);
+/*
+*	@fn		pullup_ctrl
+*	@brief	
+*/
+sint8 pullup_ctrl(uint32 pinmask, uint8 enable);
+/*
+*	@fn		nmi_get_otp_mac_address
+*	@brief	
+*/
+sint8 nmi_get_otp_mac_address(uint8 *pu8MacAddr, uint8 * pu8IsValid);
+/*
+*	@fn		nmi_get_mac_address
+*	@brief	
+*/
+sint8 nmi_get_mac_address(uint8 *pu8MacAddr);
+/*
+*	@fn		chip_apply_conf
+*	@brief	
+*/
+sint8 chip_apply_conf(uint32 u32conf);
+
+#ifdef __cplusplus
+	 }
+#endif
+
+#endif	/*_NMASIC_H_*/

libraries/lwIP_WINC1500/src/driver/source/nmbus.c

@@ -0,0 +1,301 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains NMC1000 bus APIs implementation.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+#ifndef CORTUS_APP
+
+#include "nmbus.h"
+#include "nmi2c.h"
+#include "nmspi.h"
+#include "nmuart.h"
+
+#define MAX_TRX_CFG_SZ		8
+
+/**
+*	@fn		nm_bus_iface_init
+*	@brief	Initialize bus interface
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	M. Abdelmawla
+*	@date	11 July 2012
+*	@version	1.0
+*/
+sint8 nm_bus_iface_init(void *pvInitVal)
+{
+	sint8 ret = M2M_SUCCESS;
+	ret = nm_bus_init(pvInitVal);
+	return ret;
+}
+
+/**
+*	@fn		nm_bus_iface_deinit
+*	@brief	Deinitialize bus interface
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	Samer Sarhan
+*	@date	07 April 2014
+*	@version	1.0
+*/
+sint8 nm_bus_iface_deinit(void)
+{
+	sint8 ret = M2M_SUCCESS;
+	ret = nm_bus_deinit();
+
+	return ret;
+}
+
+/**
+*	@fn		nm_bus_reset
+*	@brief	reset bus interface
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@version	1.0
+*/
+sint8 nm_bus_reset(void)
+{
+	sint8 ret = M2M_SUCCESS;
+#ifdef CONF_WINC_USE_UART
+#elif defined (CONF_WINC_USE_SPI)
+	return nm_spi_reset();
+#elif defined (CONF_WINC_USE_I2C)
+#else
+#error "Plesae define bus usage"
+#endif
+
+	return ret;
+}
+
+/**
+*	@fn		nm_bus_iface_reconfigure
+*	@brief	reconfigure bus interface
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	Viswanathan Murugesan
+*	@date	22 Oct 2014
+*	@version	1.0
+*/
+sint8 nm_bus_iface_reconfigure(void *ptr)
+{
+#ifdef ARDUINO
+	(void)ptr; // Silence "unused" warning
+#endif
+	sint8 ret = M2M_SUCCESS;
+#ifdef CONF_WINC_USE_UART
+	ret = nm_uart_reconfigure(ptr);
+#endif
+	return ret;
+}
+/*
+*	@fn		nm_read_reg
+*	@brief	Read register
+*	@param [in]	u32Addr
+*				Register address
+*	@return	Register value
+*	@author	M. Abdelmawla
+*	@date	11 July 2012
+*	@version	1.0
+*/
+uint32 nm_read_reg(uint32 u32Addr)
+{
+#ifdef CONF_WINC_USE_UART
+	return nm_uart_read_reg(u32Addr);
+#elif defined (CONF_WINC_USE_SPI)
+	return nm_spi_read_reg(u32Addr);
+#elif defined (CONF_WINC_USE_I2C)
+	return nm_i2c_read_reg(u32Addr);
+#else
+#error "Plesae define bus usage"
+#endif
+
+}
+
+/*
+*	@fn		nm_read_reg_with_ret
+*	@brief	Read register with error code return
+*	@param [in]	u32Addr
+*				Register address
+*	@param [out]	pu32RetVal
+*				Pointer to u32 variable used to return the read value
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	M. Abdelmawla
+*	@date	11 July 2012
+*	@version	1.0
+*/
+sint8 nm_read_reg_with_ret(uint32 u32Addr, uint32* pu32RetVal)
+{
+#ifdef CONF_WINC_USE_UART
+	return nm_uart_read_reg_with_ret(u32Addr,pu32RetVal);
+#elif defined (CONF_WINC_USE_SPI)
+	return nm_spi_read_reg_with_ret(u32Addr,pu32RetVal);
+#elif defined (CONF_WINC_USE_I2C)
+	return nm_i2c_read_reg_with_ret(u32Addr,pu32RetVal);
+#else
+#error "Plesae define bus usage"
+#endif
+}
+
+/*
+*	@fn		nm_write_reg
+*	@brief	write register
+*	@param [in]	u32Addr
+*				Register address
+*	@param [in]	u32Val
+*				Value to be written to the register
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	M. Abdelmawla
+*	@date	11 July 2012
+*	@version	1.0
+*/
+sint8 nm_write_reg(uint32 u32Addr, uint32 u32Val)
+{
+#ifdef CONF_WINC_USE_UART
+	return nm_uart_write_reg(u32Addr,u32Val);
+#elif defined (CONF_WINC_USE_SPI)
+	return nm_spi_write_reg(u32Addr,u32Val);
+#elif defined (CONF_WINC_USE_I2C)
+	return nm_i2c_write_reg(u32Addr,u32Val);
+#else
+#error "Plesae define bus usage"
+#endif
+}
+
+static sint8 p_nm_read_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
+{
+#ifdef CONF_WINC_USE_UART
+	return nm_uart_read_block(u32Addr,puBuf,u16Sz);
+#elif defined (CONF_WINC_USE_SPI)
+	return nm_spi_read_block(u32Addr,puBuf,u16Sz);
+#elif defined (CONF_WINC_USE_I2C)
+	return nm_i2c_read_block(u32Addr,puBuf,u16Sz);
+#else
+#error "Plesae define bus usage"
+#endif
+
+}
+/*
+*	@fn		nm_read_block
+*	@brief	Read block of data
+*	@param [in]	u32Addr
+*				Start address
+*	@param [out]	puBuf
+*				Pointer to a buffer used to return the read data
+*	@param [in]	u32Sz
+*				Number of bytes to read. The buffer size must be >= u32Sz
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	M. Abdelmawla
+*	@date	11 July 2012
+*	@version	1.0
+*/ 
+sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
+{
+	uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz - MAX_TRX_CFG_SZ;
+	uint32 off = 0;
+	sint8 s8Ret = M2M_SUCCESS;
+
+	for(;;)
+	{
+		if(u32Sz <= u16MaxTrxSz)
+		{
+			s8Ret += p_nm_read_block(u32Addr, &puBuf[off], (uint16)u32Sz);	
+			break;
+		}
+		else
+		{
+			s8Ret += p_nm_read_block(u32Addr, &puBuf[off], u16MaxTrxSz);
+			if(M2M_SUCCESS != s8Ret) break;
+			u32Sz -= u16MaxTrxSz;
+			off += u16MaxTrxSz;
+			u32Addr += u16MaxTrxSz;
+		}
+	}
+
+	return s8Ret;
+}
+
+static sint8 p_nm_write_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz)
+{
+#ifdef CONF_WINC_USE_UART
+	return nm_uart_write_block(u32Addr,puBuf,u16Sz);
+#elif defined (CONF_WINC_USE_SPI)
+	return nm_spi_write_block(u32Addr,puBuf,u16Sz);
+#elif defined (CONF_WINC_USE_I2C)
+	return nm_i2c_write_block(u32Addr,puBuf,u16Sz);
+#else
+#error "Plesae define bus usage"
+#endif
+
+}
+/**
+*	@fn		nm_write_block
+*	@brief	Write block of data
+*	@param [in]	u32Addr
+*				Start address
+*	@param [in]	puBuf
+*				Pointer to the buffer holding the data to be written
+*	@param [in]	u32Sz
+*				Number of bytes to write. The buffer size must be >= u32Sz
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	M. Abdelmawla
+*	@date	11 July 2012
+*	@version	1.0
+*/ 
+sint8 nm_write_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz)
+{
+	uint16 u16MaxTrxSz = egstrNmBusCapabilities.u16MaxTrxSz - MAX_TRX_CFG_SZ;
+	uint32 off = 0;
+	sint8 s8Ret = M2M_SUCCESS;
+
+	for(;;)
+	{
+		if(u32Sz <= u16MaxTrxSz)
+		{
+			s8Ret += p_nm_write_block(u32Addr, &puBuf[off], (uint16)u32Sz);	
+			break;
+		}
+		else
+		{
+			s8Ret += p_nm_write_block(u32Addr, &puBuf[off], u16MaxTrxSz);
+			if(M2M_SUCCESS != s8Ret) break;
+			u32Sz -= u16MaxTrxSz;
+			off += u16MaxTrxSz;
+			u32Addr += u16MaxTrxSz;
+		}
+	}
+
+	return s8Ret;
+}
+
+#endif
+

libraries/lwIP_WINC1500/src/driver/source/nmbus.h

@@ -0,0 +1,147 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains NMC1000 bus APIs implementation.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _NMBUS_H_
+#define _NMBUS_H_
+
+#include "common/include/nm_common.h"
+#include "bus_wrapper/include/nm_bus_wrapper.h"
+
+
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+/**
+*	@fn		nm_bus_iface_init
+*	@brief	Initialize bus interface
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+sint8 nm_bus_iface_init(void *);
+
+
+/**
+*	@fn		nm_bus_iface_deinit
+*	@brief	Deinitialize bus interface
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+sint8 nm_bus_iface_deinit(void);
+
+/**
+*	@fn		nm_bus_reset
+*	@brief	reset bus interface
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@version	1.0
+*/
+sint8 nm_bus_reset(void);
+
+/**
+*	@fn		nm_bus_iface_reconfigure
+*	@brief	reconfigure bus interface
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+sint8 nm_bus_iface_reconfigure(void *ptr);
+
+/**
+*	@fn		nm_read_reg
+*	@brief	Read register
+*	@param [in]	u32Addr
+*				Register address
+*	@return	Register value
+*/
+uint32 nm_read_reg(uint32 u32Addr);
+
+/**
+*	@fn		nm_read_reg_with_ret
+*	@brief	Read register with error code return
+*	@param [in]	u32Addr
+*				Register address
+*	@param [out]	pu32RetVal
+*				Pointer to u32 variable used to return the read value
+*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+sint8 nm_read_reg_with_ret(uint32 u32Addr, uint32* pu32RetVal);
+
+/**
+*	@fn		nm_write_reg
+*	@brief	write register
+*	@param [in]	u32Addr
+*				Register address
+*	@param [in]	u32Val
+*				Value to be written to the register
+*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+sint8 nm_write_reg(uint32 u32Addr, uint32 u32Val);
+
+/**
+*	@fn		nm_read_block
+*	@brief	Read block of data
+*	@param [in]	u32Addr
+*				Start address
+*	@param [out]	puBuf
+*				Pointer to a buffer used to return the read data
+*	@param [in]	u32Sz
+*				Number of bytes to read. The buffer size must be >= u32Sz
+*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/ 
+sint8 nm_read_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz);
+
+/**
+*	@fn		nm_write_block
+*	@brief	Write block of data
+*	@param [in]	u32Addr
+*				Start address
+*	@param [in]	puBuf
+*				Pointer to the buffer holding the data to be written
+*	@param [in]	u32Sz
+*				Number of bytes to write. The buffer size must be >= u32Sz
+*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/ 
+sint8 nm_write_block(uint32 u32Addr, uint8 *puBuf, uint32 u32Sz);
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _NMBUS_H_ */

libraries/lwIP_WINC1500/src/driver/source/nmdrv.c

@@ -0,0 +1,408 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains NMC1000 M2M driver APIs implementation.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "common/include/nm_common.h"
+#include "driver/source/nmbus.h"
+#include "bsp/include/nm_bsp.h"
+#include "driver/source/nmdrv.h"
+#include "driver/source/nmasic.h"
+#include "driver/include/m2m_types.h"
+#include "spi_flash/include/spi_flash.h"
+
+#ifdef CONF_WINC_USE_SPI
+#include "driver/source/nmspi.h"
+#endif
+
+#ifdef ARDUINO
+	uint32 nmdrv_firm_ver = 0;
+#endif
+
+/**
+*	@fn		nm_get_firmware_info(tstrM2mRev* M2mRev)
+*	@brief	Get Firmware version info
+*	@param [out]	M2mRev
+*			    pointer holds address of structure "tstrM2mRev" that contains the firmware version parameters
+*	@version	1.0
+*/
+sint8 nm_get_firmware_info(tstrM2mRev* M2mRev)
+{
+	uint16  curr_drv_ver, min_req_drv_ver,curr_firm_ver;
+	uint32	reg = 0;
+	sint8	ret = M2M_SUCCESS;
+
+	ret = nm_read_reg_with_ret(NMI_REV_REG, &reg);
+	//In case the Firmware running is ATE fw
+	if(M2M_ATE_FW_IS_UP_VALUE == reg)
+	{
+		//Read FW info again from the register specified for ATE
+		ret = nm_read_reg_with_ret(NMI_REV_REG_ATE, &reg);
+	}
+	M2mRev->u8DriverMajor	= M2M_GET_DRV_MAJOR(reg);
+	M2mRev->u8DriverMinor   = M2M_GET_DRV_MINOR(reg);
+	M2mRev->u8DriverPatch	= M2M_GET_DRV_PATCH(reg);
+	M2mRev->u8FirmwareMajor	= M2M_GET_FW_MAJOR(reg);
+	M2mRev->u8FirmwareMinor = M2M_GET_FW_MINOR(reg);
+	M2mRev->u8FirmwarePatch = M2M_GET_FW_PATCH(reg);
+	M2mRev->u32Chipid	= nmi_get_chipid();
+	M2mRev->u16FirmwareSvnNum = 0;
+	
+	curr_firm_ver   = M2M_MAKE_VERSION(M2mRev->u8FirmwareMajor, M2mRev->u8FirmwareMinor,M2mRev->u8FirmwarePatch);
+#ifdef ARDUINO
+	nmdrv_firm_ver  = curr_firm_ver;
+#endif
+	curr_drv_ver    = M2M_MAKE_VERSION(M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO);
+	min_req_drv_ver = M2M_MAKE_VERSION(M2mRev->u8DriverMajor, M2mRev->u8DriverMinor,M2mRev->u8DriverPatch);
+	if(curr_drv_ver <  min_req_drv_ver) {
+		/*The current driver version should be larger or equal 
+		than the min driver that the current firmware support  */
+		ret = M2M_ERR_FW_VER_MISMATCH;
+	}
+	if(curr_drv_ver >  curr_firm_ver) {
+		/*The current driver should be equal or less than the firmware version*/
+		ret = M2M_ERR_FW_VER_MISMATCH;
+	}
+	return ret;
+}
+/**
+*	@fn		nm_get_firmware_info(tstrM2mRev* M2mRev)
+*	@brief	Get Firmware version info
+*	@param [out]	M2mRev
+*			    pointer holds address of structure "tstrM2mRev" that contains the firmware version parameters
+*	@version	1.0
+*/
+sint8 nm_get_firmware_full_info(tstrM2mRev* pstrRev)
+{
+	uint16  curr_drv_ver, min_req_drv_ver,curr_firm_ver;
+	uint32	reg = 0;
+	sint8	ret = M2M_SUCCESS;
+	tstrGpRegs strgp = {0};
+	if (pstrRev != NULL)
+	{
+		m2m_memset((uint8*)pstrRev,0,sizeof(tstrM2mRev));
+		ret = nm_read_reg_with_ret(rNMI_GP_REG_2, &reg);
+		if(ret == M2M_SUCCESS)
+		{
+			if(reg != 0)
+			{
+				ret = nm_read_block(reg|0x30000,(uint8*)&strgp,sizeof(tstrGpRegs));
+				if(ret == M2M_SUCCESS)
+				{
+					reg = strgp.u32Firmware_Ota_rev;
+					reg &= 0x0000ffff;
+					if(reg != 0)
+					{
+						ret = nm_read_block(reg|0x30000,(uint8*)pstrRev,sizeof(tstrM2mRev));
+						if(ret == M2M_SUCCESS)
+						{
+							curr_firm_ver   = M2M_MAKE_VERSION(pstrRev->u8FirmwareMajor, pstrRev->u8FirmwareMinor,pstrRev->u8FirmwarePatch);
+#ifdef ARDUINO
+							nmdrv_firm_ver  = curr_firm_ver;
+#endif
+							curr_drv_ver    = M2M_MAKE_VERSION(M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO);
+							min_req_drv_ver = M2M_MAKE_VERSION(pstrRev->u8DriverMajor, pstrRev->u8DriverMinor,pstrRev->u8DriverPatch);
+							if((curr_firm_ver == 0)||(min_req_drv_ver == 0)||(min_req_drv_ver == 0)){
+								ret = M2M_ERR_FAIL;
+								goto EXIT;
+							}
+							if(curr_drv_ver <  min_req_drv_ver) {
+								/*The current driver version should be larger or equal 
+								than the min driver that the current firmware support  */
+								ret = M2M_ERR_FW_VER_MISMATCH;
+								goto EXIT;
+							}
+							if(curr_drv_ver >  curr_firm_ver) {
+								/*The current driver should be equal or less than the firmware version*/
+								ret = M2M_ERR_FW_VER_MISMATCH;
+								goto EXIT;
+							}
+						}
+					}else {
+						ret = M2M_ERR_FAIL;
+					}
+				}
+			}else{
+				ret = M2M_ERR_FAIL;
+			}
+		}
+	}
+EXIT:
+	return ret;
+}
+/**
+*	@fn		nm_get_ota_firmware_info(tstrM2mRev* pstrRev)
+*	@brief	Get Firmware version info
+*	@param [out]	M2mRev
+*			    pointer holds address of structure "tstrM2mRev" that contains the firmware version parameters
+			
+*	@version	1.0
+*/
+sint8 nm_get_ota_firmware_info(tstrM2mRev* pstrRev)
+{
+	uint16  curr_drv_ver, min_req_drv_ver,curr_firm_ver;
+	uint32	reg = 0;
+	sint8	ret;
+	tstrGpRegs strgp = {0};
+
+	if (pstrRev != NULL)
+	{
+		m2m_memset((uint8*)pstrRev,0,sizeof(tstrM2mRev));
+		ret = nm_read_reg_with_ret(rNMI_GP_REG_2, &reg);
+		if(ret == M2M_SUCCESS)
+		{
+			if(reg != 0)
+			{
+				ret = nm_read_block(reg|0x30000,(uint8*)&strgp,sizeof(tstrGpRegs));
+				if(ret == M2M_SUCCESS)
+				{
+					reg = strgp.u32Firmware_Ota_rev;
+					reg >>= 16;
+					if(reg != 0)
+					{
+						ret = nm_read_block(reg|0x30000,(uint8*)pstrRev,sizeof(tstrM2mRev));
+						if(ret == M2M_SUCCESS)
+						{
+							curr_firm_ver   = M2M_MAKE_VERSION(pstrRev->u8FirmwareMajor, pstrRev->u8FirmwareMinor,pstrRev->u8FirmwarePatch);
+							curr_drv_ver    = M2M_MAKE_VERSION(M2M_RELEASE_VERSION_MAJOR_NO, M2M_RELEASE_VERSION_MINOR_NO, M2M_RELEASE_VERSION_PATCH_NO);
+							min_req_drv_ver = M2M_MAKE_VERSION(pstrRev->u8DriverMajor, pstrRev->u8DriverMinor,pstrRev->u8DriverPatch);
+							if((curr_firm_ver == 0)||(min_req_drv_ver == 0)||(min_req_drv_ver == 0)){
+								ret = M2M_ERR_FAIL;
+								goto EXIT;
+							}
+							if(curr_drv_ver <  min_req_drv_ver) {
+								/*The current driver version should be larger or equal 
+								than the min driver that the current firmware support  */
+								ret = M2M_ERR_FW_VER_MISMATCH;
+							}
+							if(curr_drv_ver >  curr_firm_ver) {
+								/*The current driver should be equal or less than the firmware version*/
+								ret = M2M_ERR_FW_VER_MISMATCH;
+							}
+						}
+					}else{
+						ret = M2M_ERR_INVALID;
+					}
+				}
+			}else{
+				ret = M2M_ERR_FAIL;
+			}
+		}
+	} else {
+		ret = M2M_ERR_INVALID_ARG;
+	}
+EXIT:
+	return ret;
+}
+
+
+
+/*
+*	@fn		nm_drv_init_download_mode
+*	@brief	Initialize NMC1000 driver
+*	@return	M2M_SUCCESS in case of success and Negative error code in case of failure
+*   @param [in]	arg
+*				Generic argument
+*	@author	Viswanathan Murugesan
+*	@date	10 Oct 2014
+*	@version	1.0
+*/
+sint8 nm_drv_init_download_mode()
+{
+	sint8 ret = M2M_SUCCESS;
+
+	ret = nm_bus_iface_init(NULL);
+	if (M2M_SUCCESS != ret) {
+		M2M_ERR("[nmi start]: fail init bus\n");
+		goto ERR1;
+	}
+
+	/**
+		TODO:reset the chip and halt the cpu in case of no wait efuse is set (add the no wait effuse check)
+	*/
+	if(!ISNMC3000(GET_CHIPID()))
+	{
+		/*Execuate that function only for 1500A/B, no room in 3000, but it may be needed in 3400 no wait*/
+		chip_reset_and_cpu_halt();
+	}
+
+#ifdef CONF_WINC_USE_SPI
+	/* Must do this after global reset to set SPI data packet size. */
+	nm_spi_init();
+#endif
+
+	M2M_INFO("Chip ID %lx\n", nmi_get_chipid());
+
+	/*disable all interrupt in ROM (to disable uart) in 2b0 chip*/
+	nm_write_reg(0x20300,0);
+
+ERR1:
+	return ret;
+}
+
+/*
+*	@fn		nm_drv_init
+*	@brief	Initialize NMC1000 driver
+*	@return	M2M_SUCCESS in case of success and Negative error code in case of failure
+*   @param [in]	arg
+*				Generic argument
+*	@author	M. Abdelmawla
+*	@date	15 July 2012
+*	@version	1.0
+*/
+sint8 nm_drv_init(void * arg)
+{
+	sint8 ret = M2M_SUCCESS;
+	uint8 u8Mode;
+	
+	if(NULL != arg) {
+		u8Mode = *((uint8 *)arg);
+		if((u8Mode < M2M_WIFI_MODE_NORMAL)||(u8Mode >= M2M_WIFI_MODE_MAX)) {
+			u8Mode = M2M_WIFI_MODE_NORMAL;
+		}
+	} else {
+		u8Mode = M2M_WIFI_MODE_NORMAL;
+	}
+	
+	ret = nm_bus_iface_init(NULL);
+	if (M2M_SUCCESS != ret) {
+		M2M_ERR("[nmi start]: fail init bus\n");
+		goto ERR1;
+	}
+
+#ifdef BUS_ONLY
+	return;
+#endif
+	
+	
+#ifdef NO_HW_CHIP_EN
+	ret = chip_wake();
+	if (M2M_SUCCESS != ret) {
+		M2M_ERR("[nmi start]: fail chip_wakeup\n");
+		goto ERR2;
+	}
+	/**
+	Go...
+	**/
+	ret = chip_reset();
+	if (M2M_SUCCESS != ret) {
+		goto ERR2;
+	}
+#endif
+	M2M_INFO("Chip ID %lx\n", nmi_get_chipid());
+#ifdef ARDUINO
+	if ((REV(GET_CHIPID()) & 0xff0) != REV_3A0 && (REV(GET_CHIPID()) & 0xff0) != REV_B0) {
+		ret = M2M_ERR_INVALID;
+		goto ERR2;
+	}
+#endif
+#ifdef CONF_WINC_USE_SPI
+	/* Must do this after global reset to set SPI data packet size. */
+	nm_spi_init();
+#endif
+	ret = wait_for_bootrom(u8Mode);
+	if (M2M_SUCCESS != ret) {
+		goto ERR2;
+	}
+		
+	ret = wait_for_firmware_start(u8Mode);
+	if (M2M_SUCCESS != ret) {
+		goto ERR2;
+	}
+	
+	if((M2M_WIFI_MODE_ATE_HIGH == u8Mode)||(M2M_WIFI_MODE_ATE_LOW == u8Mode)) {
+		goto ERR1;
+	} else {
+		/*continue running*/
+	}
+	
+	ret = enable_interrupts();
+	if (M2M_SUCCESS != ret) {
+		M2M_ERR("failed to enable interrupts..\n");
+		goto ERR2;
+	}
+	return ret;
+ERR2:
+	nm_bus_iface_deinit();
+ERR1:
+	return ret;
+}
+
+/*
+*	@fn		nm_drv_deinit
+*	@brief	Deinitialize NMC1000 driver
+*	@author	M. Abdelmawla
+*	@date	17 July 2012
+*	@version	1.0
+*/
+sint8 nm_drv_deinit(void * arg)
+{
+#ifdef ARDUINO
+	(void)arg; // Silence "unused" warning
+#endif
+	sint8 ret;
+
+	ret = chip_deinit();
+	if (M2M_SUCCESS != ret) {
+		M2M_ERR("[nmi stop]: chip_deinit fail\n");
+		goto ERR1;
+	}
+	
+	/* Disable SPI flash to save power when the chip is off */
+	ret = spi_flash_enable(0);
+	if (M2M_SUCCESS != ret) {
+		M2M_ERR("[nmi stop]: SPI flash disable fail\n");
+		goto ERR1;
+	}
+
+	ret = nm_bus_iface_deinit();
+	if (M2M_SUCCESS != ret) {
+		M2M_ERR("[nmi stop]: fail init bus\n");
+		goto ERR1;
+	}
+#ifdef CONF_WINC_USE_SPI
+	/* Must do this after global reset to set SPI data packet size. */
+	nm_spi_deinit();
+#endif
+
+ERR1:
+	return ret;
+}
+
+

libraries/lwIP_WINC1500/src/driver/source/nmdrv.h

@@ -0,0 +1,138 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains NMC1500 M2M driver APIs declarations.
+ *
+ * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _NMDRV_H_
+#define _NMDRV_H_
+
+#include "common/include/nm_common.h"
+
+/**
+*  @struct		tstrM2mRev
+*  @brief		Structure holding firmware version parameters and build date/time
+*/
+typedef struct {
+	uint32 u32Chipid; /* HW revision which will be basically the chip ID */
+	uint8 u8FirmwareMajor; /* Version Major Number which represents the official release base */
+	uint8 u8FirmwareMinor; /* Version Minor Number which represents the engineering release base */
+	uint8 u8FirmwarePatch;	/* Version pathc Number which represents the pathces release base */
+	uint8 u8DriverMajor; /* Version Major Number which represents the official release base */
+	uint8 u8DriverMinor; /* Version Minor Number which represents the engineering release base */
+	uint8 u8DriverPatch; /* Version Patch Number which represents the pathces release base */
+	uint8 BuildDate[sizeof(__DATE__)];
+	uint8 BuildTime[sizeof(__TIME__)];
+	uint8 _PAD8_;
+	uint16 u16FirmwareSvnNum;
+	uint16 _PAD16_[2];
+} tstrM2mRev;
+
+/**
+*  @struct		tstrM2mBinaryHeader
+*  @brief		Structure holding compatibility version info for firmware binaries
+*/
+typedef struct {
+	tstrM2mRev binVerInfo;
+    uint32	   flashOffset;
+	uint32     payloadSize;
+} tstrM2mBinaryHeader;
+
+#ifdef __cplusplus
+     extern "C" {
+ #endif
+/**
+*	@fn		nm_get_firmware_info(tstrM2mRev* M2mRev)
+*	@brief	Get Firmware version info
+*	@param [out]	M2mRev
+*			    pointer holds address of structure "tstrM2mRev" that contains the firmware version parameters
+*	@version	1.0
+*/
+sint8 nm_get_firmware_info(tstrM2mRev* M2mRev);
+/**
+*	@fn		nm_get_firmware_full_info(tstrM2mRev* pstrRev)
+*	@brief	Get Firmware version info
+*	@param [out]	M2mRev
+*			    pointer holds address of structure "tstrM2mRev" that contains the firmware version parameters
+*	@version	1.0
+*/
+sint8 nm_get_firmware_full_info(tstrM2mRev* pstrRev);
+/**
+*	@fn		nm_get_ota_firmware_info(tstrM2mRev* pstrRev)
+*	@brief	Get Firmware version info
+*	@param [out]	M2mRev
+*			    pointer holds address of structure "tstrM2mRev" that contains the firmware version parameters
+			
+*	@version	1.0
+*/
+sint8 nm_get_ota_firmware_info(tstrM2mRev* pstrRev);
+/*
+*	@fn		nm_drv_init
+*	@brief	Initialize NMC1000 driver
+*	@return	ZERO in case of success and Negative error code in case of failure
+*/
+sint8 nm_drv_init_download_mode(void);
+
+/*
+*	@fn		nm_drv_init
+*	@brief	Initialize NMC1000 driver
+*	@return	M2M_SUCCESS in case of success and Negative error code in case of failure
+*   @param [in]	arg
+*				Generic argument TBD
+*	@return	ZERO in case of success and Negative error code in case of failure
+
+*/
+sint8 nm_drv_init(void * arg);
+
+/**
+*	@fn		nm_drv_deinit
+*	@brief	Deinitialize NMC1000 driver
+*	@author	M. Abdelmawla
+*   @param [in]	arg
+*				Generic argument TBD
+*	@return	ZERO in case of success and Negative error code in case of failure
+*/
+sint8 nm_drv_deinit(void * arg);
+
+#ifdef __cplusplus
+	 }
+ #endif
+
+#endif	/*_NMDRV_H_*/
+
+

libraries/lwIP_WINC1500/src/driver/source/nmi2c.c

@@ -0,0 +1,269 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains NMC1000 I2C protocol bus APIs implementation.
+ *
+ * Copyright (c) 2016 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#include "common/include/nm_common.h"
+
+#ifdef CONF_WINC_USE_I2C
+
+#include "nmi2c.h"
+#include "bus_wrapper/include/nm_bus_wrapper.h"
+
+
+/*
+*	@fn		nm_i2c_read_reg_with_ret
+*	@brief	Read register with error code return
+*	@param [in]	u32Addr
+*				Register address
+*	@param [out]	pu32RetVal
+*				Pointer to u32 variable used to return the read value
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	M. Abdelmawla
+*	@date	11 July 2012
+*	@version	1.0
+*/
+ sint8 nm_i2c_read_reg_with_ret(uint32 u32Addr, uint32* pu32RetVal)
+{
+	uint8 b[6];
+	uint8 rsz;
+	tstrNmI2cDefault strI2c;
+	sint8 s8Ret = M2M_SUCCESS;
+
+	if(u32Addr < 0xff) { /* clockless i2c */
+		b[0] = 0x09;
+		b[1] = (uint8)(u32Addr);
+		rsz = 1;
+		strI2c.u16Sz = 2;
+	} else {
+		b[0] = 0x80;
+		b[1] = (uint8)(u32Addr >> 24);
+		b[2] = (uint8)(u32Addr >> 16);
+		b[3] = (uint8)(u32Addr >> 8);
+		b[4] = (uint8)(u32Addr);
+		b[5] = 0x04;
+		rsz = 4;
+		strI2c.u16Sz = 6;
+	}
+
+	strI2c.pu8Buf = b;
+
+	if(M2M_SUCCESS == nm_bus_ioctl(NM_BUS_IOCTL_W, &strI2c))
+	{
+		strI2c.u16Sz = rsz;
+		if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_R, &strI2c))
+		{
+			//M2M_ERR("read error\n");
+			s8Ret = M2M_ERR_BUS_FAIL;
+		}
+	}
+	else
+	{
+		M2M_ERR("failed to send cfg bytes\n");
+		s8Ret = M2M_ERR_BUS_FAIL;
+	}
+
+	if (rsz == 1) {
+		*pu32RetVal = b[0];
+	} else {
+		*pu32RetVal = b[0] | ((uint32)b[1] << 8) | ((uint32)b[2] << 16) | ((uint32)b[3] << 24);
+	}
+	return s8Ret;
+}
+
+/*
+*	@fn		nm_i2c_read_reg
+*	@brief	Read register
+*	@param [in]	u32Addr
+*				Register address
+*	@return	Register value
+*	@author	M. Abdelmawla
+*	@date	11 July 2012
+*	@version	1.0
+*/
+uint32 nm_i2c_read_reg(uint32 u32Addr)
+{
+	uint32 val;
+	nm_i2c_read_reg_with_ret(u32Addr, &val);
+	return val;
+}
+
+/*
+*	@fn		nm_i2c_write_reg
+*	@brief	write register
+*	@param [in]	u32Addr
+*				Register address
+*	@param [in]	u32Val
+*				Value to be written to the register
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	M. Abdelmawla
+*	@date	11 July 2012
+*	@version	1.0
+*/
+sint8 nm_i2c_write_reg(uint32 u32Addr, uint32 u32Val)
+{
+	tstrNmI2cDefault strI2c;
+	uint8 b[16];
+	sint8 s8Ret = M2M_SUCCESS;
+
+	if(u32Addr < 0xff) { /* clockless i2c */
+		b[0] = 0x19;
+		b[1] = (uint8)(u32Addr);
+		b[2] = (uint8)(u32Val);
+		strI2c.u16Sz = 3;
+	} else {
+		b[0] = 0x90;
+		b[1] = (uint8)(u32Addr >> 24);
+		b[2] = (uint8)(u32Addr >> 16);
+		b[3] = (uint8)(u32Addr >> 8);
+		b[4] = (uint8)u32Addr;
+		b[5] = 0x04;
+		b[6] = (uint8)u32Val;
+		b[7] = (uint8)(u32Val >> 8);
+		b[8] = (uint8)(u32Val >> 16);
+		b[9] = (uint8)(u32Val >> 24);
+		strI2c.u16Sz = 10;
+	}
+
+	strI2c.pu8Buf = b;
+
+	if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_W, &strI2c))
+	{
+		M2M_ERR("write error\n");
+		s8Ret = M2M_ERR_BUS_FAIL;
+	}
+
+	return s8Ret;
+}
+
+/*
+*	@fn		nm_i2c_read_block
+*	@brief	Read block of data
+*	@param [in]	u32Addr
+*				Start address
+*	@param [out]	puBuf
+*				Pointer to a buffer used to return the read data
+*	@param [in]	u16Sz
+*				Number of bytes to read. The buffer size must be >= u16Sz
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	M. Abdelmawla
+*	@date	11 July 2012
+*	@version	1.0
+*/
+sint8 nm_i2c_read_block(uint32 u32Addr, uint8 *pu8Buf, uint16 u16Sz)
+{
+	tstrNmI2cDefault strI2c;
+	uint8 au8Buf[7];
+	sint8 s8Ret = M2M_SUCCESS;
+
+	au8Buf[0] = 0x02;
+	au8Buf[1] = (uint8)(u32Addr >> 24);
+	au8Buf[2] = (uint8)(u32Addr >> 16);
+	au8Buf[3] = (uint8)(u32Addr >> 8);
+	au8Buf[4] = (uint8)(u32Addr >> 0);
+	au8Buf[5] = (uint8)(u16Sz >> 8);
+	au8Buf[6] = (uint8)(u16Sz);
+
+	strI2c.pu8Buf = au8Buf;
+	strI2c.u16Sz = sizeof(au8Buf);
+
+	if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_W, &strI2c))
+	{
+		M2M_ERR("write error\n");
+		s8Ret = M2M_ERR_BUS_FAIL;
+	}
+	else
+	{
+		strI2c.pu8Buf = pu8Buf;
+		strI2c.u16Sz = u16Sz;
+
+		if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_R, &strI2c))
+		{
+			M2M_ERR("read error\n");
+			s8Ret = M2M_ERR_BUS_FAIL;
+		}
+	}
+
+	return s8Ret;
+}
+
+/*
+*	@fn		nm_i2c_write_block
+*	@brief	Write block of data
+*	@param [in]	u32Addr
+*				Start address
+*	@param [in]	puBuf
+*				Pointer to the buffer holding the data to be written
+*	@param [in]	u16Sz
+*				Number of bytes to write. The buffer size must be >= u16Sz
+*	@return	M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
+*	@author	M. Abdelmawla
+*	@date	11 July 2012
+*	@version	1.0
+*/
+sint8 nm_i2c_write_block(uint32 u32Addr, uint8 *pu8Buf, uint16 u16Sz)
+{
+	uint8 au8Buf[7];
+	tstrNmI2cSpecial strI2c;
+	sint8 s8Ret = M2M_SUCCESS;
+
+	au8Buf[0] = 0x12;
+	au8Buf[1] = (uint8)(u32Addr >> 24);
+	au8Buf[2] = (uint8)(u32Addr >> 16);
+	au8Buf[3] = (uint8)(u32Addr >> 8);
+	au8Buf[4] = (uint8)(u32Addr);
+	au8Buf[5] = (uint8)(u16Sz >> 8);
+	au8Buf[6] = (uint8)(u16Sz);
+
+	strI2c.pu8Buf1 = au8Buf;
+	strI2c.pu8Buf2 = pu8Buf;
+	strI2c.u16Sz1 = sizeof(au8Buf);
+	strI2c.u16Sz2 = u16Sz;
+
+	if(M2M_SUCCESS != nm_bus_ioctl(NM_BUS_IOCTL_W_SPECIAL, &strI2c))
+	{
+		M2M_ERR("write error\n");
+		s8Ret = M2M_ERR_BUS_FAIL;
+	}
+
+	return s8Ret;
+}
+
+#endif
+/* EOF */

libraries/lwIP_WINC1500/src/driver/source/nmi2c.h

@@ -0,0 +1,104 @@
+/**
+ *
+ * \file
+ *
+ * \brief This module contains NMC1000 I2C protocol bus APIs implementation.
+ *
+ * Copyright (c) 2016 Atmel Corporation. All rights reserved.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ *
+ * 3. The name of Atmel may not be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+#ifndef _NMI2C_H_
+#define _NMI2C_H_
+
+#include "common/include/nm_common.h"
+
+/**
+*	@fn		nm_i2c_read_reg
+*	@brief	Read register
+*	@param [in]	u32Addr
+*				Register address
+*	@return	Register value
+*/
+uint32 nm_i2c_read_reg(uint32 u32Addr);
+
+/**
+*	@fn		nm_i2c_read_reg_with_ret
+*	@brief	Read register with error code return
+*	@param [in]	u32Addr
+*				Register address
+*	@param [out]	pu32RetVal
+*				Pointer to u32 variable used to return the read value
+*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+sint8 nm_i2c_read_reg_with_ret(uint32 u32Addr, uint32* pu32RetVal);
+
+/**
+*	@fn		nm_i2c_write_reg
+*	@brief	write register
+*	@param [in]	u32Addr
+*				Register address
+*	@param [in]	u32Val
+*				Value to be written to the register
+*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+sint8 nm_i2c_write_reg(uint32 u32Addr, uint32 u32Val);
+
+/**
+*	@fn		nm_i2c_read_block
+*	@brief	Read block of data
+*	@param [in]	u32Addr
+*				Start address
+*	@param [out]	puBuf
+*				Pointer to a buffer used to return the read data
+*	@param [in]	u16Sz
+*				Number of bytes to read. The buffer size must be >= u16Sz
+*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+sint8 nm_i2c_read_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz);
+
+/**
+*	@fn		nm_i2c_write_block
+*	@brief	Write block of data
+*	@param [in]	u32Addr
+*				Start address
+*	@param [in]	puBuf
+*				Pointer to the buffer holding the data to be written
+*	@param [in]	u16Sz
+*				Number of bytes to write. The buffer size must be >= u16Sz
+*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
+*/
+sint8 nm_i2c_write_block(uint32 u32Addr, uint8 *puBuf, uint16 u16Sz);
+
+#endif /* _NMI2C_H_ */