This PR adds support for the W6300-EVB-Pico and W6300-EVB-Pico2 boards from WIZnet.
These boards combine RP2040 or RP2350 with WIZnet's W6300 Ethernet controller via a QSPI interface implemented using PIO.
Hello,
This PR adds support for the W6300-EVB-Pico and W6300-EVB-Pico2 boards from WIZnet.
These boards combine RP2040 or RP2350 with WIZnet's W6300 Ethernet controller via a QSPI interface implemented using PIO.
https://docs.wiznet.io/Product/iEthernet/W6300/w6300-evb-pico
https://docs.wiznet.io/Product/iEthernet/W6300/w6300-evb-pico2
Thank you very much for your consideration!
I think this is not going to work, the CS needs to be set to the proper GPIO. Had the same issue on the other combined WizNet+Pico chipset.
Per the schematics it seems like it should be Wiznet6300lwIP eth(16), no?
I think this is not going to work, the CS needs to be set to the proper GPIO. Had the same issue on the other combined WizNet+Pico chipset.
Per the schematics it seems like it should be `Wiznet6300lwIP eth(16)`, no?
Thanks for your feedback. However, since W6300 requires PIO to emulate GPIOs to be QSPI pins, therefore we included definitions for all related pins in w6300.h. Thus it is not needed to define separately.
Upon tests on our side, everything works smoothly. Let us know if this approach is wrong and we will fix it for this chip and others too.
Hi,
Thanks for your feedback. However, since W6300 requires PIO to emulate GPIOs to be QSPI pins, therefore we included definitions for all related pins in w6300.h. Thus it is not needed to define separately.
Upon tests on our side, everything works smoothly. Let us know if this approach is wrong and we will fix it for this chip and others too.
earlephilhower
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Thanks for verifying that it does work. The issue with the CS pin needing to be set properly was seen on the W55RP20 #2903 but I suppose this is a whole QSPI implementation and not really related.
Thanks for verifying that it does work. The issue with the CS pin needing to be set properly was seen on the W55RP20 #2903 but I suppose this is a whole QSPI implementation and not really related.
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Hello,
This PR adds support for the W6300-EVB-Pico and W6300-EVB-Pico2 boards from WIZnet.
These boards combine RP2040 or RP2350 with WIZnet's W6300 Ethernet controller via a QSPI interface implemented using PIO.
https://docs.wiznet.io/Product/iEthernet/W6300/w6300-evb-pico
https://docs.wiznet.io/Product/iEthernet/W6300/w6300-evb-pico2
Thank you very much for your consideration!
@@ -0,0 +8,4 @@const char* host = "djxmmx.net";const uint16_t port = 17;Wiznet6300lwIP eth(1 /* chip select */);I think this is not going to work, the CS needs to be set to the proper GPIO. Had the same issue on the other combined WizNet+Pico chipset.
Per the schematics it seems like it should be
Wiznet6300lwIP eth(16), no?Hi,
Thanks for your feedback. However, since W6300 requires PIO to emulate GPIOs to be QSPI pins, therefore we included definitions for all related pins in w6300.h. Thus it is not needed to define separately.
Upon tests on our side, everything works smoothly. Let us know if this approach is wrong and we will fix it for this chip and others too.
Thanks for verifying that it does work. The issue with the CS pin needing to be set properly was seen on the W55RP20 #2903 but I suppose this is a whole QSPI implementation and not really related.
Thank you for merging.
Should you have any issues, please contact me.