Update version

Fix JLink device names for RP2350 in PIO boards (#3001 )
Add BigTreeTech SKR-Pico (#2988 )
2025-06-19 18:36:46 -07:00 · 2025-06-19 18:30:37 -07:00 · 2025-06-19 12:36:20 -07:00 · 2025-06-19 11:55:06 -07:00 · 2025-06-19 11:16:53 -07:00 · 2025-06-16 12:29:12 -07:00
228 changed files with 5076 additions and 688 deletions
@@ -10,7 +10,7 @@ jobs:

 # Consistent style, spelling
  astyle:
-    name: Spelling, Style, Boards, Package
+    name: Spelling, Style, Boards, Package, PIO
    runs-on: ubuntu-latest
    steps:
    - uses: actions/checkout@v4
@@ -19,13 +19,8 @@ jobs:
    - name: Run codespell
      uses: codespell-project/actions-codespell@v2
      with:
-        skip: ./ArduinoCore-API,./libraries/ESP8266SdFat,./libraries/Adafruit_TinyUSB_Arduino,./libraries/LittleFS/lib,./tools/pyserial,./pico-sdk,./.github,./docs/i2s.rst,./cores/rp2040/api,./libraries/FreeRTOS,./tools/libbearssl/bearssl,./include,./libraries/WiFi/examples/BearSSL_Server,./ota/uzlib,./libraries/http-parser/lib,./libraries/WebServer/examples/HelloServerBearSSL/HelloServerBearSSL.ino,./libraries/HTTPUpdateServer/examples/SecureBearSSLUpdater/SecureBearSSLUpdater.ino,./.git,./libraries/FatFS/lib/fatfs,./libraries/FatFS/src/diskio.h,./libraries/FatFS/src/ff.cpp,./libraries/FatFS/src/ffconf.h,./libraries/FatFS/src/ffsystem.cpp,./libraries/FatFS/src/ff.h,./libraries/lwIP_WINC1500/src/driver,./libraries/lwIP_WINC1500/src/common,./libraries/lwIP_WINC1500/src/bus_wrapper,./libraries/lwIP_WINC1500/src/spi_flash
+        skip: ./ArduinoCore-API,./libraries/ESP8266SdFat,./libraries/Adafruit_TinyUSB_Arduino,./libraries/LittleFS/lib,./tools/pyserial,./pico-sdk,./.github,./docs/i2s.rst,./cores/rp2040/api,./libraries/FreeRTOS,./tools/libbearssl/bearssl,./include,./libraries/WiFi/examples/BearSSL_Server,./ota/uzlib,./libraries/http-parser/lib,./libraries/WebServer/examples/HelloServerBearSSL/HelloServerBearSSL.ino,./libraries/HTTPUpdateServer/examples/SecureBearSSLUpdater/SecureBearSSLUpdater.ino,./.git,./libraries/FatFS/lib/fatfs,./libraries/FatFS/src/diskio.h,./libraries/FatFS/src/ff.cpp,./libraries/FatFS/src/ffconf.h,./libraries/FatFS/src/ffsystem.cpp,./libraries/FatFS/src/ff.h,./libraries/lwIP_WINC1500/src/driver,./libraries/lwIP_WINC1500/src/common,./libraries/lwIP_WINC1500/src/bus_wrapper,./libraries/lwIP_WINC1500/src/spi_flash,./libraries/WiFi/examples/BearSSL_Validation/certs.h
        ignore_words_list: ser,dout,shiftIn,acount,froms
-    - name: Get submodules for following tests
-      run: git submodule update --init
-    - name: Check package references
-      run: |
-        ./tests/ci/pkgrefs_test.sh
    - name: Check boards.txt was not edited after makeboards.py
      run: |
        ./tools/makeboards.py
@@ -38,6 +33,15 @@ jobs:
        ./tests/restyle.sh
        # If anything changed, GIT should return an error and fail the test
        git diff --exit-code
+    - name: Check compiled PIO files
+      run: |
+        (cd ./tools && ./get.py)
+        ./tools/makepio.py
+        # If anything changed, GIT should return an error and fail the test
+        git diff -w --exit-code
+    - name: Check package references
+      run: |
+        ./tests/ci/pkgrefs_test.sh

 # Build all examples on linux (core and Arduino IDE)
  build-linux:
@@ -264,8 +268,8 @@ jobs:
      run: |
        python -m pip install --upgrade pip
        pip install --upgrade platformio
+        rm -rf ~/.platformio/platforms/raspberrypi*
        pio pkg install --global --platform https://github.com/maxgerhardt/platform-raspberrypi.git
-        pio pkg update --global --platform https://github.com/maxgerhardt/platform-raspberrypi.git
        pio pkg install --global --tool symlink://.
        cp -f /home/runner/work/arduino-pico/arduino-pico/tools/json/*.json /home/runner/.platformio/platforms/raspberrypi/boards/.
    - name: Build Multicore Example
@@ -321,8 +325,8 @@ jobs:
      run: |
        python -m pip install --upgrade pip
        pip install --upgrade platformio
+        rm -rf ~/.platformio/platforms/raspberrypi*
        pio pkg install --global --platform https://github.com/maxgerhardt/platform-raspberrypi.git
-        pio pkg update --global --platform https://github.com/maxgerhardt/platform-raspberrypi.git
        pio pkg install --global --tool symlink://.
        cp -f /home/runner/work/arduino-pico/arduino-pico/tools/json/*.json /home/runner/.platformio/platforms/raspberrypi/boards/.
    - name: Build Every Variant
@@ -5,5 +5,8 @@ docs/_build
 ota/build
 ota/build-rp2350
 ota/build-rp2350-riscv
-tools/libpico/build
+tools/libpico/boot
+tools/libpico/build-rp2040
+tools/libpico/build-rp2350
+tools/libpico/build-rp2350-riscv
 platform.local.txt
@@ -37,6 +37,7 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Architeuthis Flux Jumperless V5
 * Arduino Nano RP2040 Connect
 * ArtronShop RP2 Nano
+* BIGTREETECH SKR-Pico
 * Breadstick Raspberry
 * BridgeTek IDM2040-7A
 * BridgeTek IDM2040-43A
@@ -115,11 +116,15 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Waveshare RP2040 LCD 1.28
 * Waveshare RP2040 Matrix
 * Waveshare RP2040 PiZero
+* Waveshare RP2350 Plus
+* Waveshare RP2350 LCD 0.96
 * WIZnet W5100S-EVB-Pico
 * WIZnet W5100S-EVB-Pico2
 * WIZnet W5500-EVB-Pico
 * WIZnet W5500-EVB-Pico2
 * WIZnet W55RP20-EVB-Pico
+* WIZnet W6300-EVB-Pico
+* WIZnet W6300-EVB-Pico2
 * WIZnet WizFi360-EVB-Pico
 * Generic RP2040 (configurable flash, I/O pins)
 * Generic RP2350 (configurable flash, I/O pins)
@@ -130,7 +135,7 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Bluetooth Classic and BLE HID master mode (connect to BT keyboard, mouse, or joystick)
 * Generic Arduino USB Serial, Keyboard, Joystick, and Mouse emulation
 * WiFi (Pico W, ESP32-based ESPHost, Atmel WINC1500)
-* Ethernet (Wired WizNet W6100, WizNet W5500, WizNet W5100, ENC28J60)
+* Ethernet (Wired WizNet W6300, WizNet W6100, WizNet W5500, WizNet W5100, ENC28J60)
 * HTTP client and server (WebServer)
 * SSL/TLS/HTTPS
 * Over-the-Air (OTA) upgrades
@@ -53,16 +53,6 @@ bool PIOProgram::prepare(PIO *pio, int *sm, int *offset, int start, int cnt) {
    CoreMutex m(&_pioMutex);
    PIO pi[PIOCNT] = { PIOS };

-#if 0
-    uint usm;
-    uint uoff;
-    auto ret = pio_claim_free_sm_and_add_program_for_gpio_range(_pgm, pio, &usm, &uoff, start, cnt, true);
-    *sm = usm;
-    *offset = uoff;
-    DEBUGV("clain %d\n", ret);
-    return ret;
-#endif
-
    uint gpioBaseNeeded = ((start + cnt) >= 32) ? 16 : 0;
    DEBUGV("PIOProgram %p: Searching for base=%d, pins %d-%d\n", _pgm, gpioBaseNeeded, start, start + cnt - 1);

@@ -190,8 +190,8 @@ public:
    RP2040()  { /* noop */ }
    ~RP2040() { /* noop */ }

-    void begin() {
-        _epoch = 0;
+    void begin(int cpuid) {
+        _epoch[cpuid] = 0;
 #if !defined(__riscv) && !defined(__PROFILE)
        if (!__isFreeRTOS) {
            // Enable SYSTICK exception
@@ -200,11 +200,14 @@ public:
            systick_hw->rvr = 0x00FFFFFF;
        } else {
 #endif
-            int off = 0;
-            _ccountPgm = new PIOProgram(&ccount_program);
-            _ccountPgm->prepare(&_pio, &_sm, &off);
-            ccount_program_init(_pio, _sm, off);
-            pio_sm_set_enabled(_pio, _sm, true);
+            // Only start 1 instance of the PIO SM
+            if (cpuid == 0) {
+                int off = 0;
+                _ccountPgm = new PIOProgram(&ccount_program);
+                _ccountPgm->prepare(&_pio, &_sm, &off);
+                ccount_program_init(_pio, _sm, off);
+                pio_sm_set_enabled(_pio, _sm, true);
+            }
 #if !defined(__riscv) && !defined(__PROFILE)
        }
 #endif
@@ -241,7 +244,7 @@ public:
    /**
        @brief CPU cycle counter epoch (24-bit cycle).  For internal use
    */
-    volatile uint64_t _epoch = 0;
+    volatile uint64_t _epoch[2] = {};
    /**
        @brief Get the count of CPU clock cycles since power on.

@@ -258,9 +261,9 @@ public:
            uint32_t epoch;
            uint32_t ctr;
            do {
-                epoch = (uint32_t)_epoch;
+                epoch = (uint32_t)_epoch[sio_hw->cpuid];
                ctr = systick_hw->cvr;
-            } while (epoch != (uint32_t)_epoch);
+            } while (epoch != (uint32_t)_epoch[sio_hw->cpuid]);
            return epoch + (1 << 24) - ctr; /* CTR counts down from 1<<24-1 */
        } else {
 #endif
@@ -280,9 +283,9 @@ public:
            uint64_t epoch;
            uint64_t ctr;
            do {
-                epoch = _epoch;
+                epoch = _epoch[sio_hw->cpuid];
                ctr = systick_hw->cvr;
-            } while (epoch != _epoch);
+            } while (epoch != _epoch[sio_hw->cpuid]);
            return epoch + (1LL << 24) - ctr;
        } else {
 #endif
@@ -666,8 +669,8 @@ public:


 private:
-    static void _SystickHandler() {
-        rp2040._epoch += 1LL << 24;
+    static void __no_inline_not_in_flash_func(_SystickHandler)() {
+        rp2040._epoch[sio_hw->cpuid] += 1LL << 24;
    }
    PIO _pio;
    int _sm;
@@ -1,5 +1,5 @@
 #pragma once
 #define ARDUINO_PICO_MAJOR 4
-#define ARDUINO_PICO_MINOR 5
-#define ARDUINO_PICO_REVISION 2
-#define ARDUINO_PICO_VERSION_STR "4.5.2"
+#define ARDUINO_PICO_MINOR 6
+#define ARDUINO_PICO_REVISION 0
+#define ARDUINO_PICO_VERSION_STR "4.6.0"
@@ -68,13 +68,10 @@ static PIOProgram *_getRxProgram(int bits) {
 }
 // ------------------------------------------------------------------------

-// TODO - this works, but there must be a faster/better way...
-static int _parity(int bits, int data) {
-    int p = 0;
-    for (int b = 0; b < bits; b++) {
-        p ^= (data & (1 << b)) ? 1 : 0;
-    }
-    return p;
+static int __not_in_flash_func(_parity)(int data) {
+    data ^= data >> 4;
+    data &= 0xf;
+    return (0x6996 >> data) & 1;
 }

 // We need to cache generated SerialPIOs so we can add data to them from
@@ -98,20 +95,16 @@ void __not_in_flash_func(SerialPIO::_handleIRQ)() {
    }
    while (!pio_sm_is_rx_fifo_empty(_rxPIO, _rxSM)) {
        uint32_t decode = _rxPIO->rxf[_rxSM];
-        decode >>= 33 - _rxBits;
-        uint32_t val = 0;
-        for (int b = 0; b < _bits + 1; b++) {
-            val |= (decode & (1 << (b * 2))) ? 1 << b : 0;
-        }
+        uint32_t val = decode >> (32 - _rxBits - 1);
        if (_parity == UART_PARITY_EVEN) {
-            int p = ::_parity(_bits, val);
+            int p = ::_parity(val);
            int r = (val & (1 << _bits)) ? 1 : 0;
            if (p != r) {
                // TODO - parity error
                continue;
            }
        } else if (_parity == UART_PARITY_ODD) {
-            int p = ::_parity(_bits, val);
+            int p = ::_parity(val);
            int r = (val & (1 << _bits)) ? 1 : 0;
            if (p == r) {
                // TODO - parity error
@@ -234,7 +227,7 @@ void SerialPIO::begin(unsigned long baud, uint16_t config) {
        _writer = 0;
        _reader = 0;

-        _rxBits = 2 * (_bits + _stop + (_parity != UART_PARITY_NONE ? 1 : 0) + 1) - 1;
+        _rxBits = _bits + (_parity != UART_PARITY_NONE ? 1 : 0);
        _rxPgm = _getRxProgram(_rxBits);
        int off;
        if (!_rxPgm->prepare(&_rxPIO, &_rxSM, &off, _rx, 1)) {
@@ -249,7 +242,7 @@ void SerialPIO::begin(unsigned long baud, uint16_t config) {
        pio_sm_clear_fifos(_rxPIO, _rxSM); // Remove any existing data

        // Put phase divider into OSR w/o using add'l program memory
-        pio_sm_put_blocking(_rxPIO, _rxSM, clock_get_hz(clk_sys) / (_baud * 2) - 7 /* insns in PIO halfbit loop */);
+        pio_sm_put_blocking(_rxPIO, _rxSM, clock_get_hz(clk_sys) / (_baud * 2) - 3);
        pio_sm_exec(_rxPIO, _rxSM, pio_encode_pull(false, false));

        // Join the TX FIFO to the RX one now that we don't need it
@@ -378,10 +371,10 @@ size_t SerialPIO::write(uint8_t c) {
    if (_parity == UART_PARITY_NONE) {
        val |= 7 << _bits; // Set 2 stop bits, the HW will only transmit the required number
    } else if (_parity == UART_PARITY_EVEN) {
-        val |= ::_parity(_bits, c) << _bits;
+        val |= ::_parity(c) << _bits;
        val |= 7 << (_bits + 1);
    } else {
-        val |= (1 ^ ::_parity(_bits, c)) << _bits;
+        val |= (1 ^ ::_parity(c)) << _bits;
        val |= 7 << (_bits + 1);
    }
    val <<= 1;  // Start bit = low
@@ -28,7 +28,7 @@ static const struct pio_program ccount_program = {
    .instructions = ccount_program_instructions,
    .length = 2,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = ccount_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -51,9 +51,14 @@ void initVariant() { }

 // Optional 2nd core setup and loop
 bool core1_separate_stack __attribute__((weak)) = false;
+bool core1_disable_systick __attribute__((weak)) = false;
 extern void setup1() __attribute__((weak));
 extern void loop1() __attribute__((weak));
 extern "C" void main1() {
+    if (!core1_disable_systick) {
+        // Don't install the SYSTICK exception handler. rp2040.getCycleCount will not work properly on core1
+        rp2040.begin(1);
+    }
    rp2040.fifo.registerCore();
    if (setup1) {
        setup1();
@@ -128,7 +133,7 @@ extern "C" int main() {
        _REENT_INIT_PTR(_impure_ptr1);
    }

-    rp2040.begin();
+    rp2040.begin(0);

    initVariant();

@@ -239,3 +244,10 @@ void hexdump(const void* mem, uint32_t len, uint8_t cols) {
 }

 const String emptyString = "";
+
+extern "C" void __attribute__((__noreturn__)) __wrap___stack_chk_fail() {
+    while (true) {
+        panic("*** stack smashing detected ***: terminated\n");
+    }
+}
+
@@ -73,20 +73,25 @@ static inline void pio_tx_program_init(PIO pio, uint sm, uint offset, uint pin_t
 ; IN pin 0 and JMP pin are both mapped to the GPIO used as UART RX.

 start:
-    set x, 18           ; Preload bit counter...we'll shift in the start bit and stop bit, and each bit will be double-recorded (to be fixed by RP2040 code)
+    set x, 18           ; Preload bit counter...overwritten by the app
    wait 0 pin 0        ; Stall until start bit is asserted

-bitloop:
   ; Delay until 1/2 way into the bit time
    mov y, osr
-wait_half:
-    jmp y-- wait_half
+wait_mid_start:
+    jmp y-- wait_mid_start

-    ; Read in the bit
-    in pins, 1          ; Shift data bit into ISR
-    jmp x-- bitloop     ; Loop all bits
-    
-    push                ; Stuff it and wait for next start
+bitloop:
+    mov y, osr
+bitloop1:
+    jmp y-- bitloop1
+    mov y, osr
+bitloop2:
+    jmp y-- bitloop2
+
+    in pins, 1
+    jmp x-- bitloop
+    push

 % c-sdk {
 static inline void pio_rx_program_init(PIO pio, uint sm, uint offset, uint pin) {
@@ -32,7 +32,7 @@ static const struct pio_program pio_tx_program = {
    .instructions = pio_tx_program_instructions,
    .length = 6,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_tx_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -71,7 +71,7 @@ static inline void pio_tx_program_init(PIO pio, uint sm, uint offset, uint pin_t
 // ------ //

 #define pio_rx_wrap_target 0
-#define pio_rx_wrap 6
+#define pio_rx_wrap 10
 #define pio_rx_pio_version 0

 static const uint16_t pio_rx_program_instructions[] = {
@@ -80,18 +80,22 @@ static const uint16_t pio_rx_program_instructions[] = {
    0x2020, //  1: wait   0 pin, 0
    0xa047, //  2: mov    y, osr
    0x0083, //  3: jmp    y--, 3
-    0x4001, //  4: in     pins, 1
-    0x0042, //  5: jmp    x--, 2
-    0x8020, //  6: push   block
+    0xa047, //  4: mov    y, osr
+    0x0085, //  5: jmp    y--, 5
+    0xa047, //  6: mov    y, osr
+    0x0087, //  7: jmp    y--, 7
+    0x4001, //  8: in     pins, 1
+    0x0044, //  9: jmp    x--, 4
+    0x8020, // 10: push   block
    //     .wrap
 };

 #if !PICO_NO_HARDWARE
 static const struct pio_program pio_rx_program = {
    .instructions = pio_rx_program_instructions,
-    .length = 7,
+    .length = 11,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_rx_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -17,14 +17,14 @@
 #define tone2_pio_version 0

 static const uint16_t tone2_program_instructions[] = {
-    //         .wrap_target
+    //     .wrap_target
    0x8080, //  0: pull   noblock
    0xb827, //  1: mov    x, osr          side 1
    0xa047, //  2: mov    y, osr
    0x0083, //  3: jmp    y--, 3
    0xb047, //  4: mov    y, osr          side 0
    0x0085, //  5: jmp    y--, 5
-    //         .wrap
+    //     .wrap
 };

 #if !PICO_NO_HARDWARE
@@ -54,9 +54,9 @@ author = u'Earle F. Philhower, III'
 # built documents.
 #
 # The short X.Y version.
-version = u'4.5.2'
+version = u'4.6.0'
 # The full version, including alpha/beta/rc tags.
-release = u'4.5.2'
+release = u'4.6.0'

 # The language for content autogenerated by Sphinx. Refer to documentation
 # for a list of supported languages.
@@ -16,6 +16,25 @@ not necessarily simultaneously!).
 See the ``Multicore.ino`` example in the ``rp2040`` example directory for a
 quick introduction.

+Core 1 Operation
+----------------
+
+By default, core1 (the second core) has no non-user written code running on it.
+No interrupts, exceptions, or other background processing is done (but the core
+is still subject to hardware stalls due to on-die memory resource conflicts).
+When flash erase or write operations (i.e. ``LittleFS`` or ``EEPROM``) are called
+from core0, core1 **will** be paused.
+
+If ``rp2040.getCycleCount`` is needed to operate on the second core, then a
+periodic (once ever 16M clock cycles) ``SYSTICK`` exception will happen behind
+the scenes.  For extremely time-critical operations this may not be desirable
+and can be disabled by defining a new ``bool`` variable to ``true`` anywhere
+in your sketch:
+
+.. code:: cpp
+
+    bool core1_disable_systick = true;
+
 Stack Sizes
 -----------

@@ -67,6 +86,9 @@ void rp2040.restartCore1()
 ~~~~~~~~~~~~~~~~~~~~~~~~~~

 Hard resets Core1 from Core 0 and restarts its operation from ``setup1()``.
+This can cause unpredictable behavior because globals and the heap
+are shared between cores and not re-initialized with this call.  Use with
+extreme caution.

 Communicating Between Cores
 ---------------------------
@@ -1,2 +1,2 @@
 // Do not edit -- Automatically generated by tools/sdk/ssl/bearssl/Makefile
-#define BEARSSL_GIT 5b7f3d5
+#define BEARSSL_GIT aca1383
@@ -54,6 +54,7 @@
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_lwip/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_multicore/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_platform/include
+-iwithprefixbefore/pico-sdk/src/rp2_common/pico_platform_common/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_platform_compiler/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_platform_sections/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_platform_panic/include
@@ -67,3 +67,5 @@
 -Wl,--wrap=cyw43_tcpip_link_status
 -Wl,--wrap=cyw43_cb_tcpip_init
 -Wl,--wrap=cyw43_cb_tcpip_deinit
+
+-Wl,--wrap=__stack_chk_fail
@@ -1,4 +1,5 @@
 -DPICO_CYW43_ARCH_THREADSAFE_BACKGROUND=1
+-DTARGET_RP2350
 -DCYW43_LWIP=1
 -DCYW43_PIO_CLOCK_DIV_DYNAMIC=1
 -DCFG_TUSB_MCU=OPT_MCU_RP2040
@@ -1,4 +1,5 @@
 -DPICO_CYW43_ARCH_THREADSAFE_BACKGROUND=1
+-DTARGET_RP2350
 -DCYW43_LWIP=1
 -DCYW43_PIO_CLOCK_DIV_DYNAMIC=1
 -DCFG_TUSB_MCU=OPT_MCU_RP2040
@@ -23,6 +23,7 @@
 #include <Arduino.h>
 #include "ADCInput.h"
 #include <hardware/adc.h>
+#include <debug_internal.h>

 ADCInput::ADCInput(pin_size_t p0, pin_size_t p1, pin_size_t p2, pin_size_t p3, pin_size_t p4, pin_size_t p5, pin_size_t p6, pin_size_t p7) {
    _running = false;
@@ -50,11 +51,6 @@ bool ADCInput::setBuffers(size_t buffers, size_t bufferWords) {
 int ADCInput::_mask(pin_size_t p) {
    switch (p) {
 #if defined(PICO_RP2350) && !PICO_RP2350A // RP2350B
-    case 26: return 1;
-    case 27: return 2;
-    case 28: return 4;
-    case 29: return 8;
-#else // Starts at 40 and there are 8 of them
    case 40: return 1;
    case 41: return 2;
    case 42: return 4;
@@ -63,6 +59,11 @@ int ADCInput::_mask(pin_size_t p) {
    case 45: return 32;
    case 46: return 64;
    case 47: return 128;
+#else
+    case 26: return 1;
+    case 27: return 2;
+    case 28: return 4;
+    case 29: return 8;
 #endif
    default: return 0;
    }
@@ -122,6 +123,18 @@ bool ADCInput::begin() {
            adc_gpio_init(pin);
        }
    }
+
+    // Make sure the bufferWords is a multiple of the natural size.
+    // For 1 and 2 inputs there will never be a misalignment on overflow
+    // For 3 inputs we need to have a multiple of 3 words to guarantee that every buffer[0] is ADC[0].  OTW we can slip on an overflow
+    // Data = [ADC0:ADC1, ADC2:ADC0, ADC1:ADC2], [ADC0:ADC1, ADC2:ADC0, ADC1:ADC2,ADC3], ...
+    // For 4 inputs we need to have a multiple of 2 words, same reason.  See #2991
+    // Data = [ADC0:ADC1, ADC2:ADC3] [ADC0:ADC1, ADC2:ADC3]
+    if (((cnt == 3) && (_bufferWords % 3)) || ((cnt == 4) && (_bufferWords % 2))) {
+        DEBUGV("ADCInput: bufferWords needs to be a multiple of 3 for 3 inputs, 2 for 4 inputs\n");
+        return false;
+    }
+
    adc_set_round_robin(_pinMask);
    adc_fifo_setup(true, true, 1, false, false);

@@ -196,7 +196,7 @@ static void extract_service(gatt_client_service_t * service, uint8_t * packet) {
    service->start_group_handle = little_endian_read_16(packet, 4);
    service->end_group_handle   = little_endian_read_16(packet, 6);
    service->uuid16 = 0;
-    reverse_128(&packet[8], service->uuid128);
+    reverse_128(&packet[12], service->uuid128);
    if (uuid_has_bluetooth_prefix(service->uuid128)) {
        service->uuid16 = big_endian_read_32(service->uuid128, 0);
    }
@@ -28,7 +28,7 @@ static const struct pio_program pio_i2s_mclk_program = {
    .instructions = pio_i2s_mclk_program_instructions,
    .length = 2,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_i2s_mclk_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -67,7 +67,7 @@ static const struct pio_program pio_i2s_out_program = {
    .instructions = pio_i2s_out_program_instructions,
    .length = 8,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_i2s_out_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -107,7 +107,7 @@ static const struct pio_program pio_i2s_out_swap_program = {
    .instructions = pio_i2s_out_swap_program_instructions,
    .length = 8,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_i2s_out_swap_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -143,7 +143,7 @@ static const struct pio_program pio_tdm_out_program = {
    .instructions = pio_tdm_out_program_instructions,
    .length = 4,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_tdm_out_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -179,7 +179,7 @@ static const struct pio_program pio_tdm_out_swap_program = {
    .instructions = pio_tdm_out_swap_program_instructions,
    .length = 4,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_tdm_out_swap_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -199,6 +199,7 @@ static inline pio_sm_config pio_tdm_out_swap_program_get_default_config(uint off

 #define pio_tdm_inout_wrap_target 0
 #define pio_tdm_inout_wrap 5
+#define pio_tdm_inout_pio_version 0

 static const uint16_t pio_tdm_inout_program_instructions[] = {
    //     .wrap_target
@@ -216,7 +217,7 @@ static const struct pio_program pio_tdm_inout_program = {
    .instructions = pio_tdm_inout_program_instructions,
    .length = 6,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_tdm_inout_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -236,6 +237,7 @@ static inline pio_sm_config pio_tdm_inout_program_get_default_config(uint offset

 #define pio_tdm_inout_swap_wrap_target 0
 #define pio_tdm_inout_swap_wrap 5
+#define pio_tdm_inout_swap_pio_version 0

 static const uint16_t pio_tdm_inout_swap_program_instructions[] = {
    //     .wrap_target
@@ -253,7 +255,7 @@ static const struct pio_program pio_tdm_inout_swap_program = {
    .instructions = pio_tdm_inout_swap_program_instructions,
    .length = 6,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_tdm_inout_swap_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -293,7 +295,7 @@ static const struct pio_program pio_lsbj_out_program = {
    .instructions = pio_lsbj_out_program_instructions,
    .length = 8,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_lsbj_out_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -333,7 +335,7 @@ static const struct pio_program pio_lsbj_out_swap_program = {
    .instructions = pio_lsbj_out_swap_program_instructions,
    .length = 8,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_lsbj_out_swap_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -373,7 +375,7 @@ static const struct pio_program pio_i2s_in_program = {
    .instructions = pio_i2s_in_program_instructions,
    .length = 8,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_i2s_in_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -413,7 +415,7 @@ static const struct pio_program pio_i2s_in_swap_program = {
    .instructions = pio_i2s_in_swap_program_instructions,
    .length = 8,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_i2s_in_swap_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -457,7 +459,7 @@ static const struct pio_program pio_i2s_inout_program = {
    .instructions = pio_i2s_inout_program_instructions,
    .length = 12,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_i2s_inout_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -501,7 +503,7 @@ static const struct pio_program pio_i2s_inout_swap_program = {
    .instructions = pio_i2s_inout_swap_program_instructions,
    .length = 12,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pio_i2s_inout_swap_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -659,3 +661,4 @@ static inline void pio_i2s_inout_program_init(PIO pio, uint sm, uint offset, uin
 }

 #endif
+
@@ -31,7 +31,7 @@ static inline void pdm_pio_program_init(PIO pio, uint sm, uint offset, uint clkP
  pio_sm_set_consecutive_pindirs(pio, sm, dataPin, 1, false);
  pio_sm_set_consecutive_pindirs(pio, sm, clkPin, 1, true);
  pio_sm_set_pins_with_mask(pio, sm, 0, (1u << clkPin) );
-  //pio_gpio_init(pio, dataPin);
+  pio_gpio_init(pio, dataPin);
  pio_gpio_init(pio, clkPin);

  pio_sm_init(pio, sm, offset, &c);
@@ -28,7 +28,7 @@ static const struct pio_program pdm_pio_program = {
    .instructions = pdm_pio_program_instructions,
    .length = 2,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = pdm_pio_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -18,8 +18,8 @@ static const PWMPacerPrecalc __PWMAudio_pacer[] = {{8000, 16000, 1}, {11025, 116
 static const PWMPacerPrecalc __PWMAudio_pacer[] = {{8000, 16625, 1}, {11025, 24127, 2}, {16000, 16625, 2}, {22050, 24127, 4}, {32000, 16625, 4}, {44100, 24127, 8}, {48000, 16625, 6}, {88200, 24127, 16}, {96000, 16625, 12}, {176400, 47500, 63}, {192000, 16625, 24}};
 #elif F_CPU == 150000000
 static const PWMPacerPrecalc __PWMAudio_pacer[] = {{8000, 18750, 1}, {11025, 27211, 2}, {16000, 9375, 1}, {22050, 47619, 7}, {32000, 9375, 2}, {44100, 37415, 11}, {48000, 3125, 1}, {88200, 42517, 25}, {96000, 3125, 2}, {176400, 42517, 50}, {192000, 3125, 4}};
-#elif F_CPU == 175000000
-static const PWMPacerPrecalc __PWMAudio_pacer[] = {{8000, 21875, 1}, {11025, 15873, 1}, {16000, 21875, 2}, {22050, 15873, 2}, {32000, 21875, 4}, {44100, 15873, 4}, {48000, 21875, 6}, {88200, 15873, 8}, {96000, 21875, 12}, {176400, 62500, 63}, {192000, 21875, 24}};
+#elif F_CPU == 176000000
+static const PWMPacerPrecalc __PWMAudio_pacer[] = {{8000, 22000, 1}, {11025, 63855, 4}, {16000, 11000, 1}, {22050, 55873, 7}, {32000, 5500, 1}, {44100, 55873, 14}, {48000, 11000, 3}, {88200, 55873, 28}, {96000, 5500, 3}, {176400, 55873, 56}, {192000, 2750, 3}};
 #elif F_CPU == 200000000
 static const PWMPacerPrecalc __PWMAudio_pacer[] = {{8000, 25000, 1}, {11025, 54422, 3}, {16000, 12500, 1}, {22050, 63492, 7}, {32000, 6250, 1}, {44100, 31746, 7}, {48000, 12500, 3}, {88200, 15873, 7}, {96000, 6250, 3}, {176400, 53288, 47}, {192000, 3125, 3}};
 #elif F_CPU == 225000000
@@ -28,8 +28,8 @@ static const PWMPacerPrecalc __PWMAudio_pacer[] = {{8000, 28125, 1}, {11025, 204
 static const PWMPacerPrecalc __PWMAudio_pacer[] = {{8000, 30000, 1}, {11025, 65306, 3}, {16000, 15000, 1}, {22050, 32653, 3}, {32000, 7500, 1}, {44100, 59864, 11}, {48000, 5000, 1}, {88200, 62585, 23}, {96000, 2500, 1}, {176400, 62585, 46}, {192000, 1250, 1}};
 #elif F_CPU == 250000000
 static const PWMPacerPrecalc __PWMAudio_pacer[] = {{8000, 31250, 1}, {11025, 45351, 2}, {16000, 15625, 1}, {22050, 56689, 5}, {32000, 15625, 2}, {44100, 62358, 11}, {48000, 15625, 3}, {88200, 42517, 15}, {96000, 15625, 6}, {176400, 42517, 30}, {192000, 15625, 12}};
-#elif F_CPU == 275000000
-static const PWMPacerPrecalc __PWMAudio_pacer[] = {{8000, 34375, 1}, {11025, 49887, 2}, {16000, 34375, 2}, {22050, 37415, 3}, {32000, 34375, 4}, {44100, 37415, 6}, {48000, 34375, 6}, {88200, 37415, 12}, {96000, 34375, 12}, {176400, 35856, 23}, {192000, 34375, 24}};
+#elif F_CPU == 276000000
+static const PWMPacerPrecalc __PWMAudio_pacer[] = {{8000, 34500, 1}, {11025, 25034, 1}, {16000, 17250, 1}, {22050, 12517, 1}, {32000, 8625, 1}, {44100, 12517, 2}, {48000, 5750, 1}, {88200, 12517, 4}, {96000, 2875, 1}, {176400, 12517, 8}, {192000, 2875, 2}};
 #elif F_CPU == 300000000
 static const PWMPacerPrecalc __PWMAudio_pacer[] = {{8000, 37500, 1}, {11025, 27211, 1}, {16000, 18750, 1}, {22050, 27211, 2}, {32000, 9375, 1}, {44100, 47619, 7}, {48000, 6250, 1}, {88200, 37415, 11}, {96000, 3125, 1}, {176400, 42517, 25}, {192000, 3125, 2}};
 #else
@@ -264,7 +264,7 @@ void SPIClassRP2040::abortAsync() {

 bool SPIClassRP2040::setRX(pin_size_t pin) {
 #if defined(PICO_RP2350) && !PICO_RP2350A // RP2350B
-    constexpr uint64_t valid[2] = { __bitset({0, 4, 16, 20, 32, 26}) /* SPI0 */,
+    constexpr uint64_t valid[2] = { __bitset({0, 4, 16, 20, 32, 36}) /* SPI0 */,
                                    __bitset({8, 12, 24, 28, 40, 44})  /* SPI1 */
                                  };
 #else
@@ -36,7 +36,7 @@ static const struct pio_program servo_program = {
    .instructions = servo_program_instructions,
    .length = 8,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = servo_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -28,7 +28,7 @@ static const struct pio_program spi_cpha0_program = {
    .instructions = spi_cpha0_program_instructions,
    .length = 2,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = spi_cpha0_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -63,7 +63,7 @@ static const struct pio_program spi_cpha1_program = {
    .instructions = spi_cpha1_program_instructions,
    .length = 3,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = spi_cpha1_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -133,7 +133,7 @@ static const struct pio_program spi_cpha0_cs_program = {
    .instructions = spi_cpha0_cs_program_instructions,
    .length = 9,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = spi_cpha0_cs_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -176,7 +176,7 @@ static const struct pio_program spi_cpha1_cs_program = {
    .instructions = spi_cpha1_cs_program_instructions,
    .length = 9,
    .origin = -1,
-    .pio_version = 0,
+    .pio_version = spi_cpha1_cs_pio_version,
 #if PICO_PIO_VERSION > 0
    .used_gpio_ranges = 0x0
 #endif
@@ -6,42 +6,53 @@
 const char* ssl_host = "www.akamai.com";
 const uint16_t ssl_port = 443;

+// openssl s_client -connect www.akamai.com:443  < /dev/null 2>/dev/null | openssl x509 -fingerprint -noout -in /dev/stdin | cut -f2 -d= | sed 's/^/const char fingerprint_ssl[] = "/' | sed 's/$/";/'
+const char fingerprint_ssl[] = "D6:6C:EF:1A:8A:CE:27:18:D4:0C:83:2C:AE:4D:1B:B9:4C:B8:C9:83";

-const char fingerprint_ssl [] PROGMEM = "48:EF:70:29:41:CE:64:C9:DF:57:A2:46:E8:34:E1:50:0B:70:AE:17";
-const char pubkey_ssl [] PROGMEM = R"PUBKEY(
+// openssl s_client -connect www.akamai.com:443 < /dev/null 2>/dev/null | openssl x509 -pubkey -noout
+const char pubkey_ssl[] = R"PUBKEY(
 -----BEGIN PUBLIC KEY-----
-MFkwEwYHKoZIzj0CAQYIKoZIzj0DAQcDQgAEiuc+zlu43bv55+s0Fj6RiBW+olZm
-c/AkoTP48CFCIGP1DET7Oufx6oe63GIuBzdVfR5D6R2z818b5gY1o2lBxg==
+MFkwEwYHKoZIzj0CAQYIKoZIzj0DAQcDQgAE2BD04+A9idhYCHJ4RBy2KHtvJAsz
+KLkAzZOWDEqjNu4plNmiWMymBw0rJggZOU4/TE+a4KqzBgsus9QkFZh88w==
 -----END PUBLIC KEY-----
 )PUBKEY";

-const char cert_CA [] PROGMEM = R"CERT(
+// openssl s_client -connect www.akamai.com:443 < /dev/null 2> /dev/null | openssl x509
+
+const char cert_CA[]  = R"CERT(
 -----BEGIN CERTIFICATE-----
-MIIEvjCCA6agAwIBAgIQBtjZBNVYQ0b2ii+nVCJ+xDANBgkqhkiG9w0BAQsFADBh
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+oSSK9/26Uk3fqp7btK2SaEyWM/u++sOZXMeEOefnKwUCIQCqKysJztOF58PueXeE
+pLliBWZUnjUrvPIbtxp31gQQITANBgkqhkiG9w0BAQsFAAOCAQEAAoJryZtJc8oc
+hf5vflkW2w0PdJ5NpbmjZOMTyutBRaJpxrDqKnjKBEOp6liZ2pDbUngGAwLEM30
+KRBwJCc44u7w8Kj/KOoIZFoh9SiONAEn1qXWF0nFkYAD8J8yYwzkJy7fa3sdodaI
+ex5NJosK/tyXjEBOcTrBsXkzs55pjSi+KJiiOHs/hDuBdyDtJs1ENAOswd8AWMSk
+S9WycNxxEFH9VQgwgUhaI5Lc9J8rt3IJur1wp1JoDwdjIhs1M0rofgdW716UpmQ9
+visdfGu8fCAlDSBPPC6gUPlFGFf4ujUmprJyBQ5xsYva0sVqhGbaoxtV7FdMDJkg
+nDRma+9lPA==
 -----END CERTIFICATE-----
 )CERT";
@@ -19,6 +19,8 @@
    You should have received a copy of the GNU Lesser General Public
    License along with this library; if not, write to the Free Software
    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+    Modified May 2025 by Sven Bruns (Lorandil on GitHub) to support user defined buffer size (inspired by ESP32 code)
 */

 #include <Arduino.h>
@@ -46,6 +48,10 @@ TwoWire::TwoWire(i2c_inst_t *i2c, pin_size_t sda, pin_size_t scl) {
    _running = false;
    _txBegun = false;
    _buffLen = 0;
+
+    // allocate buffer memory early, so we don't fragment the heap later
+    _buffSize = WIRE_BUFFER_SIZE;
+    _buff = (uint8_t *)malloc(_buffSize);
 }

 bool TwoWire::setSDA(pin_size_t pin) {
@@ -158,6 +164,16 @@ void TwoWire::begin(uint8_t addr) {
        // ERROR
        return;
    }
+
+    // allocate buffer if necessary
+    if (!_buff) {
+        _buff = (uint8_t *)malloc(_buffSize);
+        if (!_buff) {
+            // ERROR
+            return;
+        }
+    }
+
    _slave = true;
    i2c_init(_i2c, _clkHz);
    i2c_set_slave_mode(_i2c, true, addr);
@@ -192,7 +208,7 @@ void TwoWire::onIRQ() {
    // First, pull off any data available
    if (irqstat & (1 << 2)) {
        // RX_FULL
-        if (_buffLen < (int)sizeof(_buff)) {
+        if (_buffLen < int(_buffSize)) {
            _buff[_buffLen++] = _i2c->hw->data_cmd & 0xff;
        } else {
            _i2c->hw->data_cmd;
@@ -271,7 +287,7 @@ void TwoWire::beginTransmission(uint8_t addr) {
 }

 size_t TwoWire::requestFrom(uint8_t address, size_t quantity, bool stopBit) {
-    if (!_running || _txBegun || !quantity || (quantity > sizeof(_buff))) {
+    if (!_running || _txBegun || !quantity || (quantity > _buffSize)) {
        return 0;
    }

@@ -448,7 +464,7 @@ size_t TwoWire::write(uint8_t ucData) {
            return 0;
        }
    } else {
-        if (!_txBegun || (_buffLen == sizeof(_buff))) {
+        if (!_txBegun || (_buffLen == int(_buffSize))) {
            return 0;
        }
        _buff[_buffLen++] = ucData;
@@ -745,6 +761,20 @@ void TwoWire::clearTimeoutFlag() {
    _timeoutFlag = false;
 }

+size_t TwoWire::setBufferSize(size_t bSize) {
+    if (_running) {
+        // ERROR - transmission already running. Report back current buffer size
+        return _buffSize;
+    }
+    // only free the buffer, if it already exists and the new size differs from the current one
+    if (_buff && (bSize != _buffSize)) {
+        free(_buff);
+        _buff = nullptr;
+    }
+    _buffSize = max(WIRE_BUFFER_SIZE_MIN, int(bSize)); // enforce minimum buffer size
+    return _buffSize;
+}
+
 #ifndef __WIRE0_DEVICE
 #define __WIRE0_DEVICE i2c0
 #endif
@@ -19,6 +19,8 @@
    You should have received a copy of the GNU Lesser General Public
    License along with this library; if not, write to the Free Software
    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+    Modified May 2025 by Sven Bruns (Lorandil on GitHub) to support user defined buffer size (inspired by ESP32 code)
 */

 #pragma once
@@ -30,8 +32,14 @@
 // WIRE_HAS_END means Wire has end()
 #define WIRE_HAS_END 1

+// WIRE_HAS_BUFFER_SIZE means Wire has setBufferSize()
+#define WIRE_HAS_BUFFER_SIZE 1
+
 #ifndef WIRE_BUFFER_SIZE
-#define WIRE_BUFFER_SIZE 256
+#define WIRE_BUFFER_SIZE 256    // default size, if none is set using Wire::setBuffersize(size_t)
+#endif
+#ifndef WIRE_BUFFER_SIZE_MIN
+#define WIRE_BUFFER_SIZE_MIN 32 // minimum size for safe operation
 #endif

 class TwoWire : public HardwareI2C {
@@ -97,6 +105,8 @@ public:
    bool getTimeoutFlag(void);
    void clearTimeoutFlag(void);

+    size_t setBufferSize(size_t bSize);	// set buffer size (call prior to 'begin()')
+
    // IRQ callback
    void onIRQ();

@@ -115,7 +125,9 @@ private:
    bool _reset_with_timeout;
    void _handleTimeout(bool reset);

-    uint8_t _buff[WIRE_BUFFER_SIZE];
+    uint8_t *_buff;         // pointer to i2c buffer
+    size_t  _buffSize;      // current buffer size
+
    int _buffLen;
    int _buffOff;

@@ -186,6 +186,7 @@ protected:
    SPIClass& _spiUnit;
    SPISettings _spiSettings = SPISettings(4000000, MSBFIRST, SPI_MODE0);
    netif _netif;
+    bool _isDHCP = true;

    uint16_t _mtu;
    int8_t   _intrPin;
@@ -282,6 +283,8 @@ bool LwipIntfDev<RawDev>::config(const IPAddress& localIP, const IPAddress& gate
        return false;
    }

+    _isDHCP = (localIP.v4() == 0);
+
    IPAddress realGateway, realNetmask, realDns1;
    if (!ipAddressReorder(localIP, gateway, netmask, dns1, realGateway, realNetmask, realDns1)) {
        return false;
@@ -389,8 +392,11 @@ bool LwipIntfDev<RawDev>::begin(const uint8_t* macAddress, const uint16_t mtu) {
        _phID = __addEthernetPacketHandler([this] { this->handlePackets(); });
    }

-    if (localIP().v4() == 0) {
-        // IP not set, starting DHCP
+    if (_isDHCP) {
+        // Destroy any existing address
+        ip4_addr_set_u32(ip_2_ip4(&_netif.ip_addr), 0);
+
+        // Start a new DHCP request
        _netif.flags |= NETIF_FLAG_UP;
        switch (dhcp_start(&_netif)) {
        case ERR_OK:
@@ -14,6 +14,7 @@

 #define wiznet_pio_spi_write_read_wrap_target 0
 #define wiznet_pio_spi_write_read_wrap 8
+#define wiznet_pio_spi_write_read_pio_version 0

 #define wiznet_pio_spi_write_read_offset_write_bits 0u
 #define wiznet_pio_spi_write_read_offset_write_end 3u
@@ -38,6 +39,10 @@ static const struct pio_program wiznet_pio_spi_write_read_program = {
    .instructions = wiznet_pio_spi_write_read_program_instructions,
    .length = 9,
    .origin = -1,
+    .pio_version = wiznet_pio_spi_write_read_pio_version,
+#if PICO_PIO_VERSION > 0
+    .used_gpio_ranges = 0x0
+#endif
 };

 static inline pio_sm_config wiznet_pio_spi_write_read_program_get_default_config(uint offset) {
@@ -0,0 +1,95 @@
+/*
+    This sketch establishes a TCP connection to a "quote of the day" service.
+    It sends a "hello" message, and then prints received data.
+*/
+
+#include <W6300lwIP.h>
+
+const char* host = "djxmmx.net";
+const uint16_t port = 17;
+
+Wiznet6300lwIP eth(1 /* chip select */);
+
+void setup() {
+  // Set up SPI pinout to match your HW
+  SPI.setRX(0);
+  SPI.setCS(1);
+  SPI.setSCK(2);
+  SPI.setTX(3);
+
+  Serial.begin(115200);
+  delay(5000);
+  Serial.println();
+  Serial.println();
+  Serial.println("Starting Ethernet port");
+
+  // Start the Ethernet port
+  if (!eth.begin()) {
+    Serial.println("No wired Ethernet hardware detected. Check pinouts, wiring.");
+    while (1) {
+      delay(1000);
+    }
+  }
+
+  while (!eth.connected()) {
+    Serial.print(".");
+    delay(500);
+  }
+
+  Serial.println("");
+  Serial.println("Ethernet connected");
+  Serial.println("IP address: ");
+  Serial.println(eth.localIP());
+}
+
+void loop() {
+  static bool wait = false;
+
+  Serial.print("connecting to ");
+  Serial.print(host);
+  Serial.print(':');
+  Serial.println(port);
+
+  // Use WiFiClient class to create TCP connections
+  WiFiClient client;
+  if (!client.connect(host, port)) {
+    Serial.println("connection failed");
+    delay(5000);
+    return;
+  }
+
+  // This will send a string to the server
+  Serial.println("sending data to server");
+  if (client.connected()) {
+    client.println("hello from RP2040");
+  }
+
+  // wait for data to be available
+  unsigned long timeout = millis();
+  while (client.available() == 0) {
+    if (millis() - timeout > 5000) {
+      Serial.println(">>> Client Timeout !");
+      client.stop();
+      delay(60000);
+      return;
+    }
+  }
+
+  // Read all the lines of the reply from server and print them to Serial
+  Serial.println("receiving from remote server");
+  // not testing 'client.connected()' since we do not need to send data here
+  while (client.available()) {
+    char ch = static_cast<char>(client.read());
+    Serial.print(ch);
+  }
+
+  // Close the connection
+  Serial.println();
+  Serial.println("closing connection");
+  client.stop();
+
+  if (wait) {
+    delay(300000);  // execute once every 5 minutes, don't flood remote service
+  }
+  wait = true;
+}
@@ -0,0 +1,18 @@
+#######################################
+# Syntax Coloring Map
+#######################################
+
+#######################################
+# Library (KEYWORD1)
+#######################################
+
+W6100lwIP	KEYWORD1
+Wiznet6100lwIP	KEYWORD1
+
+#######################################
+# Methods and Functions (KEYWORD2)
+#######################################
+
+#######################################
+# Constants (LITERAL1)
+#######################################
@@ -0,0 +1,10 @@
+name=lwIP_w6300
+version=1
+author=Stefan Nuernberger
+maintainer=esp8266/Arduino
+sentence=Ethernet driver
+paragraph=Wiznet6300 ethernet drivers for lwIP and esp8266 Arduino from https://github.com/njh/W5100MacRaw
+category=Communication
+url=https://github.com/esp8266/Arduino
+architectures=rp2040
+dot_a_linkage=true
@@ -0,0 +1,8 @@
+#pragma once
+
+#include <LwipIntfDev.h>
+#include <utility/w6300.h>
+#include <LwipEthernet.h>
+#include <WiFi.h>
+
+using Wiznet6300lwIP = LwipIntfDev<Wiznet6300>;
@@ -0,0 +1,457 @@
+/*
+    Copyright (c) 2013, WIZnet Co., Ltd.
+    Copyright (c) 2016, Nicholas Humfrey
+    All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions
+    are met:
+    1. Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in the
+      documentation and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+    ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+    FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+    COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+    INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+    (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+    SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+    HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+    STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+    OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+// original sources: https://github.com/njh/W5500MacRaw
+
+#include <SPI.h>
+#include "wiznet_pio_qspi.h"
+#include "w6300.h"
+#include <LwipEthernet.h>
+
+#define _W6300_SPI_READ_            (0x00 << 5)        ///< SPI interface Read operation in Control Phase
+#define _W6300_SPI_WRITE_           (0x01 << 5)        ///< SPI interface Write operation in Control Phase
+
+#define QSPI_SINGLE_MODE            (0x00 << 6) // 0b0000 0000 // 0x00
+#define QSPI_DUAL_MODE              (0x01 << 6) // 0b0100 0000 // 0x40
+#define QSPI_QUAD_MODE              (0x02 << 6) // 0b1000 0000 // 0x80 
+
+wiznet_pio_qspi_config_t wiznet_pio_qspi_config;
+wiznet_pio_qspi_handle_t wiznet_pio_qspi_handle = NULL;
+
+/**
+    Check physical link
+    @return true when physical link is up
+*/
+bool Wiznet6300::isLinked() {
+    ethernet_arch_lwip_gpio_mask();
+    ethernet_arch_lwip_begin();
+    auto ret = wizphy_getphylink() == PHY_LINK_ON;
+    ethernet_arch_lwip_end();
+    ethernet_arch_lwip_gpio_unmask();
+    return ret;
+}
+
+uint8_t Wiznet6300::wizchip_read(uint8_t block, uint16_t address) {
+    uint8_t ret = 0;
+    uint8_t opcode = 0;
+    uint16_t ADDR = 0;
+
+    wizchip_cs_select();
+
+    opcode = (uint8_t)((block & 0x000000FF) | (_W6300_SPI_READ_) | (QSPI_QUAD_MODE));
+    ADDR = (uint16_t)(address & 0x0000FFFF);
+    (*wiznet_pio_qspi_handle)->read_byte(opcode, ADDR, &ret, 1);
+
+    wizchip_cs_deselect();
+    return ret;
+}
+
+uint16_t Wiznet6300::wizchip_read_word(uint8_t block, uint16_t address) {
+    return ((uint16_t)wizchip_read(block, address) << 8) + wizchip_read(block, address + 1);
+}
+
+void Wiznet6300::wizchip_read_buf(uint8_t block, uint16_t address, uint8_t* pBuf, uint16_t len) {
+    uint8_t opcode = 0;
+    uint16_t ADDR = 0;
+
+    wizchip_cs_select();
+
+    opcode = (uint8_t)((block & 0x000000FF) | (_W6300_SPI_READ_) | (QSPI_QUAD_MODE));
+    ADDR = (uint16_t)(address & 0x0000FFFF);
+    (*wiznet_pio_qspi_handle)->read_byte(opcode, ADDR, pBuf, len);
+
+    wizchip_cs_deselect();
+}
+
+void Wiznet6300::wizchip_write(uint8_t block, uint16_t address, uint8_t wb) {
+    uint8_t opcode = 0;
+    uint16_t ADDR = 0;
+
+    wizchip_cs_select();
+
+    opcode = (uint8_t)((block & 0x000000FF) | (_W6300_SPI_WRITE_) | (QSPI_QUAD_MODE));
+    ADDR = (uint16_t)(address & 0x0000FFFF);
+    (*wiznet_pio_qspi_handle)->write_byte(opcode, ADDR, &wb, 1);
+
+    wizchip_cs_deselect();
+}
+
+void Wiznet6300::wizchip_write_word(uint8_t block, uint16_t address, uint16_t word) {
+    wizchip_write(block, address, (uint8_t)(word >> 8));
+    wizchip_write(block, address + 1, (uint8_t)word);
+}
+
+void Wiznet6300::wizchip_write_buf(uint8_t block, uint16_t address, const uint8_t* pBuf,
+                                   uint16_t len) {
+    uint8_t opcode = 0;
+    uint16_t ADDR = 0;
+
+    wizchip_cs_select();
+
+    opcode = (uint8_t)((block & 0x000000FF) | (_W6300_SPI_WRITE_) | (QSPI_QUAD_MODE));
+    ADDR = (uint16_t)(address & 0x0000FFFF);
+    (*wiznet_pio_qspi_handle)->write_byte(opcode, ADDR, (uint8_t *)pBuf, len);
+
+    wizchip_cs_deselect();
+}
+
+void Wiznet6300::setSn_CR(uint8_t cr) {
+    // Write the command to the Command Register
+    wizchip_write(BlockSelectSReg, Sn_CR, cr);
+
+    // Now wait for the command to complete
+    while (wizchip_read(BlockSelectSReg, Sn_CR))
+        ;
+}
+
+uint16_t Wiznet6300::getSn_TX_FSR() {
+    uint16_t val = 0, val1 = 0;
+    do {
+        val1 = wizchip_read_word(BlockSelectSReg, Sn_TX_FSR);
+        if (val1 != 0) {
+            val = wizchip_read_word(BlockSelectSReg, Sn_TX_FSR);
+        }
+    } while (val != val1);
+    return val;
+}
+
+uint16_t Wiznet6300::getSn_RX_RSR() {
+    uint16_t val = 0, val1 = 0;
+    do {
+        val1 = wizchip_read_word(BlockSelectSReg, Sn_RX_RSR);
+        if (val1 != 0) {
+            val = wizchip_read_word(BlockSelectSReg, Sn_RX_RSR);
+        }
+    } while (val != val1);
+    return val;
+}
+
+void Wiznet6300::wizchip_send_data(const uint8_t* wizdata, uint16_t len) {
+    uint16_t ptr = 0;
+
+    if (len == 0) {
+        return;
+    }
+    ptr = getSn_TX_WR();
+    wizchip_write_buf(BlockSelectTxBuf, ptr, wizdata, len);
+
+    ptr += len;
+
+    setSn_TX_WR(ptr);
+}
+
+void Wiznet6300::wizchip_recv_data(uint8_t* wizdata, uint16_t len) {
+    uint16_t ptr;
+
+    if (len == 0) {
+        return;
+    }
+    ptr = getSn_RX_RD();
+    wizchip_read_buf(BlockSelectRxBuf, ptr, wizdata, len);
+    ptr += len;
+
+    setSn_RX_RD(ptr);
+}
+
+void Wiznet6300::wizchip_recv_ignore(uint16_t len) {
+    uint16_t ptr;
+
+    ptr = getSn_RX_RD();
+    ptr += len;
+    setSn_RX_RD(ptr);
+}
+
+bool Wiznet6300::wizchip_sw_reset() {
+    setChipLOCK(CHPLCKR_UNLOCK);
+    uint16_t count = 0;
+    do {
+        // Wait Unlock Complete
+        if (++count > 20) {
+            // Check retry count
+            return false; // Over Limit retry count
+        }
+    } while ((getStatus() & SYSR_CHPL_LOCK) ^ SYSR_CHPL_ULOCK); // Exit Wait Unlock Complete
+
+    setCommand0(0x0); // Software Reset
+
+    do {
+        // Wait Lock Complete
+        if (++count > 20) {
+            // Check retry count
+            return false; // Over Limit retry count
+        }
+
+    } while ((getStatus() & SYSR_CHPL_LOCK) ^ SYSR_CHPL_LOCK); // Exit Wait Lock Complete
+
+    return true;
+}
+
+int8_t Wiznet6300::wizphy_getphylink() {
+    int8_t tmp;
+    if (getPHYCFGR() & PHYCFGR_LNK_ON) {
+        tmp = PHY_LINK_ON;
+    } else {
+        tmp = PHY_LINK_OFF;
+    }
+    return tmp;
+}
+
+int8_t Wiznet6300::wizphy_getphypmode() {
+    int8_t tmp = 0;
+    if (getPHYCFGR() & PHYCFGR_OPMDC_PDOWN) {
+        tmp = PHY_POWER_DOWN;
+    } else {
+        tmp = PHY_POWER_NORM;
+    }
+    return tmp;
+}
+
+void Wiznet6300::wizphy_reset() {
+    uint8_t tmp = getPHYCFGR();
+    tmp &= PHYCFGR_RST;
+    setPHYCFGR(tmp);
+    tmp = getPHYCFGR();
+    tmp |= ~PHYCFGR_RST;
+    setPHYCFGR(tmp);
+}
+
+int8_t Wiznet6300::wizphy_setphypmode(uint8_t pmode) {
+    uint8_t tmp = 0;
+    tmp         = getPHYCFGR();
+    if ((tmp & PHYCFGR_OPMD) == 0) {
+        return -1;
+    }
+    tmp &= ~PHYCFGR_OPMDC_ALLA;
+    if (pmode == PHY_POWER_DOWN) {
+        tmp |= PHYCFGR_OPMDC_PDOWN;
+    } else {
+        tmp |= PHYCFGR_OPMDC_ALLA;
+    }
+    setPHYCFGR(tmp);
+    wizphy_reset();
+    tmp = getPHYCFGR();
+    if (pmode == PHY_POWER_DOWN) {
+        if (tmp & PHYCFGR_OPMDC_PDOWN) {
+            return 0;
+        }
+    } else {
+        if (tmp & PHYCFGR_OPMDC_ALLA) {
+            return 0;
+        }
+    }
+    return -1;
+}
+
+Wiznet6300::Wiznet6300(int8_t cs, SPIClass& spi, int8_t intr) : _spi(spi), _cs(cs), _intr(intr) {
+}
+
+bool Wiznet6300::begin(const uint8_t* mac_address, netif *net) {
+    wiznet_pio_qspi_config.clock_div_major = 4;
+    wiznet_pio_qspi_config.clock_div_minor = 0;
+    wiznet_pio_qspi_config.data_io0_pin = WIZNET_PIO_QSPI_DATA_IO0_PIN;
+    wiznet_pio_qspi_config.data_io1_pin = WIZNET_PIO_QSPI_DATA_IO1_PIN;
+    wiznet_pio_qspi_config.data_io2_pin = WIZNET_PIO_QSPI_DATA_IO2_PIN;
+    wiznet_pio_qspi_config.data_io3_pin = WIZNET_PIO_QSPI_DATA_IO3_PIN;
+    wiznet_pio_qspi_config.clock_pin = WIZNET_PIO_QSPI_SCK_PIN;
+    wiznet_pio_qspi_config.cs_pin = WIZNET_PIO_QSPI_CS_PIN;
+
+    if (wiznet_pio_qspi_handle != NULL) {
+        wiznet_pio_qspi_close(wiznet_pio_qspi_handle);
+    }
+    wiznet_pio_qspi_handle = wiznet_pio_qspi_open(&wiznet_pio_qspi_config);
+    (*wiznet_pio_qspi_handle)->set_active(wiznet_pio_qspi_handle);
+
+    _netif = net;
+    memcpy(_mac_address, mac_address, 6);
+
+    pinMode(_cs, OUTPUT);
+    wizchip_cs_deselect();
+
+    wizchip_sw_reset();
+
+    // Unlock
+    setChipLOCK(CHPLCKR_UNLOCK);
+    setNetLOCK(NETLCKR_UNLOCK);
+    setPHYLOCK(PHYLCKR_UNLOCK);
+
+    // W6100 CIDR0
+    // Version 97(dec) 0x61(hex)
+    int ver = getVERSIONR();
+
+    Serial.print("version = 0x");
+    Serial.println(ver, HEX);
+
+    if (ver != 0x61) {
+        return false;
+    }
+
+    // Use the full 32Kb of RAM for Socket 0
+    setSn_RXBUF_SIZE(32);
+    setSn_TXBUF_SIZE(32);
+
+    // Set our local MAC address
+    setSHAR(_mac_address);
+
+    // Open Socket 0 in MACRaw mode
+    setSn_MR(Sn_MR_MACRAW);
+    setSn_CR(Sn_CR_OPEN);
+    if (getSn_SR() != SOCK_MACRAW) {
+        // Failed to put socket 0 into MACRaw mode
+        return false;
+    }
+
+    Serial.println("MAC RAW mode!");
+
+    if (_intr >= 0) {
+
+        setSn_IR(0xff); // Clear everything
+
+
+        // Configure socket 0 interrupts
+        setSn_IMR(Sn_IMR_RECV); // we're not interested in Sn_IMR_SENDOK atm
+
+        // Enable socket 0 interrupts
+        setSIMR(SIMR_S0_INT);
+
+        // Disable unused interrupts
+        setIMR(0);
+
+        // Enable interrupt pin
+        setCommand1(SYCR1_IEN);
+
+    }
+
+    // Success
+    return true;
+}
+
+void Wiznet6300::end() {
+    setSn_CR(Sn_CR_CLOSE);
+
+    // clear all interrupt of the socket
+    setSn_IR(0xFF);
+
+    // Wait for socket to change to closed
+    while (getSn_SR() != SOCK_CLOSED)
+        ;
+}
+
+/*
+    uint16_t Wiznet6100::readFrame(uint8_t* buffer, uint16_t bufsize) {
+    uint16_t data_len = readFrameSize();
+
+    if (data_len == 0) {
+        return 0;
+    }
+
+    if (data_len > bufsize) {
+        // Packet is bigger than buffer - drop the packet
+        discardFrame(data_len);
+        return 0;
+    }
+
+    return readFrameData(buffer, data_len);
+    }
+*/
+
+uint16_t Wiznet6300::readFrameSize() {
+    setSn_IR(Sn_IR_RECV);
+
+    uint16_t len = getSn_RX_RSR();
+
+    if (len == 0) {
+        return 0;
+    }
+
+    uint8_t  head[2];
+    uint16_t data_len = 0;
+
+    wizchip_recv_data(head, 2);
+    setSn_CR(Sn_CR_RECV);
+
+    data_len = head[0];
+    data_len = (data_len << 8) + head[1];
+    data_len -= 2;
+
+    // Clear interrupt flags
+    setICLR(Sn_IRCLR_RECV);
+    return data_len;
+}
+
+void Wiznet6300::discardFrame(uint16_t framesize) {
+    wizchip_recv_ignore(framesize);
+    setSn_CR(Sn_CR_RECV);
+}
+
+uint16_t Wiznet6300::readFrameData(uint8_t* buffer, uint16_t framesize) {
+    wizchip_recv_data(buffer, framesize);
+    setSn_CR(Sn_CR_RECV);
+
+    // let lwIP deal with mac address filtering
+    return framesize;
+}
+
+uint16_t Wiznet6300::sendFrame(const uint8_t* buf, uint16_t len) {
+    ethernet_arch_lwip_gpio_mask(); // So we don't fire an IRQ and interrupt the send w/a receive!
+
+    // Wait for space in the transmit buffer
+    while (1) {
+        uint16_t freesize = getSn_TX_FSR();
+        if (getSn_SR() == SOCK_CLOSED) {
+            ethernet_arch_lwip_gpio_unmask();
+            return -1;
+        }
+        if (len <= freesize) {
+            break;
+        }
+    };
+
+    wizchip_send_data(buf, len);
+    setSn_CR(Sn_CR_SEND);
+
+    while (1) {
+        uint8_t tmp = getSn_IR();
+        if (tmp & Sn_IR_SENDOK) {
+            setSn_IR(Sn_IR_SENDOK);
+            // Packet sent ok
+            break;
+        } else if (tmp & Sn_IR_TIMEOUT) {
+            setSn_IR(Sn_IR_TIMEOUT);
+            // There was a timeout
+            ethernet_arch_lwip_gpio_unmask();
+            return -1;
+        }
+    }
+
+    ethernet_arch_lwip_gpio_unmask();
+    return len;
+}
@@ -0,0 +1,898 @@
+/*
+    Copyright (c) 2013, WIZnet Co., Ltd.
+    Copyright (c) 2016, Nicholas Humfrey
+    All rights reserved.
+
+    Redistribution and use in source and binary forms, with or without
+    modification, are permitted provided that the following conditions
+    are met:
+    1. Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in the
+      documentation and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+    ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+    FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
+    COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+    INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+    (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+    SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+    HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+    STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+    OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+// original sources: https://github.com/njh/W5500MacRaw
+
+#ifndef W6300_H
+#define W6300_H
+
+#include <stdint.h>
+#include <Arduino.h>
+#include <SPI.h>
+#include <LwipEthernet.h>
+#include "wiznet_pio_qspi.h"
+
+#define WIZNET_PIO_QSPI_DATA_IO0_PIN   18
+#define WIZNET_PIO_QSPI_DATA_IO1_PIN   19
+#define WIZNET_PIO_QSPI_DATA_IO2_PIN   20
+#define WIZNET_PIO_QSPI_DATA_IO3_PIN   21
+#define WIZNET_PIO_QSPI_SCK_PIN        17
+#define WIZNET_PIO_QSPI_CS_PIN         16
+
+class Wiznet6300 {
+public:
+    /**
+        Constructor that uses the default hardware SPI pins
+        @param cs the Arduino Chip Select / Slave Select pin (default 10)
+    */
+    Wiznet6300(int8_t cs = SS, SPIClass &spi = SPI, int8_t intr = -1);
+
+    /**
+        Initialise the Ethernet controller
+        Must be called before sending or receiving Ethernet frames
+
+        @param address the local MAC address for the Ethernet interface
+        @return Returns true if setting up the Ethernet interface was successful
+    */
+    bool begin(const uint8_t* address, netif *net);
+
+    /**
+        Shut down the Ethernet controlled
+    */
+    void end();
+
+    /**
+        Send an Ethernet frame
+        @param data a pointer to the data to send
+        @param datalen the length of the data in the packet
+        @return the number of bytes transmitted
+    */
+    uint16_t sendFrame(const uint8_t* data, uint16_t datalen);
+
+    /**
+        Read an Ethernet frame
+        @param buffer a pointer to a buffer to write the packet to
+        @param bufsize the available space in the buffer
+        @return the length of the received packet
+               or 0 if no packet was received
+    */
+    uint16_t readFrame(uint8_t* buffer, uint16_t bufsize);
+
+    bool isLinked();
+
+    /**
+        Report whether ::isLinked() API is implemented
+        @return true when ::isLinked() API is implemented
+    */
+    constexpr bool isLinkDetectable() const {
+        return true;
+    }
+
+    constexpr bool needsSPI() const {
+        return true;
+    }
+
+protected:
+    static constexpr bool interruptIsPossible() {
+        return true;
+    }
+
+    static constexpr PinStatus interruptMode() {
+        return LOW;
+    }
+
+    /**
+        Read an Ethernet frame size
+        @return the length of data do receive
+               or 0 if no frame was received
+    */
+    uint16_t readFrameSize();
+
+    /**
+        discard an Ethernet frame
+        @param framesize readFrameSize()'s result
+    */
+    void discardFrame(uint16_t framesize);
+
+    /**
+        Read an Ethernet frame data
+           readFrameSize() must be called first,
+           its result must be passed into framesize parameter
+        @param buffer a pointer to a buffer to write the frame to
+        @param framesize readFrameSize()'s result
+        @return the length of the received frame
+               or 0 if a problem occurred
+    */
+    uint16_t readFrameData(uint8_t* frame, uint16_t framesize);
+
+private:
+    //< SPI interface Read operation in Control Phase
+    static const uint8_t AccessModeRead = (0x00 << 2);
+
+    //< SPI interface Read operation in Control Phase
+    static const uint8_t AccessModeWrite = (0x01 << 2);
+
+    //< Common register block in Control Phase
+    static const uint8_t BlockSelectCReg = (0x00 << 3);
+
+    //< Socket 0 register block in Control Phase
+    static const uint8_t BlockSelectSReg = (0x01);
+
+    //< Socket 0 Tx buffer address block
+    static const uint8_t BlockSelectTxBuf = (0x02);
+
+    //< Socket 0 Rx buffer address block
+    static const uint8_t BlockSelectRxBuf = (0x03);
+
+    //< SPI Fixed Data Mode Length
+    static const uint8_t FixedDataMode1 = 1;
+    static const uint8_t FixedDataMode2 = 2;
+    static const uint8_t FixedDataMode4 = 3;
+
+    SPIClass& _spi;
+    int8_t    _cs;
+    int8_t    _intr;
+    uint8_t   _mac_address[6];
+
+    /**
+        Default function to select chip.
+        @note This function help not to access wrong address. If you do not describe this function
+        or register any functions, null function is called.
+    */
+    inline void wizchip_cs_select() {
+        //digitalWrite(WIZNET_PIO_QSPI_CS_PIN, LOW);
+        wiznet_pio_qspi_frame_start();
+    }
+
+    /**
+        Default function to deselect chip.
+        @note This function help not to access wrong address. If you do not describe this function
+        or register any functions, null function is called.
+    */
+    inline void wizchip_cs_deselect() {
+        //digitalWrite(WIZNET_PIO_QSPI_CS_PIN, HIGH);
+        wiznet_pio_qspi_frame_end();
+    }
+
+    /**
+        Default function to read in SPI interface.
+        @note This function help not to access wrong address. If you do not describe this function
+        or register any functions, null function is called.
+    */
+    inline uint8_t wizchip_spi_read_byte() {
+        //return _spi.transfer(0);
+        return 0;
+    }
+
+    /**
+        Default function to write in SPI interface.
+        @note This function help not to access wrong address. If you do not describe this function
+        or register any functions, null function is called.
+    */
+    inline void wizchip_spi_write_byte(uint8_t wb) {
+        //_spi.transfer(wb);
+    }
+
+    /**
+        Read a 1 byte value from a register.
+        @param address Register address
+        @return The value of register
+    */
+    uint8_t wizchip_read(uint8_t block, uint16_t address);
+
+    /**
+        Reads a 2 byte value from a register.
+        @param address Register address
+        @return The value of register
+    */
+    uint16_t wizchip_read_word(uint8_t block, uint16_t address);
+
+    /**
+        It reads sequence data from registers.
+        @param address Register address
+        @param pBuf Pointer buffer to read data
+        @param len Data length
+    */
+    void wizchip_read_buf(uint8_t block, uint16_t address, uint8_t* pBuf, uint16_t len);
+
+    /**
+        Write a 1 byte value to a register.
+        @param address Register address
+        @param wb Write data
+        @return void
+    */
+    void wizchip_write(uint8_t block, uint16_t address, uint8_t wb);
+
+    /**
+        Write a 2 byte value to a register.
+        @param address Register address
+        @param wb Write data
+        @return void
+    */
+    void wizchip_write_word(uint8_t block, uint16_t address, uint16_t word);
+
+    /**
+        It writes sequence data to registers.
+        @param address Register address
+        @param pBuf Pointer buffer to write data
+        @param len Data length
+    */
+    void wizchip_write_buf(uint8_t block, uint16_t address, const uint8_t* pBuf, uint16_t len);
+
+    /**
+        Get @ref Sn_TX_FSR register
+        @return uint16_t. Value of @ref Sn_TX_FSR.
+    */
+    uint16_t getSn_TX_FSR();
+
+    /**
+        Get @ref Sn_RX_RSR register
+        @return uint16_t. Value of @ref Sn_RX_RSR.
+    */
+    uint16_t getSn_RX_RSR();
+
+    /**
+        Reset WIZCHIP by softly.
+    */
+    bool wizchip_sw_reset();
+
+    /**
+        Get the link status of phy in WIZCHIP
+    */
+    int8_t wizphy_getphylink();
+
+    /**
+        Get the power mode of PHY in WIZCHIP
+    */
+    int8_t wizphy_getphypmode();
+
+    /**
+        Reset Phy
+    */
+    void wizphy_reset();
+
+    /**
+        set the power mode of phy inside WIZCHIP. Refer to @ref PHYCFGR in W5500, @ref PHYSTATUS in
+        W5200
+        @param pmode Setting value of power down mode.
+    */
+    int8_t wizphy_setphypmode(uint8_t pmode);
+
+    /**
+        It copies data to internal TX memory
+
+        @details This function reads the Tx write pointer register and after that,
+        it copies the <i>wizdata(pointer buffer)</i> of the length of <i>len(variable)</i> bytes to
+        internal TX memory and updates the Tx write pointer register. This function is being called
+        by send() and sendto() function also.
+
+        @param wizdata Pointer buffer to write data
+        @param len Data length
+        @sa wizchip_recv_data()
+    */
+    void wizchip_send_data(const uint8_t* wizdata, uint16_t len);
+
+    /**
+        It copies data to your buffer from internal RX memory
+
+        @details This function read the Rx read pointer register and after that,
+        it copies the received data from internal RX memory
+        to <i>wizdata(pointer variable)</i> of the length of <i>len(variable)</i> bytes.
+        This function is being called by recv() also.
+
+        @param wizdata Pointer buffer to read data
+        @param len Data length
+        @sa wizchip_send_data()
+    */
+    void wizchip_recv_data(uint8_t* wizdata, uint16_t len);
+
+    /**
+        It discard the received data in RX memory.
+        @details It discards the data of the length of <i>len(variable)</i> bytes in internal RX
+        memory.
+        @param len Data length
+    */
+    void wizchip_recv_ignore(uint16_t len);
+
+    /** Common registers */
+    enum {
+        MR       = 0x4000,  ///< Mode Register address (R/W)
+        SHAR     = 0x4120,  ///< Source MAC Register address (R/W)
+        INTLEVEL = 0x0013,  ///< Set Interrupt low level timer register address (R/W)
+        IR       = 0x2100,  ///< Interrupt Register (R/W)
+        _IMR_    = 0x2104,  ///< Interrupt mask register (R/W)
+        SIR      = 0x2101,  ///< Socket Interrupt Register (R/W)
+        _SIMR_   = 0x2114,  ///< Socket Interrupt Mask Register (R/W)
+        _RTR_    = 0x2101,  ///< Timeout register address (1 is 100us) (R/W)
+        _RCR_    = 0x4200,  ///< Retry count register (R/W)
+        UIPR     = 0x0000,  ///< Unreachable IP register address in UDP mode (R)
+        UPORTR   = 0x0000,  ///< Unreachable Port register address in UDP mode (R)
+        PHYCFGR  = 0x3000,  ///< PHY Status Register (R/W)
+        VERSIONR = 0x0000,  ///< Chip version register address (R)
+        NETLCKR  = 0x41F5,  ///< Network lock register
+        CHPLCKR  = 0x41F4,  ///< Chip lock register
+        PHYLCKR  = 0x41F6,  ///< PHY lock register
+        SYSR     = 0x2000,  ///< System status register
+        SYCR0    = 0x2004,  ///< System command register 0
+        SYCR1    = 0x2005,  ///< System command register 1
+    };
+
+    /** Socket registers */
+    enum {
+        Sn_MR         = 0x0000,  ///< Socket Mode register (R/W)
+        Sn_CR         = 0x0010,  ///< Socket command register (R/W)
+        Sn_IR         = 0x0020,  ///< Socket interrupt register (R)
+        Sn_ICLR       = 0x0028,  ///< Socket Interrupt clear register (W)
+        Sn_SR         = 0x0030,  ///< Socket status register (R)
+        Sn_PORT       = 0x0114,  ///< Source port register (R/W)
+        Sn_DHAR       = 0x0118,  ///< Peer MAC register address (R/W)
+        Sn_DIPR       = 0x0120,  ///< Peer IP register address (R/W)
+        Sn_DPORT      = 0x0140,  ///< Peer port register address (R/W)
+        Sn_MSSR       = 0x0110,  ///< Maximum Segment Size(Sn_MSSR0) register address (R/W)
+        Sn_TOS        = 0x0104,  ///< IP Type of Service(TOS) Register (R/W)
+        Sn_TTL        = 0x0108,  ///< IP Time to live(TTL) Register (R/W)
+        Sn_RXBUF_SIZE = 0x0220,  ///< Receive memory size register (R/W)
+        Sn_TXBUF_SIZE = 0x0200,  ///< Transmit memory size register (R/W)
+        Sn_TX_FSR     = 0x0204,  ///< Transmit free memory size register (R)
+        Sn_TX_RD      = 0x0208,  ///< Transmit memory read pointer register address (R)
+        Sn_TX_WR      = 0x020C,  ///< Transmit memory write pointer register address (R/W)
+        Sn_RX_RSR     = 0x0224,  ///< Received data size register (R)
+        Sn_RX_RD      = 0x0228,  ///< Read point of Receive memory (R/W)
+        Sn_RX_WR      = 0x022C,  ///< Write point of Receive memory (R)
+        Sn_IMR        = 0x0024,  ///< Socket interrupt mask register (R)
+        Sn_FRAG       = 0x002D,  ///< Fragment field value in IP header register (R/W)
+        Sn_KPALVTR    = 0x002F,  ///< Keep Alive Timer register (R/W)
+    };
+
+    /** Mode register values */
+    enum {
+        MR_RST   = 0x80,  ///< Reset
+        MR_WOL   = 0x20,  ///< Wake on LAN
+        MR_PB    = 0x10,  ///< Ping block
+        MR_PPPOE = 0x08,  ///< Enable PPPoE
+        MR_FARP  = 0x02,  ///< Enable UDP_FORCE_ARP CHECK
+    };
+
+    /* Interrupt Register values */
+    enum {
+        IR_CONFLICT = 0x80,  ///< Check IP conflict
+        IR_UNREACH  = 0x40,  ///< Get the destination unreachable message in UDP sending
+        IR_PPPoE    = 0x20,  ///< Get the PPPoE close message
+        IR_MP       = 0x10,  ///< Get the magic packet interrupt
+    };
+
+    /* Interrupt Mask Register values */
+    enum {
+        IM_IR7 = 0x80,  ///< IP Conflict Interrupt Mask
+        IM_IR6 = 0x40,  ///< Destination unreachable Interrupt Mask
+        IM_IR5 = 0x20,  ///< PPPoE Close Interrupt Mask
+        IM_IR4 = 0x10,  ///< Magic Packet Interrupt Mask
+    };
+
+    /** Socket Mode Register values @ref Sn_MR */
+    enum {
+        Sn_MR_CLOSE  = 0x00,  ///< Unused socket
+        Sn_MR_TCP    = 0x01,  ///< TCP
+        Sn_MR_UDP    = 0x02,  ///< UDP
+        Sn_MR_MACRAW = 0x07,  ///< MAC LAYER RAW SOCK
+        Sn_MR_UCASTB = 0x10,  ///< Unicast Block in UDP Multicasting
+        Sn_MR_ND     = 0x20,  ///< No Delayed Ack(TCP), Multicast flag
+        Sn_MR_BCASTB = 0x40,  ///< Broadcast block in UDP Multicasting
+        Sn_MR_MULTI  = 0x80,  ///< Support UDP Multicasting
+        Sn_MR_MIP6B  = 0x10,  ///< IPv6 packet Blocking in @ref Sn_MR_MACRAW mode
+        Sn_MR_MMB    = 0x20,  ///< Multicast Blocking in @ref Sn_MR_MACRAW mode
+        Sn_MR_MFEN   = 0x80,  ///< MAC filter enable in @ref Sn_MR_MACRAW mode
+    };
+
+    /** Socket Command Register values */
+    enum {
+        Sn_CR_OPEN      = 0x01,  ///< Initialise or open socket
+        Sn_CR_LISTEN    = 0x02,  ///< Wait connection request in TCP mode (Server mode)
+        Sn_CR_CONNECT   = 0x04,  ///< Send connection request in TCP mode (Client mode)
+        Sn_CR_DISCON    = 0x08,  ///< Send closing request in TCP mode
+        Sn_CR_CLOSE     = 0x10,  ///< Close socket
+        Sn_CR_SEND      = 0x20,  ///< Update TX buffer pointer and send data
+        Sn_CR_SEND_MAC  = 0x21,  ///< Send data with MAC address, so without ARP process
+        Sn_CR_SEND_KEEP = 0x22,  ///< Send keep alive message
+        Sn_CR_RECV      = 0x40,  ///< Update RX buffer pointer and receive data
+    };
+
+    /** Socket Interrupt register values */
+    enum {
+        Sn_IR_CON     = 0x01,  ///< CON Interrupt
+        Sn_IR_DISCON  = 0x02,  ///< DISCON Interrupt
+        Sn_IR_RECV    = 0x04,  ///< RECV Interrupt
+        Sn_IR_TIMEOUT = 0x08,  ///< TIMEOUT Interrupt
+        Sn_IR_SENDOK  = 0x10,  ///< SEND_OK Interrupt
+    };
+
+    /** Socket Status Register values */
+    enum {
+        SOCK_CLOSED      = 0x00,  ///< Closed
+        SOCK_INIT        = 0x13,  ///< Initiate state
+        SOCK_LISTEN      = 0x14,  ///< Listen state
+        SOCK_SYNSENT     = 0x15,  ///< Connection state
+        SOCK_SYNRECV     = 0x16,  ///< Connection state
+        SOCK_ESTABLISHED = 0x17,  ///< Success to connect
+        SOCK_FIN_WAIT    = 0x18,  ///< Closing state
+        SOCK_CLOSING     = 0x1A,  ///< Closing state
+        SOCK_TIME_WAIT   = 0x1B,  ///< Closing state
+        SOCK_CLOSE_WAIT  = 0x1C,  ///< Closing state
+        SOCK_LAST_ACK    = 0x1D,  ///< Closing state
+        SOCK_UDP         = 0x22,  ///< UDP socket
+        SOCK_MACRAW      = 0x42,  ///< MAC raw mode socket
+    };
+
+    /* PHYCFGR register value */
+    enum {
+        PHYCFGR_RST         = ~(1 << 7),  //< For PHY reset, must operate AND mask.
+        PHYCFGR_OPMD        = (1 << 6),   // Configure PHY with OPMDC value
+        PHYCFGR_OPMDC_ALLA  = (7 << 3),
+        PHYCFGR_OPMDC_PDOWN = (6 << 3),
+        PHYCFGR_OPMDC_NA    = (5 << 3),
+        PHYCFGR_OPMDC_100FA = (4 << 3),
+        PHYCFGR_OPMDC_100F  = (3 << 3),
+        PHYCFGR_OPMDC_100H  = (2 << 3),
+        PHYCFGR_OPMDC_10F   = (1 << 3),
+        PHYCFGR_OPMDC_10H   = (0 << 3),
+        PHYCFGR_DPX_FULL    = (1 << 2),
+        PHYCFGR_DPX_HALF    = (0 << 2),
+        PHYCFGR_SPD_100     = (1 << 1),
+        PHYCFGR_SPD_10      = (0 << 1),
+        PHYCFGR_LNK_ON      = (1 << 0),
+        PHYCFGR_LNK_OFF     = (0 << 0),
+    };
+
+    /* Lock register commands */
+    enum {
+        CHPLCKR_UNLOCK      = 0xCE,
+        NETLCKR_UNLOCK      = 0x3A,
+        PHYLCKR_UNLOCK      = 0x53,
+    };
+
+    /* SYS Lock register commands */
+    enum {
+        SYSR_CHPL_LOCK      = (1 << 7),
+        SYSR_CHPL_ULOCK     = (0 << 7),
+    };
+
+    /* SYS1 register commands */
+    enum {
+        SYCR1_IEN           = 0x80,
+    };
+
+    /* Socket Interrupt Mask register */
+    enum {
+        SIMR_S7_INT         = 0x80,
+        SIMR_S6_INT         = 0x40,
+        SIMR_S5_INT         = 0x20,
+        SIMR_S4_INT         = 0x10,
+        SIMR_S3_INT         = 0x08,
+        SIMR_S2_INT         = 0x04,
+        SIMR_S1_INT         = 0x02,
+        SIMR_S0_INT         = 0x01,
+    };
+
+    /* Sn_IR Clear register */
+    enum {
+        Sn_IRCLR_SENDOK     = 0x10,
+        Sn_IRCLR_TIMEOUT    = 0x08,
+        Sn_IRCLR_RECV       = 0x04,
+        Sn_IRCLR_DISCON     = 0x02,
+        Sn_IRCLR_CON        = 0x01,
+    };
+
+    /* Socket n Interrupt Mask register */
+    enum {
+        Sn_IMR_SENDOK       = 0x10,
+        Sn_IMR_TIMEOUT      = 0x08,
+        Sn_IMR_RECV         = 0x04,
+        Sn_IMR_DISCON       = 0x02,
+        Sn_IMR_CON          = 0x01,
+    };
+
+    enum {
+        PHY_SPEED_10    = 0,  ///< Link Speed 10
+        PHY_SPEED_100   = 1,  ///< Link Speed 100
+        PHY_DUPLEX_HALF = 0,  ///< Link Half-Duplex
+        PHY_DUPLEX_FULL = 1,  ///< Link Full-Duplex
+        PHY_LINK_OFF    = 0,  ///< Link Off
+        PHY_LINK_ON     = 1,  ///< Link On
+        PHY_POWER_NORM  = 0,  ///< PHY power normal mode
+        PHY_POWER_DOWN  = 1,  ///< PHY power down mode
+    };
+
+    /**
+        Set Mode Register
+        @param (uint8_t)mr The value to be set.
+        @sa getMR()
+    */
+    inline void setMR(uint8_t mode) {
+        wizchip_write(BlockSelectCReg, MR, mode);
+    }
+
+    /**
+        Get Mode Register
+        @return uint8_t. The value of Mode register.
+        @sa setMR()
+    */
+    inline uint8_t getMR() {
+        return wizchip_read(BlockSelectCReg, MR);
+    }
+
+    /**
+        Reads the W6300 system status register
+        @return uint8_t
+    */
+    inline uint8_t getStatus() {
+        return wizchip_read(BlockSelectCReg, SYSR);
+    }
+
+    /**
+        Writes a W6300 command
+    */
+    inline void setCommand0(uint8_t cmd) {
+        wizchip_write(BlockSelectCReg, SYCR0, cmd);
+    }
+
+    /**
+        Writes a W6300 command
+    */
+    inline void setCommand1(uint8_t cmd) {
+        wizchip_write(BlockSelectCReg, SYCR1, cmd);
+    }
+
+    /**
+        Set local MAC address
+        @param (uint8_t*)shar Pointer variable to set local MAC address. It should be allocated 6
+        bytes.
+        @sa getSHAR()
+    */
+    inline void setSHAR(const uint8_t* macaddr) {
+        wizchip_write_buf(BlockSelectCReg, SHAR, macaddr, 6);
+    }
+
+    /**
+        Get local MAC address
+        @param (uint8_t*)shar Pointer variable to get local MAC address. It should be allocated 6
+        bytes.
+        @sa setSHAR()
+    */
+    inline void getSHAR(uint8_t* macaddr) {
+        wizchip_read_buf(BlockSelectCReg, SHAR, macaddr, 6);
+    }
+
+    /**
+        Set @ref IR register
+        @param (uint8_t)ir Value to set @ref IR register.
+        @sa getIR()
+    */
+    inline void setIR(uint8_t ir) {
+        wizchip_write(BlockSelectCReg, IR, (ir & 0xF0));
+    }
+
+    /**
+        Get @ref IR register
+        @return uint8_t. Value of @ref IR register.
+        @sa setIR()
+    */
+    inline uint8_t getIR() {
+        return wizchip_read(BlockSelectCReg, IR) & 0xF0;
+    }
+
+    /**
+        Set @ref SIR register
+        @param (uint8_t)ir Value to set @ref SIR register.
+        @sa getSIR()
+    */
+    inline void setSIR(uint8_t ir) {
+        wizchip_write(BlockSelectCReg, SIR, ir);
+    }
+
+    /**
+        Get @ref SIR register
+        @return uint8_t. Value of @ref SIR register.
+        @sa setSIR()
+    */
+    inline uint8_t getSIR() {
+        return wizchip_read(BlockSelectCReg, SIR);
+    }
+
+    /**
+        Set @ref _IMR_ register
+        @param (uint8_t)imr Value to set @ref _IMR_ register.
+        @sa getIMR()
+    */
+    inline void setIMR(uint8_t imr) {
+        wizchip_write(BlockSelectCReg, _IMR_, imr);
+    }
+
+    /**
+        Get @ref _IMR_ register
+        @return uint8_t. Value of @ref _IMR_ register.
+        @sa setIMR()
+    */
+    inline uint8_t getIMR() {
+        return wizchip_read(BlockSelectCReg, _IMR_);
+    }
+
+    /**
+        Set @ref _SIMR_ register
+        @param (uint8_t)imr Value to set @ref _SIMR_ register.
+        @sa getIMR()
+    */
+    inline void setSIMR(uint8_t imr) {
+        wizchip_write(BlockSelectCReg, _SIMR_, imr);
+    }
+
+    /**
+        Set @ref _SIMR_ register
+        @param (uint8_t)imr Value to set @ref _SIMR_ register.
+        @sa getIMR()
+    */
+    inline void setICLR(uint8_t imr) {
+        wizchip_write(BlockSelectSReg, Sn_ICLR, imr);
+    }
+
+    /**
+        Get @ref _SIMR_ register
+        @return uint8_t. Value of @ref _SIMR_ register.
+        @sa setSIMR()
+    */
+    inline uint8_t getSIMR() {
+        return wizchip_read(BlockSelectCReg, _SIMR_);
+    }
+
+    /**
+        Set @ref PHYCFGR register
+        @param (uint8_t)phycfgr Value to set @ref PHYCFGR register.
+        @sa getPHYCFGR()
+    */
+    inline void setPHYCFGR(uint8_t phycfgr) {
+        wizchip_write(BlockSelectCReg, PHYCFGR, phycfgr);
+    }
+
+    /**
+        Get @ref PHYCFGR register
+        @return uint8_t. Value of @ref PHYCFGR register.
+        @sa setPHYCFGR()
+    */
+    inline uint8_t getPHYCFGR() {
+        return wizchip_read(BlockSelectCReg, PHYCFGR);
+    }
+
+    /**
+        Sets the chip lock to
+        @param state
+    */
+    inline void setChipLOCK(uint8_t state) {
+        wizchip_write(BlockSelectCReg, CHPLCKR, state);
+    }
+
+    /**
+        Sets the PHY lock to
+        @param state
+    */
+    inline void setPHYLOCK(uint8_t state) {
+        wizchip_write(BlockSelectCReg, PHYLCKR, state);
+    }
+    /**
+        Sets the network lock to
+        @param state
+    */
+    inline void setNetLOCK(uint8_t state) {
+        wizchip_write(BlockSelectCReg, NETLCKR, state);
+    }
+
+    /**
+        Get @ref VERSIONR register
+        @return uint8_t. Value of @ref VERSIONR register.
+    */
+    inline uint8_t getVERSIONR() {
+        return wizchip_read(BlockSelectCReg, VERSIONR);
+    }
+
+    /**
+        Set @ref Sn_MR register
+        @param (uint8_t)mr Value to set @ref Sn_MR
+        @sa getSn_MR()
+    */
+    inline void setSn_MR(uint8_t mr) {
+        wizchip_write(BlockSelectSReg, Sn_MR, mr);
+    }
+
+    /**
+        Get @ref Sn_MR register
+        @return uint8_t. Value of @ref Sn_MR.
+        @sa setSn_MR()
+    */
+    inline uint8_t getSn_MR() {
+        return wizchip_read(BlockSelectSReg, Sn_MR);
+    }
+
+    /**
+        Set @ref Sn_CR register, then wait for the command to execute
+        @param (uint8_t)cr Value to set @ref Sn_CR
+        @sa getSn_CR()
+    */
+    void setSn_CR(uint8_t cr);
+
+    /**
+        Get @ref Sn_CR register
+        @return uint8_t. Value of @ref Sn_CR.
+        @sa setSn_CR()
+    */
+    inline uint8_t getSn_CR() {
+        return wizchip_read(BlockSelectSReg, Sn_CR);
+    }
+
+    /**
+        Set @ref Sn_IR register
+        @param (uint8_t)ir Value to set @ref Sn_IR
+        @sa getSn_IR()
+    */
+    inline void setSn_IR(uint8_t ir) {
+        wizchip_write(BlockSelectSReg, Sn_IR, (ir & 0x1F));
+    }
+
+    /**
+        Get @ref Sn_IR register
+        @return uint8_t. Value of @ref Sn_IR.
+        @sa setSn_IR()
+    */
+    inline uint8_t getSn_IR() {
+        return (wizchip_read(BlockSelectSReg, Sn_IR) & 0x1F);
+    }
+
+    /**
+        Set @ref Sn_IMR register
+        @param (uint8_t)imr Value to set @ref Sn_IMR
+        @sa getSn_IMR()
+    */
+    inline void setSn_IMR(uint8_t imr) {
+        wizchip_write(BlockSelectSReg, Sn_IMR, (imr & 0x1F));
+    }
+
+    /**
+        Get @ref Sn_IMR register
+        @return uint8_t. Value of @ref Sn_IMR.
+        @sa setSn_IMR()
+    */
+    inline uint8_t getSn_IMR() {
+        return (wizchip_read(BlockSelectSReg, Sn_IMR) & 0x1F);
+    }
+
+    /**
+        Get @ref Sn_SR register
+        @return uint8_t. Value of @ref Sn_SR.
+    */
+    inline uint8_t getSn_SR() {
+        return wizchip_read(BlockSelectSReg, Sn_SR);
+    }
+
+    /**
+        Set @ref Sn_RXBUF_SIZE register
+        @param (uint8_t)rxbufsize Value to set @ref Sn_RXBUF_SIZE
+        @sa getSn_RXBUF_SIZE()
+    */
+    inline void setSn_RXBUF_SIZE(uint8_t rxbufsize) {
+        // W6300 DEBUG: rxbufsize = 16
+        // W6300 DEBUG: original code:
+        /*   static inline uint8_t writeSn(SOCKET s=0, uint16_t addr, uint8_t data=16) {
+            return write(CH_BASE() + s * CH_SIZE + addr, data);
+        */
+        wizchip_write(BlockSelectSReg, Sn_RXBUF_SIZE, rxbufsize);
+    }
+
+    /**
+        Get @ref Sn_RXBUF_SIZE register
+        @return uint8_t. Value of @ref Sn_RXBUF_SIZE.
+        @sa setSn_RXBUF_SIZE()
+    */
+    inline uint8_t getSn_RXBUF_SIZE() {
+        return wizchip_read(BlockSelectSReg, Sn_RXBUF_SIZE);
+    }
+
+    /**
+        Set @ref Sn_TXBUF_SIZE register
+        @param (uint8_t)txbufsize Value to set @ref Sn_TXBUF_SIZE
+        @sa getSn_TXBUF_SIZE()
+    */
+    inline void setSn_TXBUF_SIZE(uint8_t txbufsize) {
+        wizchip_write(BlockSelectSReg, Sn_TXBUF_SIZE, txbufsize);
+    }
+
+    /**
+        Get @ref Sn_TXBUF_SIZE register
+        @return uint8_t. Value of @ref Sn_TXBUF_SIZE.
+        @sa setSn_TXBUF_SIZE()
+    */
+    inline uint8_t getSn_TXBUF_SIZE() {
+        return wizchip_read(BlockSelectSReg, Sn_TXBUF_SIZE);
+    }
+
+    /**
+        Get @ref Sn_TX_RD register
+        @return uint16_t. Value of @ref Sn_TX_RD.
+    */
+    inline uint16_t getSn_TX_RD() {
+        return wizchip_read_word(BlockSelectSReg, Sn_TX_RD);
+    }
+
+    /**
+        Set @ref Sn_TX_WR register
+        @param (uint16_t)txwr Value to set @ref Sn_TX_WR
+        @sa GetSn_TX_WR()
+    */
+    inline void setSn_TX_WR(uint16_t txwr) {
+        wizchip_write_word(BlockSelectSReg, Sn_TX_WR, txwr);
+    }
+
+    /**
+        Get @ref Sn_TX_WR register
+        @return uint16_t. Value of @ref Sn_TX_WR.
+        @sa setSn_TX_WR()
+    */
+    inline uint16_t getSn_TX_WR() {
+        return wizchip_read_word(BlockSelectSReg, Sn_TX_WR);
+    }
+
+    /**
+        Set @ref Sn_RX_RD register
+        @param (uint16_t)rxrd Value to set @ref Sn_RX_RD
+        @sa getSn_RX_RD()
+    */
+    inline void setSn_RX_RD(uint16_t rxrd) {
+        wizchip_write_word(BlockSelectSReg, Sn_RX_RD, rxrd);
+    }
+
+    /**
+        Get @ref Sn_RX_RD register
+        @return uint16_t. Value of @ref Sn_RX_RD.
+        @sa setSn_RX_RD()
+    */
+    inline uint16_t getSn_RX_RD() {
+        return wizchip_read_word(BlockSelectSReg, Sn_RX_RD);
+    }
+
+    /**
+        Get @ref Sn_RX_WR register
+        @return uint16_t. Value of @ref Sn_RX_WR.
+    */
+    inline uint16_t getSn_RX_WR() {
+        return wizchip_read_word(BlockSelectSReg, Sn_RX_WR);
+    }
+
+    netif *_netif;
+};
+
+#endif  // W6300_H
@@ -0,0 +1,400 @@
+/*
+    Copyright (c) 2023 Raspberry Pi (Trading) Ltd.
+
+    SPDX-License-Identifier: BSD-3-Clause
+*/
+
+#include <stdio.h>
+#include <string.h>
+
+#include "pico/stdlib.h"
+#include "pico/error.h"
+
+#include "hardware/dma.h"
+#include "hardware/clocks.h"
+
+#include "wiznet_pio_qspi.h"
+#include "wiznet_pio_qspi.pio.h"
+
+#ifndef PIO_QSPI_PREFERRED_PIO
+#define PIO_QSPI_PREFERRED_PIO 1
+#endif
+
+#define PADS_DRIVE_STRENGTH PADS_BANK0_GPIO0_DRIVE_VALUE_12MA
+#define IRQ_SAMPLE_DELAY_NS 100
+
+#define WIZNET_PIO_QSPI_PROGRAM_NAME wizchip_pio_spi_quad_write_read
+#define WIZNET_PIO_QSPI_PROGRAM_FUNC __CONCAT(WIZNET_PIO_QSPI_PROGRAM_NAME, _program)
+#define WIZNET_PIO_QSPI_PROGRAM_GET_DEFAULT_CONFIG_FUNC __CONCAT(WIZNET_PIO_QSPI_PROGRAM_NAME, _program_get_default_config)
+#define WIZNET_PIO_QSPI_OFFSET_WRITE_BITS __CONCAT(WIZNET_PIO_QSPI_PROGRAM_NAME, _offset_write_bits)
+#define WIZNET_PIO_QSPI_OFFSET_WRITE_BITS_END __CONCAT(WIZNET_PIO_QSPI_PROGRAM_NAME, _offset_write_bits_end)
+#define WIZNET_PIO_QSPI_OFFSET_READ_END __CONCAT(WIZNET_PIO_QSPI_PROGRAM_NAME, _offset_read_bits_end)
+
+// All wiznet spi operations must start with writing a 3 byte header
+#define WIZNET_PIO_QSPI_HEADER_LEN 3
+
+#ifndef WIZNET_PICO_PIO_QSPI_INSTANCE_COUNT
+#define WIZNET_PICO_PIO_QSPI_INSTANCE_COUNT 1
+#endif
+
+typedef struct wiznet_pio_qspi_state {
+    wiznet_pio_qspi_funcs_t *funcs;
+    const wiznet_pio_qspi_config_t *qspi_config;
+    pio_hw_t *pio;
+    uint8_t pio_func_sel;
+    int8_t pio_offset;
+    int8_t pio_sm;
+    int8_t dma_out;
+    int8_t dma_in;
+    uint8_t qspi_header[WIZNET_PIO_QSPI_HEADER_LEN];
+    uint8_t qspi_header_count;
+} wiznet_pio_qspi_state_t;
+
+static wiznet_pio_qspi_state_t wiznet_pio_qspi_state[WIZNET_PICO_PIO_QSPI_INSTANCE_COUNT];
+static wiznet_pio_qspi_state_t *active_state;
+
+static wiznet_pio_qspi_funcs_t *get_wiznet_pio_qspi_impl(void);
+
+static uint16_t mk_cmd_buf(uint8_t *pdst, uint8_t opcode, uint16_t addr) {
+    pdst[0] = ((opcode >> 7 & 0x01) << 4) | ((opcode >> 6 & 0x01) << 0);
+    pdst[1] = ((opcode >> 5 & 0x01) << 4) | ((opcode >> 4 & 0x01) << 0);
+    pdst[2] = ((opcode >> 3 & 0x01) << 4) | ((opcode >> 2 & 0x01) << 0);
+    pdst[3] = ((opcode >> 1 & 0x01) << 4) | ((opcode >> 0 & 0x01) << 0);
+
+    pdst[4] = ((uint8_t)(addr >> 8) & 0xFF);
+    pdst[5] = ((uint8_t)(addr >> 0) & 0xFF);
+
+    pdst[6] = 0;
+
+    return 6 + 1;
+}
+
+// Initialise our gpios
+static void pio_qspi_gpio_setup(wiznet_pio_qspi_state_t *state) {
+    // Setup DO and DI
+    gpio_init(state->qspi_config->data_io0_pin);
+    gpio_init(state->qspi_config->data_io1_pin);
+    gpio_init(state->qspi_config->data_io2_pin);
+    gpio_init(state->qspi_config->data_io3_pin);
+    gpio_set_dir(state->qspi_config->data_io0_pin, GPIO_OUT);
+    gpio_set_dir(state->qspi_config->data_io1_pin, GPIO_OUT);
+    gpio_set_dir(state->qspi_config->data_io2_pin, GPIO_OUT);
+    gpio_set_dir(state->qspi_config->data_io3_pin, GPIO_OUT);
+    gpio_put(state->qspi_config->data_io0_pin, false);
+    gpio_put(state->qspi_config->data_io1_pin, false);
+    gpio_put(state->qspi_config->data_io2_pin, false);
+    gpio_put(state->qspi_config->data_io3_pin, false);
+
+    // Setup CS
+    gpio_init(state->qspi_config->cs_pin);
+    gpio_set_dir(state->qspi_config->cs_pin, GPIO_OUT);
+    gpio_put(state->qspi_config->cs_pin, true);
+
+    // Setup reset
+    gpio_init(state->qspi_config->irq_pin);
+    gpio_set_dir(state->qspi_config->irq_pin, GPIO_IN);
+    gpio_set_pulls(state->qspi_config->irq_pin, false, false);
+}
+
+wiznet_pio_qspi_handle_t wiznet_pio_qspi_open(const wiznet_pio_qspi_config_t *qspi_config) {
+
+    wiznet_pio_qspi_state_t *state;
+    for (unsigned int i = 0; i < count_of(wiznet_pio_qspi_state); i++) {
+        if (!wiznet_pio_qspi_state[i].funcs) {
+            state = &wiznet_pio_qspi_state[i];
+            break;
+        }
+    }
+    assert(state);
+    if (!state) {
+        return NULL;
+    }
+    state->qspi_config = qspi_config;
+    state->funcs = get_wiznet_pio_qspi_impl();
+
+    pio_qspi_gpio_setup(state);
+
+    pio_hw_t *pios[2] = {pio0, pio1};
+    uint pio_index = PIO_QSPI_PREFERRED_PIO;
+
+    if (!pio_can_add_program(pios[pio_index], &WIZNET_PIO_QSPI_PROGRAM_FUNC)) {
+        pio_index ^= 1;
+        if (!pio_can_add_program(pios[pio_index], &WIZNET_PIO_QSPI_PROGRAM_FUNC)) {
+            return NULL;
+        }
+    }
+
+    state->pio = pios[pio_index];
+    state->dma_in = -1;
+    state->dma_out = -1;
+
+    static_assert(GPIO_FUNC_PIO1 == GPIO_FUNC_PIO0 + 1, "");
+    state->pio_func_sel = GPIO_FUNC_PIO0 + pio_index;
+    state->pio_sm = (int8_t)pio_claim_unused_sm(state->pio, false);
+    if (state->pio_sm < 0) {
+        wiznet_pio_qspi_close(&state->funcs);
+        return NULL;
+    }
+
+    state->pio_offset = pio_add_program(state->pio, &WIZNET_PIO_QSPI_PROGRAM_FUNC);
+    printf("[QSPI CLOCK SPEED : %.2lf MHz]\r\n\r\n", 66.5 / (state->qspi_config->clock_div_major + ((double)state->qspi_config->clock_div_minor / 256)));
+    pio_sm_config sm_config = WIZNET_PIO_QSPI_PROGRAM_GET_DEFAULT_CONFIG_FUNC(state->pio_offset);
+
+    sm_config_set_clkdiv_int_frac(&sm_config, state->qspi_config->clock_div_major, state->qspi_config->clock_div_minor);
+    hw_write_masked(&pads_bank0_hw->io[state->qspi_config->clock_pin],
+                    (uint)PADS_DRIVE_STRENGTH << PADS_BANK0_GPIO0_DRIVE_LSB,
+                    PADS_BANK0_GPIO0_DRIVE_BITS
+                   );
+    hw_write_masked(&pads_bank0_hw->io[state->qspi_config->clock_pin],
+                    (uint)1 << PADS_BANK0_GPIO0_SLEWFAST_LSB,
+                    PADS_BANK0_GPIO0_SLEWFAST_BITS
+                   );
+
+    printf("\r\n[QSPI QUAD MODE]\r\n");
+    sm_config_set_out_pins(&sm_config, state->qspi_config->data_io0_pin, 4);
+    sm_config_set_in_pins(&sm_config, state->qspi_config->data_io0_pin);
+    sm_config_set_set_pins(&sm_config, state->qspi_config->data_io0_pin, 4);
+    sm_config_set_sideset(&sm_config, 1, false, false);
+    sm_config_set_sideset_pins(&sm_config, state->qspi_config->clock_pin);
+
+    sm_config_set_in_shift(&sm_config, false, true, 8);
+    sm_config_set_out_shift(&sm_config, false, true, 8);
+
+    hw_set_bits(&state->pio->input_sync_bypass,
+                (1u << state->qspi_config->data_io0_pin) | (1u << state->qspi_config->data_io1_pin) | (1u << state->qspi_config->data_io2_pin) | (1u << state->qspi_config->data_io3_pin));
+    pio_sm_set_config(state->pio, state->pio_sm, &sm_config);
+    pio_sm_set_consecutive_pindirs(state->pio, state->pio_sm, state->qspi_config->clock_pin, 1, true);
+
+    gpio_set_function(state->qspi_config->data_io0_pin, state->pio_func_sel);
+    gpio_set_function(state->qspi_config->data_io1_pin, state->pio_func_sel);
+    gpio_set_function(state->qspi_config->data_io2_pin, state->pio_func_sel);
+    gpio_set_function(state->qspi_config->data_io3_pin, state->pio_func_sel);
+
+    // Set data pin to pull down and schmitt
+    gpio_set_pulls(state->qspi_config->data_io0_pin, false, true);
+    gpio_set_pulls(state->qspi_config->data_io1_pin, false, true);
+    gpio_set_pulls(state->qspi_config->data_io2_pin, false, true);
+    gpio_set_pulls(state->qspi_config->data_io3_pin, false, true);
+    gpio_set_input_hysteresis_enabled(state->qspi_config->data_io0_pin, true);
+    gpio_set_input_hysteresis_enabled(state->qspi_config->data_io1_pin, true);
+    gpio_set_input_hysteresis_enabled(state->qspi_config->data_io2_pin, true);
+    gpio_set_input_hysteresis_enabled(state->qspi_config->data_io3_pin, true);
+    /* @todo: Implement to use. */
+
+    pio_sm_exec(state->pio, state->pio_sm, pio_encode_set(pio_pins, 1));
+
+    state->dma_out = (int8_t)dma_claim_unused_channel(false); // todo: Should be able to use one dma channel?
+    state->dma_in = (int8_t)dma_claim_unused_channel(false);
+    if (state->dma_out < 0 || state->dma_in < 0) {
+        wiznet_pio_qspi_close(&state->funcs);
+        return NULL;
+    }
+
+    return &state->funcs;
+
+}
+
+void wiznet_pio_qspi_close(wiznet_pio_qspi_handle_t handle) {
+
+    wiznet_pio_qspi_state_t *state = (wiznet_pio_qspi_state_t *)handle;
+    if (state) {
+        if (state->pio_sm >= 0) {
+            if (state->pio_offset != -1) {
+                pio_remove_program(state->pio, &WIZNET_PIO_QSPI_PROGRAM_FUNC, state->pio_offset);
+            }
+
+            pio_sm_unclaim(state->pio, state->pio_sm);
+        }
+        if (state->dma_out >= 0) {
+            dma_channel_unclaim(state->dma_out);
+            state->dma_out = -1;
+        }
+        if (state->dma_in >= 0) {
+            dma_channel_unclaim(state->dma_in);
+            state->dma_in = -1;
+        }
+        state->funcs = NULL;
+    }
+}
+
+static void cs_set(wiznet_pio_qspi_state_t *state, bool value) {
+    gpio_put(state->qspi_config->cs_pin, value);
+}
+
+static __noinline void ns_delay(uint32_t ns) {
+    // cycles = ns * clk_sys_hz / 1,000,000,000
+    uint32_t cycles = ns * (clock_get_hz(clk_sys) >> 16u) / (1000000000u >> 16u);
+    busy_wait_at_least_cycles(cycles);
+}
+
+void wiznet_pio_qspi_frame_start(void) {
+    assert(active_state);
+
+    gpio_set_function(active_state->qspi_config->data_io0_pin, active_state->pio_func_sel);
+    gpio_set_function(active_state->qspi_config->data_io1_pin, active_state->pio_func_sel);
+    gpio_set_function(active_state->qspi_config->data_io2_pin, active_state->pio_func_sel);
+    gpio_set_function(active_state->qspi_config->data_io3_pin, active_state->pio_func_sel);
+
+    gpio_set_function(active_state->qspi_config->clock_pin, active_state->pio_func_sel);
+    gpio_pull_down(active_state->qspi_config->clock_pin);
+
+    // Pull CS low
+    cs_set(active_state, false);
+}
+
+void wiznet_pio_qspi_frame_end(void) {
+    assert(active_state);
+    // from this point a positive edge will cause an IRQ to be pending
+    cs_set(active_state, true);
+    // we need to wait a bit in case the irq line is incorrectly high
+#ifdef IRQ_SAMPLE_DELAY_NS
+    ns_delay(IRQ_SAMPLE_DELAY_NS);
+#endif
+}
+
+// To read a byte we must first have been asked to write a 3 byte spi header
+void wiznet_pio_qspi_read_byte(uint8_t op_code, uint16_t AddrSel, uint8_t *rx, uint16_t rx_length) {
+    uint8_t command_buf[8] = {0,};
+    uint16_t command_len = mk_cmd_buf(command_buf, op_code, AddrSel);
+    uint32_t loop_cnt = 0;
+
+    pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
+    pio_sm_set_wrap(active_state->pio, active_state->pio_sm, active_state->pio_offset, active_state->pio_offset + WIZNET_PIO_QSPI_OFFSET_READ_END - 1);
+    //pio_sm_set_wrap(active_state->pio, active_state->pio_sm, active_state->pio_offset + PIO_SPI_OFFSET_WRITE_BITS, active_state->pio_offset + PIO_SPI_OFFSET_READ_BITS_END - 1);
+    pio_sm_clear_fifos(active_state->pio, active_state->pio_sm);
+
+    loop_cnt = 2;
+    pio_sm_set_pindirs_with_mask(active_state->pio,
+                                 active_state->pio_sm,
+                                 (1u << active_state->qspi_config->data_io0_pin) | (1u << active_state->qspi_config->data_io1_pin) | (1u << active_state->qspi_config->data_io2_pin) | (1u << active_state->qspi_config->data_io3_pin),
+                                 (1u << active_state->qspi_config->data_io0_pin) | (1u << active_state->qspi_config->data_io1_pin) | (1u << active_state->qspi_config->data_io2_pin) | (1u << active_state->qspi_config->data_io3_pin));
+
+    /* @todo: Implement to use. */
+
+    pio_sm_restart(active_state->pio, active_state->pio_sm);
+    pio_sm_clkdiv_restart(active_state->pio, active_state->pio_sm);
+
+    pio_sm_put(active_state->pio, active_state->pio_sm, command_len * loop_cnt - 1);
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_out(pio_x, 32));
+
+    pio_sm_put(active_state->pio, active_state->pio_sm, rx_length - 1);
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_out(pio_y, 32));
+
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_jmp(active_state->pio_offset));
+
+    dma_channel_abort(active_state->dma_out);
+    dma_channel_abort(active_state->dma_in);
+
+    dma_channel_config out_config = dma_channel_get_default_config(active_state->dma_out);
+    channel_config_set_transfer_data_size(&out_config, DMA_SIZE_8);
+    channel_config_set_bswap(&out_config, true);
+    channel_config_set_dreq(&out_config, pio_get_dreq(active_state->pio, active_state->pio_sm, true));
+    dma_channel_configure(active_state->dma_out, &out_config, &active_state->pio->txf[active_state->pio_sm], command_buf, command_len, true);
+
+    dma_channel_config in_config = dma_channel_get_default_config(active_state->dma_in);
+    channel_config_set_transfer_data_size(&in_config, DMA_SIZE_8);
+    channel_config_set_bswap(&in_config, true);
+    channel_config_set_dreq(&in_config, pio_get_dreq(active_state->pio, active_state->pio_sm, false));
+    channel_config_set_write_increment(&in_config, true);
+    channel_config_set_read_increment(&in_config, false);
+    dma_channel_configure(active_state->dma_in, &in_config, rx, &active_state->pio->rxf[active_state->pio_sm], rx_length, true);
+
+#if 1
+    pio_sm_set_enabled(active_state->pio, active_state->pio_sm, true);
+
+    __compiler_memory_barrier();
+
+    dma_channel_wait_for_finish_blocking(active_state->dma_out);
+    dma_channel_wait_for_finish_blocking(active_state->dma_in);
+
+    __compiler_memory_barrier();
+
+    pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_mov(pio_pins, pio_null));
+
+#endif
+}
+
+void wiznet_pio_qspi_write_byte(uint8_t op_code, uint16_t AddrSel, uint8_t *tx, uint16_t tx_length) {
+    uint8_t command_buf[8] = {0,};
+    uint16_t command_len = mk_cmd_buf(command_buf, op_code, AddrSel);
+    uint32_t loop_cnt = 0;
+    tx_length = tx_length + command_len;
+
+    pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
+    pio_sm_set_wrap(active_state->pio, active_state->pio_sm, active_state->pio_offset, active_state->pio_offset + WIZNET_PIO_QSPI_OFFSET_WRITE_BITS_END - 1);
+    pio_sm_clear_fifos(active_state->pio, active_state->pio_sm);
+
+    loop_cnt = 2;
+    pio_sm_set_pindirs_with_mask(active_state->pio,
+                                 active_state->pio_sm,
+                                 (1u << active_state->qspi_config->data_io0_pin) | (1u << active_state->qspi_config->data_io1_pin) | (1u << active_state->qspi_config->data_io2_pin) | (1u << active_state->qspi_config->data_io3_pin),
+                                 (1u << active_state->qspi_config->data_io0_pin) | (1u << active_state->qspi_config->data_io1_pin) | (1u << active_state->qspi_config->data_io2_pin) | (1u << active_state->qspi_config->data_io3_pin));
+
+    pio_sm_restart(active_state->pio, active_state->pio_sm);
+    pio_sm_clkdiv_restart(active_state->pio, active_state->pio_sm);
+    pio_sm_put(active_state->pio, active_state->pio_sm, tx_length * loop_cnt - 1);
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_out(pio_x, 32));
+    pio_sm_put(active_state->pio, active_state->pio_sm, 0);
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_out(pio_y, 32));
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_jmp(active_state->pio_offset));
+    dma_channel_abort(active_state->dma_out);
+
+
+    dma_channel_config out_config = dma_channel_get_default_config(active_state->dma_out);
+    channel_config_set_transfer_data_size(&out_config, DMA_SIZE_8);
+    channel_config_set_bswap(&out_config, true);
+    channel_config_set_dreq(&out_config, pio_get_dreq(active_state->pio, active_state->pio_sm, true));
+
+    pio_sm_set_enabled(active_state->pio, active_state->pio_sm, true);
+
+    dma_channel_configure(active_state->dma_out, &out_config, &active_state->pio->txf[active_state->pio_sm], command_buf, command_len, true);
+    dma_channel_wait_for_finish_blocking(active_state->dma_out);
+    dma_channel_configure(active_state->dma_out, &out_config, &active_state->pio->txf[active_state->pio_sm], tx, tx_length - command_len, true);
+    dma_channel_wait_for_finish_blocking(active_state->dma_out);
+
+    const uint32_t fdebug_tx_stall = 1u << (PIO_FDEBUG_TXSTALL_LSB + active_state->pio_sm);
+    active_state->pio->fdebug = fdebug_tx_stall;
+    // pio_sm_set_enabled(active_state->pio, active_state->pio_sm, true);
+    while (!(active_state->pio->fdebug & fdebug_tx_stall)) {
+        tight_loop_contents(); // todo timeout
+    }
+    __compiler_memory_barrier();
+    pio_sm_set_consecutive_pindirs(active_state->pio, active_state->pio_sm, active_state->qspi_config->data_io0_pin, 4, false);
+
+    pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_mov(pio_pins, pio_null));
+    pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
+}
+
+static void wiznet_pio_qspi_set_active(wiznet_pio_qspi_handle_t handle) {
+    active_state = (wiznet_pio_qspi_state_t *)handle;
+}
+
+static void wiznet_pio_qspi_set_inactive(void) {
+    active_state = NULL;
+}
+
+static void wizchip_pio_qspi_reset(wiznet_pio_qspi_handle_t handle) {
+
+    wiznet_pio_qspi_state_t *state = (wiznet_pio_qspi_state_t *)handle;
+    gpio_set_dir(state->qspi_config->reset_pin, GPIO_OUT);
+    gpio_put(state->qspi_config->reset_pin, 0);
+    sleep_ms(100);
+    gpio_put(state->qspi_config->reset_pin, 1);
+    sleep_ms(100);
+
+}
+
+static wiznet_pio_qspi_funcs_t *get_wiznet_pio_qspi_impl(void) {
+    static wiznet_pio_qspi_funcs_t funcs = {
+        .close = wiznet_pio_qspi_close,
+        .set_active = wiznet_pio_qspi_set_active,
+        .set_inactive = wiznet_pio_qspi_set_inactive,
+        .frame_start = wiznet_pio_qspi_frame_start,
+        .frame_end = wiznet_pio_qspi_frame_end,
+        .read_byte = wiznet_pio_qspi_read_byte,
+        .write_byte = wiznet_pio_qspi_write_byte,
+        .reset = wizchip_pio_qspi_reset,
+    };
+    return &funcs;
+}
@@ -0,0 +1,53 @@
+/*
+    Copyright (c) 2023 Raspberry Pi (Trading) Ltd.
+
+    SPDX-License-Identifier: BSD-3-Clause
+*/
+
+#ifndef _WIZNET_SPI_PIO_H_
+#define _WIZNET_SPI_PIO_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+typedef struct wiznet_pio_qspi_config {
+    uint16_t clock_div_major;
+    uint8_t clock_div_minor;
+    uint8_t clock_pin;
+    uint8_t data_io0_pin;
+    uint8_t data_io1_pin;
+    uint8_t data_io2_pin;
+    uint8_t data_io3_pin;
+    uint8_t cs_pin;
+    uint8_t reset_pin;
+    uint8_t irq_pin;
+} wiznet_pio_qspi_config_t;
+
+typedef struct wiznet_pio_qspi_funcs** wiznet_pio_qspi_handle_t;
+
+typedef struct wiznet_pio_qspi_funcs {
+    void (*close)(wiznet_pio_qspi_handle_t funcs);
+    void (*set_active)(wiznet_pio_qspi_handle_t funcs);
+    void (*set_inactive)(void);
+    void (*frame_start)(void);
+    void (*frame_end)(void);
+    void (*read_byte)(uint8_t opcode, uint16_t addr, uint8_t* pBuf, uint16_t len);
+    void (*write_byte)(uint8_t opcode, uint16_t addr, uint8_t* pBuf, uint16_t len);
+    void (*read_buffer)(uint8_t *pBuf, uint16_t len);
+    void (*write_buffer)(uint8_t *pBuf, uint16_t len);
+    void (*reset)(wiznet_pio_qspi_handle_t funcs);
+} wiznet_pio_qspi_funcs_t;
+
+wiznet_pio_qspi_handle_t wiznet_pio_qspi_open(const wiznet_pio_qspi_config_t *qspi_config);
+void wiznet_pio_qspi_close(wiznet_pio_qspi_handle_t handle);
+void wiznet_pio_qspi_frame_start(void);
+void wiznet_pio_qspi_frame_end(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,95 @@
+;
+; Copyright (c) 2023 Raspberry Pi (Trading) Ltd.
+;
+; SPDX-License-Identifier: BSD-3-Clause
+;
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Normal SPI for W55RP20
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+.program wiznet_spi_write_read
+.side_set 1
+
+public write_bits:
+    out pins, 1             side 0
+    jmp x-- write_bits      side 1
+    set pins 0              side 0
+public write_end:
+read_byte_delay:
+    set pindirs 0           side 0
+read_byte:
+    set x 6                 side 1
+read_bits:
+    in pins, 1              side 0
+    jmp x-- read_bits       side 1
+    in pins, 1              side 0
+    jmp y-- read_byte       side 0
+public read_end:
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; QSPI Single for W6300
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+.program wizchip_pio_spi_single_write_read
+.side_set 1
+
+public write_bits: 
+    out pins, 1             side 0
+    jmp x-- write_bits      side 1
+    set pins 0              side 0
+public write_bits_end:
+read_byte_delay:
+    set pindirs 0           side 0
+read_byte:
+    set x 6                 side 1
+read_bits:
+    in pins, 1              side 0 
+    jmp x-- read_bits       side 1
+    in pins, 1              side 0 
+    jmp y-- read_byte       side 0
+public read_bits_end:
+
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; QSPI Dual for W6300
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+.program wizchip_pio_spi_dual_write_read
+.side_set 1
+
+public write_bits: 
+    out pins, 2             side 0
+    jmp x-- write_bits      side 1
+    set pins 0              side 0
+public write_bits_end:
+read_byte_delay:
+    set pindirs 0           side 0
+read_byte:
+    set x 2                 side 1
+read_bits:
+    in pins, 2              side 0 
+    jmp x-- read_bits       side 1
+    in pins, 2              side 0 
+    jmp y-- read_byte       side 0
+public read_bits_end:
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; QSPI Quad for W6300
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+.program wizchip_pio_spi_quad_write_read
+.side_set 1
+
+write_bits: 
+    out pins, 4             side 0
+    jmp x-- write_bits      side 1
+    set pins 0              side 0
+public write_bits_end:
+read_byte_delay:
+    set pindirs 0           side 0
+read_byte:
+    set x 0                 side 1
+read_bits:
+    in pins, 4              side 0 
+    jmp x-- read_bits       side 1
+    in pins, 4              side 0 
+    jmp y-- read_byte       side 0
+public read_bits_end:
@@ -0,0 +1,189 @@
+// -------------------------------------------------- //
+// This file is autogenerated by pioasm; do not edit! //
+// -------------------------------------------------- //
+
+#pragma once
+
+#if !PICO_NO_HARDWARE
+#include "hardware/pio.h"
+#endif
+
+// --------------------- //
+// wiznet_spi_write_read //
+// --------------------- //
+
+#define wiznet_spi_write_read_wrap_target 0
+#define wiznet_spi_write_read_wrap 8
+#define wiznet_spi_write_read_pio_version 0
+
+#define wiznet_spi_write_read_offset_write_bits 0u
+#define wiznet_spi_write_read_offset_write_end 3u
+#define wiznet_spi_write_read_offset_read_end 9u
+
+static const uint16_t wiznet_spi_write_read_program_instructions[] = {
+    //     .wrap_target
+    0x6001, //  0: out    pins, 1         side 0
+    0x1040, //  1: jmp    x--, 0          side 1
+    0xe000, //  2: set    pins, 0         side 0
+    0xe080, //  3: set    pindirs, 0      side 0
+    0xf026, //  4: set    x, 6            side 1
+    0x4001, //  5: in     pins, 1         side 0
+    0x1045, //  6: jmp    x--, 5          side 1
+    0x4001, //  7: in     pins, 1         side 0
+    0x0084, //  8: jmp    y--, 4          side 0
+    //     .wrap
+};
+
+#if !PICO_NO_HARDWARE
+static const struct pio_program wiznet_spi_write_read_program = {
+    .instructions = wiznet_spi_write_read_program_instructions,
+    .length = 9,
+    .origin = -1,
+    .pio_version = wiznet_spi_write_read_pio_version,
+#if PICO_PIO_VERSION > 0
+    .used_gpio_ranges = 0x0
+#endif
+};
+
+static inline pio_sm_config wiznet_spi_write_read_program_get_default_config(uint offset) {
+    pio_sm_config c = pio_get_default_sm_config();
+    sm_config_set_wrap(&c, offset + wiznet_spi_write_read_wrap_target, offset + wiznet_spi_write_read_wrap);
+    sm_config_set_sideset(&c, 1, false, false);
+    return c;
+}
+#endif
+
+// --------------------------------- //
+// wizchip_pio_spi_single_write_read //
+// --------------------------------- //
+
+#define wizchip_pio_spi_single_write_read_wrap_target 0
+#define wizchip_pio_spi_single_write_read_wrap 8
+#define wizchip_pio_spi_single_write_read_pio_version 0
+
+#define wizchip_pio_spi_single_write_read_offset_write_bits 0u
+#define wizchip_pio_spi_single_write_read_offset_write_bits_end 3u
+#define wizchip_pio_spi_single_write_read_offset_read_bits_end 9u
+
+static const uint16_t wizchip_pio_spi_single_write_read_program_instructions[] = {
+    //     .wrap_target
+    0x6001, //  0: out    pins, 1         side 0
+    0x1040, //  1: jmp    x--, 0          side 1
+    0xe000, //  2: set    pins, 0         side 0
+    0xe080, //  3: set    pindirs, 0      side 0
+    0xf026, //  4: set    x, 6            side 1
+    0x4001, //  5: in     pins, 1         side 0
+    0x1045, //  6: jmp    x--, 5          side 1
+    0x4001, //  7: in     pins, 1         side 0
+    0x0084, //  8: jmp    y--, 4          side 0
+    //     .wrap
+};
+
+#if !PICO_NO_HARDWARE
+static const struct pio_program wizchip_pio_spi_single_write_read_program = {
+    .instructions = wizchip_pio_spi_single_write_read_program_instructions,
+    .length = 9,
+    .origin = -1,
+    .pio_version = wizchip_pio_spi_single_write_read_pio_version,
+#if PICO_PIO_VERSION > 0
+    .used_gpio_ranges = 0x0
+#endif
+};
+
+static inline pio_sm_config wizchip_pio_spi_single_write_read_program_get_default_config(uint offset) {
+    pio_sm_config c = pio_get_default_sm_config();
+    sm_config_set_wrap(&c, offset + wizchip_pio_spi_single_write_read_wrap_target, offset + wizchip_pio_spi_single_write_read_wrap);
+    sm_config_set_sideset(&c, 1, false, false);
+    return c;
+}
+#endif
+
+// ------------------------------- //
+// wizchip_pio_spi_dual_write_read //
+// ------------------------------- //
+
+#define wizchip_pio_spi_dual_write_read_wrap_target 0
+#define wizchip_pio_spi_dual_write_read_wrap 8
+#define wizchip_pio_spi_dual_write_read_pio_version 0
+
+#define wizchip_pio_spi_dual_write_read_offset_write_bits 0u
+#define wizchip_pio_spi_dual_write_read_offset_write_bits_end 3u
+#define wizchip_pio_spi_dual_write_read_offset_read_bits_end 9u
+
+static const uint16_t wizchip_pio_spi_dual_write_read_program_instructions[] = {
+    //     .wrap_target
+    0x6002, //  0: out    pins, 2         side 0
+    0x1040, //  1: jmp    x--, 0          side 1
+    0xe000, //  2: set    pins, 0         side 0
+    0xe080, //  3: set    pindirs, 0      side 0
+    0xf022, //  4: set    x, 2            side 1
+    0x4002, //  5: in     pins, 2         side 0
+    0x1045, //  6: jmp    x--, 5          side 1
+    0x4002, //  7: in     pins, 2         side 0
+    0x0084, //  8: jmp    y--, 4          side 0
+    //     .wrap
+};
+
+#if !PICO_NO_HARDWARE
+static const struct pio_program wizchip_pio_spi_dual_write_read_program = {
+    .instructions = wizchip_pio_spi_dual_write_read_program_instructions,
+    .length = 9,
+    .origin = -1,
+    .pio_version = wizchip_pio_spi_dual_write_read_pio_version,
+#if PICO_PIO_VERSION > 0
+    .used_gpio_ranges = 0x0
+#endif
+};
+
+static inline pio_sm_config wizchip_pio_spi_dual_write_read_program_get_default_config(uint offset) {
+    pio_sm_config c = pio_get_default_sm_config();
+    sm_config_set_wrap(&c, offset + wizchip_pio_spi_dual_write_read_wrap_target, offset + wizchip_pio_spi_dual_write_read_wrap);
+    sm_config_set_sideset(&c, 1, false, false);
+    return c;
+}
+#endif
+
+// ------------------------------- //
+// wizchip_pio_spi_quad_write_read //
+// ------------------------------- //
+
+#define wizchip_pio_spi_quad_write_read_wrap_target 0
+#define wizchip_pio_spi_quad_write_read_wrap 8
+#define wizchip_pio_spi_quad_write_read_pio_version 0
+
+#define wizchip_pio_spi_quad_write_read_offset_write_bits_end 3u
+#define wizchip_pio_spi_quad_write_read_offset_read_bits_end 9u
+
+static const uint16_t wizchip_pio_spi_quad_write_read_program_instructions[] = {
+    //     .wrap_target
+    0x6004, //  0: out    pins, 4         side 0
+    0x1040, //  1: jmp    x--, 0          side 1
+    0xe000, //  2: set    pins, 0         side 0
+    0xe080, //  3: set    pindirs, 0      side 0
+    0xf020, //  4: set    x, 0            side 1
+    0x4004, //  5: in     pins, 4         side 0
+    0x1045, //  6: jmp    x--, 5          side 1
+    0x4004, //  7: in     pins, 4         side 0
+    0x0084, //  8: jmp    y--, 4          side 0
+    //     .wrap
+};
+
+#if !PICO_NO_HARDWARE
+static const struct pio_program wizchip_pio_spi_quad_write_read_program = {
+    .instructions = wizchip_pio_spi_quad_write_read_program_instructions,
+    .length = 9,
+    .origin = -1,
+    .pio_version = wizchip_pio_spi_quad_write_read_pio_version,
+#if PICO_PIO_VERSION > 0
+    .used_gpio_ranges = 0x0
+#endif
+};
+
+static inline pio_sm_config wizchip_pio_spi_quad_write_read_program_get_default_config(uint offset) {
+    pio_sm_config c = pio_get_default_sm_config();
+    sm_config_set_wrap(&c, offset + wizchip_pio_spi_quad_write_read_wrap_target, offset + wizchip_pio_spi_quad_write_read_wrap);
+    sm_config_set_sideset(&c, 1, false, false);
+    return c;
+}
+#endif
+
@@ -1,6 +1,6 @@
 {
  "name": "framework-arduinopico",
-  "version": "1.40502.0",
+  "version": "1.40600.0",
  "description": "Arduino Wiring-based Framework (RPi Pico RP2040, RP2350)",
  "keywords": [
    "framework",
@@ -119,6 +119,9 @@
                  {
                     "name": "ArtronShop RP2 Nano"
                  },
+                  {
+                     "name": "BIGTREETECH SKR-Pico"
+                  },
                  {
                     "name": "Breadstick Raspberry"
                  },
@@ -374,6 +377,12 @@
                  {
                     "name": "Waveshare RP2040 LCD 1.28"
                  },
+                  {
+                     "name": "Waveshare RP2350 Plus"
+                  },
+                  {
+                     "name": "Waveshare RP2350 LCD 0.96"
+                  },
                  {
                     "name": "WIZnet W5100S-EVB-Pico"
                  },
@@ -392,6 +401,12 @@
                  {
                     "name": "WIZnet W55RP20-EVB-Pico"
                  },
+                  {
+                     "name": "WIZnet W6300-EVB-Pico"
+                  },
+                  {
+                     "name": "WIZnet W6300-EVB-Pico2"
+                  },
                  {
                     "name": "Generic RP2040"
                  },
@@ -402,22 +417,22 @@
               "toolsDependencies": [
                  {
                     "packager": "rp2040",
-                     "version": "4.0.1-8ec9d6f",
+                     "version": "4.1.0-1aec55e",
                     "name": "pqt-gcc"
                  },
                  {
                     "packager": "rp2040",
-                     "version": "4.0.1-8ec9d6f",
+                     "version": "4.1.0-1aec55e",
                     "name": "pqt-gcc-riscv"
                  },
                  {
                     "packager": "rp2040",
-                     "version": "4.0.1-8ec9d6f",
+                     "version": "4.1.0-1aec55e",
                     "name": "pqt-mklittlefs"
                  },
                  {
                     "packager": "rp2040",
-                     "version": "4.0.1-8ec9d6f",
+                     "version": "4.1.0-1aec55e",
                     "name": "pqt-pioasm"
                  },
                  {
@@ -427,12 +442,12 @@
                  },
                  {
                     "packager": "rp2040",
-                     "version": "4.0.1-8ec9d6f",
+                     "version": "4.1.0-1aec55e",
                     "name": "pqt-openocd"
                  },
                  {
                     "packager": "rp2040",
-                     "version": "4.0.1-8ec9d6f",
+                     "version": "4.1.0-1aec55e",
                     "name": "pqt-picotool"
                  }
               ],
@@ -443,187 +458,187 @@
         ],
         "tools": [
            {
-               "version": "4.0.1-8ec9d6f",
+               "version": "4.1.0-1aec55e",
               "name": "pqt-gcc",
               "systems": [
                  {
                     "host": "arm64-apple-darwin",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/aarch64-apple-darwin20.4.arm-none-eabi-8ec9d6f.240929.tar.gz",
-                     "archiveFileName": "aarch64-apple-darwin20.4.arm-none-eabi-8ec9d6f.240929.tar.gz",
-                     "checksum": "SHA-256:cb84f473efda1b8147d552b5e42a20017654fb13ffa8fa6fabdca6b517f0eaa9",
-                     "size": "106002809"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/aarch64-apple-darwin20.4.arm-none-eabi-1aec55e.250530.tar.gz",
+                     "archiveFileName": "aarch64-apple-darwin20.4.arm-none-eabi-1aec55e.250530.tar.gz",
+                     "checksum": "SHA-256:d3fcb0976c8efd8a883e4ae82fbb863b14b372c2fff32846f340351d13dc1bda",
+                     "size": "107229105"
                  },
                  {
                     "host": "aarch64-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/aarch64-linux-gnu.arm-none-eabi-8ec9d6f.240929.tar.gz",
-                     "archiveFileName": "aarch64-linux-gnu.arm-none-eabi-8ec9d6f.240929.tar.gz",
-                     "checksum": "SHA-256:f80c0bacbb9e522666e2f41a35a8536dfe1b959532062e63dd052a576ba7f418",
-                     "size": "114435949"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/aarch64-linux-gnu.arm-none-eabi-1aec55e.250530.tar.gz",
+                     "archiveFileName": "aarch64-linux-gnu.arm-none-eabi-1aec55e.250530.tar.gz",
+                     "checksum": "SHA-256:4f2bb3039761292fcd2962cc90dbbf084f89238a986db69e1f9c272ff81fd7e9",
+                     "size": "115660714"
                  },
                  {
                     "host": "arm-linux-gnueabihf",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/arm-linux-gnueabihf.arm-none-eabi-8ec9d6f.240929.tar.gz",
-                     "archiveFileName": "arm-linux-gnueabihf.arm-none-eabi-8ec9d6f.240929.tar.gz",
-                     "checksum": "SHA-256:736679d3aa55ba08ca2cfc4e88e1a71eff2bcba7c4d1aed2f9d3e325bf7f362d",
-                     "size": "107960125"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/arm-linux-gnueabihf.arm-none-eabi-1aec55e.250530.tar.gz",
+                     "archiveFileName": "arm-linux-gnueabihf.arm-none-eabi-1aec55e.250530.tar.gz",
+                     "checksum": "SHA-256:08c644058405393bf98154acb0a8758aa6673cf19731e2a315d4623c285672d5",
+                     "size": "109176264"
                  },
                  {
                     "host": "i686-pc-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/i686-linux-gnu.arm-none-eabi-8ec9d6f.240929.tar.gz",
-                     "archiveFileName": "i686-linux-gnu.arm-none-eabi-8ec9d6f.240929.tar.gz",
-                     "checksum": "SHA-256:ba8bfadaa28da88777f95de0f28720d4bc6d24367bacc0751fe7f91fabec543d",
-                     "size": "117654636"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/i686-linux-gnu.arm-none-eabi-1aec55e.250530.tar.gz",
+                     "archiveFileName": "i686-linux-gnu.arm-none-eabi-1aec55e.250530.tar.gz",
+                     "checksum": "SHA-256:4f78f591b20f85587c016f453c254c75fd5ed8438ce218a1286cf630c5813dbb",
+                     "size": "118889455"
                  },
                  {
                     "host": "i686-mingw32",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/i686-w64-mingw32.arm-none-eabi-8ec9d6f.240929.zip",
-                     "archiveFileName": "i686-w64-mingw32.arm-none-eabi-8ec9d6f.240929.zip",
-                     "checksum": "SHA-256:3b9672cbd4ebb32cd1510bfd7839ab0b59f6fac3ecd6151aa0d10047a1c2230a",
-                     "size": "124363537"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/i686-w64-mingw32.arm-none-eabi-1aec55e.250530.zip",
+                     "archiveFileName": "i686-w64-mingw32.arm-none-eabi-1aec55e.250530.zip",
+                     "checksum": "SHA-256:a338b24c481d2df86c403f7caf0aaf97ae4e6d79e4b08cb8355b03faa11e283a",
+                     "size": "126641402"
                  },
                  {
                     "host": "x86_64-apple-darwin",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-apple-darwin20.4.arm-none-eabi-8ec9d6f.240929.tar.gz",
-                     "archiveFileName": "x86_64-apple-darwin20.4.arm-none-eabi-8ec9d6f.240929.tar.gz",
-                     "checksum": "SHA-256:509820140252eed71cc4148f89c00318febddea08e500ffaa642cb7b7831ba59",
-                     "size": "118604056"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-apple-darwin20.4.arm-none-eabi-1aec55e.250530.tar.gz",
+                     "archiveFileName": "x86_64-apple-darwin20.4.arm-none-eabi-1aec55e.250530.tar.gz",
+                     "checksum": "SHA-256:c8555d7d580f7e6157cfc60b205b5a785006f4a3138ffab136a015e19af3104c",
+                     "size": "119805934"
                  },
                  {
                     "host": "x86_64-pc-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-linux-gnu.arm-none-eabi-8ec9d6f.240929.tar.gz",
-                     "archiveFileName": "x86_64-linux-gnu.arm-none-eabi-8ec9d6f.240929.tar.gz",
-                     "checksum": "SHA-256:ae082491cc07d60c014ca928c406aed72c4b1ead4c33076216c77fd2d242f74d",
-                     "size": "115607420"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-linux-gnu.arm-none-eabi-1aec55e.250530.tar.gz",
+                     "archiveFileName": "x86_64-linux-gnu.arm-none-eabi-1aec55e.250530.tar.gz",
+                     "checksum": "SHA-256:8607c781b7b01032c264b3357889e958998fe2e557342ad0f8153233fa5f7f37",
+                     "size": "116824397"
                  },
                  {
                     "host": "x86_64-mingw32",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-w64-mingw32.arm-none-eabi-8ec9d6f.240929.zip",
-                     "archiveFileName": "x86_64-w64-mingw32.arm-none-eabi-8ec9d6f.240929.zip",
-                     "checksum": "SHA-256:a1ac18cde856fa01aafc9985a719f3749abd3588ac6725d1781f02da94b84d54",
-                     "size": "128268207"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-w64-mingw32.arm-none-eabi-1aec55e.250530.zip",
+                     "archiveFileName": "x86_64-w64-mingw32.arm-none-eabi-1aec55e.250530.zip",
+                     "checksum": "SHA-256:f07ec7ac929f56ecadaeabeca67a406133b66ed0b0f5cc3d5ac0e6ffae8f92cf",
+                     "size": "130565828"
                  }
               ]
            },
            {
-               "version": "4.0.1-8ec9d6f",
+               "version": "4.1.0-1aec55e",
               "name": "pqt-picotool",
               "systems": [
                  {
                     "host": "arm64-apple-darwin",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/aarch64-apple-darwin20.4.picotool-8a9af99.240929.tar.gz",
-                     "archiveFileName": "aarch64-apple-darwin20.4.picotool-8a9af99.240929.tar.gz",
-                     "checksum": "SHA-256:71eb93270747c5910893f36f5552affd4c254f085b4a7850765b29eec28040ec",
-                     "size": "856205"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/aarch64-apple-darwin20.4.picotool-c56c005.250530.tar.gz",
+                     "archiveFileName": "aarch64-apple-darwin20.4.picotool-c56c005.250530.tar.gz",
+                     "checksum": "SHA-256:53c94035ac6f19c1d9377e31249f3f3adb82ac87ac1f3f7a06e31ca78d4ea5fe",
+                     "size": "856207"
                  },
                  {
                     "host": "aarch64-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/aarch64-linux-gnu.picotool-8a9af99.240929.tar.gz",
-                     "archiveFileName": "aarch64-linux-gnu.picotool-8a9af99.240929.tar.gz",
-                     "checksum": "SHA-256:1f73e2c6ce8c7503678dfacec3d2ea889e0f5a161912eff68b290cf405206094",
-                     "size": "896502"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/aarch64-linux-gnu.picotool-c56c005.250530.tar.gz",
+                     "archiveFileName": "aarch64-linux-gnu.picotool-c56c005.250530.tar.gz",
+                     "checksum": "SHA-256:606e2215adc16b57ada4c8873ae58194c721deca489ba18ada9318460b48e662",
+                     "size": "733779"
                  },
                  {
                     "host": "arm-linux-gnueabihf",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/arm-linux-gnueabihf.picotool-8a9af99.240929.tar.gz",
-                     "archiveFileName": "arm-linux-gnueabihf.picotool-8a9af99.240929.tar.gz",
-                     "checksum": "SHA-256:6cd60632141f68e1bde7afef93dc5521e78dfff2be421ffddd2da76af5bb3eb1",
-                     "size": "840254"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/arm-linux-gnueabihf.picotool-c56c005.250530.tar.gz",
+                     "archiveFileName": "arm-linux-gnueabihf.picotool-c56c005.250530.tar.gz",
+                     "checksum": "SHA-256:948410645d2deea77117ab5d80719b89c2d0cf8a61158319a3deee9dff74a526",
+                     "size": "683701"
                  },
                  {
                     "host": "i686-pc-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/i686-linux-gnu.picotool-8a9af99.240929.tar.gz",
-                     "archiveFileName": "i686-linux-gnu.picotool-8a9af99.240929.tar.gz",
-                     "checksum": "SHA-256:bd5acd7d7085ba01bff07fef6ce4a5ba067abd0b8914c33fae371ec87c846d83",
-                     "size": "984652"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/i686-linux-gnu.picotool-c56c005.250530.tar.gz",
+                     "archiveFileName": "i686-linux-gnu.picotool-c56c005.250530.tar.gz",
+                     "checksum": "SHA-256:0acd8d2af8b3486f5caeb39dfaaca83d41dd5e5e5b61125f1d6b1afd6061c806",
+                     "size": "816954"
                  },
                  {
                     "host": "i686-mingw32",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/i686-w64-mingw32.picotool-8a9af99.240929.zip",
-                     "archiveFileName": "i686-w64-mingw32.picotool-8a9af99.240929.zip",
-                     "checksum": "SHA-256:9f7c90c4f05996f5156beb4dc06edfc7e0b36006edd6ad273daca0085ea19ac6",
-                     "size": "1335369"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/i686-w64-mingw32.picotool-c56c005.250530.zip",
+                     "archiveFileName": "i686-w64-mingw32.picotool-c56c005.250530.zip",
+                     "checksum": "SHA-256:336cfe24722096887deaa13575639f80cc4a65f61c9d8208b0a1d23fdc376939",
+                     "size": "1335370"
                  },
                  {
                     "host": "x86_64-apple-darwin",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-apple-darwin20.4.picotool-8a9af99.240929.tar.gz",
-                     "archiveFileName": "x86_64-apple-darwin20.4.picotool-8a9af99.240929.tar.gz",
-                     "checksum": "SHA-256:a8d30f63e421901000d2b2520f047d1dc586f827f41a3ef52056fd92272ff051",
-                     "size": "829477"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-apple-darwin20.4.picotool-c56c005.250530.tar.gz",
+                     "archiveFileName": "x86_64-apple-darwin20.4.picotool-c56c005.250530.tar.gz",
+                     "checksum": "SHA-256:f82b426d2c47edb4f7b02f0de999bac936c4c139203bbb5b2440c0c12091a553",
+                     "size": "829479"
                  },
                  {
                     "host": "x86_64-pc-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-linux-gnu.picotool-8a9af99.240929.tar.gz",
-                     "archiveFileName": "x86_64-linux-gnu.picotool-8a9af99.240929.tar.gz",
-                     "checksum": "SHA-256:4c5b43afd1e9dba149753089c9715e110f2612cbd47fa005fb033adbe5237ad8",
-                     "size": "926046"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-linux-gnu.picotool-c56c005.250530.tar.gz",
+                     "archiveFileName": "x86_64-linux-gnu.picotool-c56c005.250530.tar.gz",
+                     "checksum": "SHA-256:354e408e6cbe03d162623f3ce89ee4f82827374cdcc3cb036c95fc39e8efce80",
+                     "size": "770012"
                  },
                  {
                     "host": "x86_64-mingw32",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-w64-mingw32.picotool-8a9af99.240929.zip",
-                     "archiveFileName": "x86_64-w64-mingw32.picotool-8a9af99.240929.zip",
-                     "checksum": "SHA-256:d4a43c8172f6b32de412a08e4deac4ef50218f5955c9cda85411b252fcecaea3",
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-w64-mingw32.picotool-c56c005.250530.zip",
+                     "archiveFileName": "x86_64-w64-mingw32.picotool-c56c005.250530.zip",
+                     "checksum": "SHA-256:457509c762a0e9ffccd1363bc7d304e8d3632aa70f772602f3627baacd2a4177",
                     "size": "1270392"
                  }
               ]
            },
            {
-               "version": "4.0.1-8ec9d6f",
+               "version": "4.1.0-1aec55e",
               "name": "pqt-openocd",
               "systems": [
                  {
                     "host": "arm64-apple-darwin",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/aarch64-apple-darwin20.4.openocd-ebec9504d.240929.tar.gz",
-                     "archiveFileName": "aarch64-apple-darwin20.4.openocd-ebec9504d.240929.tar.gz",
-                     "checksum": "SHA-256:d2f2e615b45cb57dad5bf8cc8637dc047f0e2a2d6d07907b961f82fdc9d9dff1",
-                     "size": "1981025"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/aarch64-apple-darwin20.4.openocd-ebec9504d.250530.tar.gz",
+                     "archiveFileName": "aarch64-apple-darwin20.4.openocd-ebec9504d.250530.tar.gz",
+                     "checksum": "SHA-256:6d460848bc2eeaabda53cc622f8e576429256a26ebaad80dbae474ff1b3be440",
+                     "size": "1981026"
                  },
                  {
                     "host": "aarch64-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/aarch64-linux-gnu.openocd-ebec9504d.240929.tar.gz",
-                     "archiveFileName": "aarch64-linux-gnu.openocd-ebec9504d.240929.tar.gz",
-                     "checksum": "SHA-256:b9f98837bce6da1e7d2229d8e2a9a2736a433356b82cea678b8fc4e95c3cd30f",
-                     "size": "7354446"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/aarch64-linux-gnu.openocd-ebec9504d.250530.tar.gz",
+                     "archiveFileName": "aarch64-linux-gnu.openocd-ebec9504d.250530.tar.gz",
+                     "checksum": "SHA-256:233445bef68e48f4bdbd30a8b322baaf1c6bcac379c680b2d135ac02002ccdb8",
+                     "size": "7355050"
                  },
                  {
                     "host": "arm-linux-gnueabihf",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/arm-linux-gnueabihf.openocd-ebec9504d.240929.tar.gz",
-                     "archiveFileName": "arm-linux-gnueabihf.openocd-ebec9504d.240929.tar.gz",
-                     "checksum": "SHA-256:5a13e718029d5b86fef880f78e60e7521fcf1952911cd65b4cbfc8ef09a5d37c",
-                     "size": "7209884"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/arm-linux-gnueabihf.openocd-ebec9504d.250530.tar.gz",
+                     "archiveFileName": "arm-linux-gnueabihf.openocd-ebec9504d.250530.tar.gz",
+                     "checksum": "SHA-256:b527247039041f947af7f7f462eab2abab6986c6f6a60381490f4e933757ebcf",
+                     "size": "7210349"
                  },
                  {
                     "host": "i686-pc-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/i686-linux-gnu.openocd-ebec9504d.240929.tar.gz",
-                     "archiveFileName": "i686-linux-gnu.openocd-ebec9504d.240929.tar.gz",
-                     "checksum": "SHA-256:fa324ab0a8a20dab6335196e6b8ebb5fb0c083dc4d8017140287068bf85b3b5f",
-                     "size": "6944581"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/i686-linux-gnu.openocd-ebec9504d.250530.tar.gz",
+                     "archiveFileName": "i686-linux-gnu.openocd-ebec9504d.250530.tar.gz",
+                     "checksum": "SHA-256:38cdff7120e3fa370b7a550412c66c168fac9971c52c7938a0e6db57e6fbb0a1",
+                     "size": "6945216"
                  },
                  {
                     "host": "i686-mingw32",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/i686-w64-mingw32.openocd-ebec9504d.240929.zip",
-                     "archiveFileName": "i686-w64-mingw32.openocd-ebec9504d.240929.zip",
-                     "checksum": "SHA-256:f0d9cd099bb80d9f68b3554ef9233b2576c4959b4d2ce7444a9a5358d3bd40e0",
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/i686-w64-mingw32.openocd-ebec9504d.250530.zip",
+                     "archiveFileName": "i686-w64-mingw32.openocd-ebec9504d.250530.zip",
+                     "checksum": "SHA-256:ba78df9fff54be509348f46af2a7a187553593c889fd70293bcd673cdaa6337a",
                     "size": "2597199"
                  },
                  {
                     "host": "x86_64-apple-darwin",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-apple-darwin20.4.openocd-ebec9504d.240929.tar.gz",
-                     "archiveFileName": "x86_64-apple-darwin20.4.openocd-ebec9504d.240929.tar.gz",
-                     "checksum": "SHA-256:e06283df22585bf6a83742d364d3594f7bcd724aa8be83de0446c3d1eaca7a58",
-                     "size": "3193818"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-apple-darwin20.4.openocd-ebec9504d.250530.tar.gz",
+                     "archiveFileName": "x86_64-apple-darwin20.4.openocd-ebec9504d.250530.tar.gz",
+                     "checksum": "SHA-256:06489aac36a97be87dff144df57ef7ae6dd525cfc5583c55c2426cb1bdc54d90",
+                     "size": "3193821"
                  },
                  {
                     "host": "x86_64-pc-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-linux-gnu.openocd-ebec9504d.240929.tar.gz",
-                     "archiveFileName": "x86_64-linux-gnu.openocd-ebec9504d.240929.tar.gz",
-                     "checksum": "SHA-256:d8dd0740e16414488de35f5ca1ddfcfe85763fe25d55a46cb9df8698ea83836d",
-                     "size": "7375538"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-linux-gnu.openocd-ebec9504d.250530.tar.gz",
+                     "archiveFileName": "x86_64-linux-gnu.openocd-ebec9504d.250530.tar.gz",
+                     "checksum": "SHA-256:56a4b435e1e3f0b5803946ab48262b97289e2ced1b753806bca1c353e36778e1",
+                     "size": "7376227"
                  },
                  {
                     "host": "x86_64-mingw32",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-w64-mingw32.openocd-ebec9504d.240929.zip",
-                     "archiveFileName": "x86_64-w64-mingw32.openocd-ebec9504d.240929.zip",
-                     "checksum": "SHA-256:4c6463c2818f7b9623d1c08c17c6e6036bd8d522631098d8befde5b66ab312f9",
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-w64-mingw32.openocd-ebec9504d.250530.zip",
+                     "archiveFileName": "x86_64-w64-mingw32.openocd-ebec9504d.250530.zip",
+                     "checksum": "SHA-256:9998c1559a9e9c5bb792405b94690c53eca392cd5e329096efe393ba0b6af246",
                     "size": "2541780"
                  }
               ]
@@ -698,188 +713,188 @@
               ]
            },
            {
-               "version": "4.0.1-8ec9d6f",
+               "version": "4.1.0-1aec55e",
               "name": "pqt-gcc-riscv",
               "systems": [
                  {
                     "host": "arm64-apple-darwin",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/aarch64-apple-darwin20.4.riscv32-unknown-elf-8ec9d6f.240929.tar.gz",
-                     "archiveFileName": "aarch64-apple-darwin20.4.riscv32-unknown-elf-8ec9d6f.240929.tar.gz",
-                     "checksum": "SHA-256:2dc5495acf7de48ce8e1c3f723e78102ad06add8e8e5dee86bf1dc05b25147ad",
-                     "size": "139017383"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/aarch64-apple-darwin20.4.riscv32-unknown-elf-1aec55e.250530.tar.gz",
+                     "archiveFileName": "aarch64-apple-darwin20.4.riscv32-unknown-elf-1aec55e.250530.tar.gz",
+                     "checksum": "SHA-256:18de7da67984c5675a1591b53605ab118366924b98b9dc11b553530697ddc631",
+                     "size": "141916362"
                  },
                  {
                     "host": "aarch64-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/aarch64-linux-gnu.riscv32-unknown-elf-8ec9d6f.240929.tar.gz",
-                     "archiveFileName": "aarch64-linux-gnu.riscv32-unknown-elf-8ec9d6f.240929.tar.gz",
-                     "checksum": "SHA-256:5d70f84ee56d68583ff61eff6461a4f3e2ecfcd445ffecdbb53e944dd229de5e",
-                     "size": "148943445"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/aarch64-linux-gnu.riscv32-unknown-elf-1aec55e.250530.tar.gz",
+                     "archiveFileName": "aarch64-linux-gnu.riscv32-unknown-elf-1aec55e.250530.tar.gz",
+                     "checksum": "SHA-256:df668033e4225950bf6fe6895f94acfd6ceaab8647b12fe6f3277a98d44a3129",
+                     "size": "151826001"
                  },
                  {
                     "host": "arm-linux-gnueabihf",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/arm-linux-gnueabihf.riscv32-unknown-elf-8ec9d6f.240929.tar.gz",
-                     "archiveFileName": "arm-linux-gnueabihf.riscv32-unknown-elf-8ec9d6f.240929.tar.gz",
-                     "checksum": "SHA-256:65a3cd450d1b2a18e4bb6192f375e98e82a9808545d517a21357900a931f83f2",
-                     "size": "142237277"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/arm-linux-gnueabihf.riscv32-unknown-elf-1aec55e.250530.tar.gz",
+                     "archiveFileName": "arm-linux-gnueabihf.riscv32-unknown-elf-1aec55e.250530.tar.gz",
+                     "checksum": "SHA-256:7e585192865a4bc4c4cd5366c3ed6400b31afc0b802c573c292ee92ce272739d",
+                     "size": "145079225"
                  },
                  {
                     "host": "i686-pc-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/i686-linux-gnu.riscv32-unknown-elf-8ec9d6f.240929.tar.gz",
-                     "archiveFileName": "i686-linux-gnu.riscv32-unknown-elf-8ec9d6f.240929.tar.gz",
-                     "checksum": "SHA-256:130a9d0e970609dd27f70a27d5d34ed927b6a270f956f52aec3b636a206d86f6",
-                     "size": "153960388"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/i686-linux-gnu.riscv32-unknown-elf-1aec55e.250530.tar.gz",
+                     "archiveFileName": "i686-linux-gnu.riscv32-unknown-elf-1aec55e.250530.tar.gz",
+                     "checksum": "SHA-256:a0ff84ae6c6a0c96b5bb4ff99b3c20d0228e436051e9aa960bf8168355f3cf6c",
+                     "size": "156843280"
                  },
                  {
                     "host": "i686-mingw32",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/i686-w64-mingw32.riscv32-unknown-elf-8ec9d6f.240929.zip",
-                     "archiveFileName": "i686-w64-mingw32.riscv32-unknown-elf-8ec9d6f.240929.zip",
-                     "checksum": "SHA-256:25f985cd7ff242fa93a808582911545529eeab2d84b16ac96509425c11249c36",
-                     "size": "159523471"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/i686-w64-mingw32.riscv32-unknown-elf-1aec55e.250530.zip",
+                     "archiveFileName": "i686-w64-mingw32.riscv32-unknown-elf-1aec55e.250530.zip",
+                     "checksum": "SHA-256:083832808526d5736108f58927c9279719a3a923e8f9027cabd889a48c5f28af",
+                     "size": "163747749"
                  },
                  {
                     "host": "x86_64-apple-darwin",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-apple-darwin20.4.riscv32-unknown-elf-8ec9d6f.240929.tar.gz",
-                     "archiveFileName": "x86_64-apple-darwin20.4.riscv32-unknown-elf-8ec9d6f.240929.tar.gz",
-                     "checksum": "SHA-256:4144abfef1c69cee272b6621dd995a5e88ff1e3cf646c8da30d64d9b1cd44b47",
-                     "size": "153526986"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-apple-darwin20.4.riscv32-unknown-elf-1aec55e.250530.tar.gz",
+                     "archiveFileName": "x86_64-apple-darwin20.4.riscv32-unknown-elf-1aec55e.250530.tar.gz",
+                     "checksum": "SHA-256:cf49bf9bada0b90cd2db0d3028bcd88a9b9485a2944c219c352e03c6ab2ba389",
+                     "size": "156380254"
                  },
                  {
                     "host": "x86_64-pc-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-linux-gnu.riscv32-unknown-elf-8ec9d6f.240929.tar.gz",
-                     "archiveFileName": "x86_64-linux-gnu.riscv32-unknown-elf-8ec9d6f.240929.tar.gz",
-                     "checksum": "SHA-256:63ed149ba20ddc215479eaae5f1709a6bd882f4cd583a52ac2171f9096fda3a5",
-                     "size": "151383989"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-linux-gnu.riscv32-unknown-elf-1aec55e.250530.tar.gz",
+                     "archiveFileName": "x86_64-linux-gnu.riscv32-unknown-elf-1aec55e.250530.tar.gz",
+                     "checksum": "SHA-256:0f7cfbf97e06bdaaef9fd68f364f11cea9ee9f04a72486547a4c6ae66491d0e0",
+                     "size": "154290544"
                  },
                  {
                     "host": "x86_64-mingw32",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-w64-mingw32.riscv32-unknown-elf-8ec9d6f.240929.zip",
-                     "archiveFileName": "x86_64-w64-mingw32.riscv32-unknown-elf-8ec9d6f.240929.zip",
-                     "checksum": "SHA-256:182b38d22b8a4447b8b335c1ce482d16bfb0720be51d6368b404c8628a372dd8",
-                     "size": "163390255"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-w64-mingw32.riscv32-unknown-elf-1aec55e.250530.zip",
+                     "archiveFileName": "x86_64-w64-mingw32.riscv32-unknown-elf-1aec55e.250530.zip",
+                     "checksum": "SHA-256:ac6be8c69ee4b2c2153a865fa593f77b6c9c078d43612486cc33ff23cd8d15ab",
+                     "size": "167659589"
                  }
               ]
            },
            {
-               "version": "4.0.1-8ec9d6f",
+               "version": "4.1.0-1aec55e",
               "name": "pqt-pioasm",
               "systems": [
                  {
                     "host": "arm64-apple-darwin",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/aarch64-apple-darwin20.4.pioasm-efe2103.240929.tar.gz",
-                     "archiveFileName": "aarch64-apple-darwin20.4.pioasm-efe2103.240929.tar.gz",
-                     "checksum": "SHA-256:6afebe366be3aefd1caa268ec309bd486d7f1f98eedba033ba3b83a0653f1184",
-                     "size": "267869"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/aarch64-apple-darwin20.4.pioasm-9fdfe11.250530.tar.gz",
+                     "archiveFileName": "aarch64-apple-darwin20.4.pioasm-9fdfe11.250530.tar.gz",
+                     "checksum": "SHA-256:23aa8d9afacb556aaf97819c953a3a5d75aeee8fd8cfcaa43c36b39b08a5a594",
+                     "size": "268119"
                  },
                  {
                     "host": "aarch64-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/aarch64-linux-gnu.pioasm-efe2103.240929.tar.gz",
-                     "archiveFileName": "aarch64-linux-gnu.pioasm-efe2103.240929.tar.gz",
-                     "checksum": "SHA-256:48ca0fe638bf8ccca654c0588678178c3d9c2f933892dbd67244fe5f5637eacb",
-                     "size": "644212"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/aarch64-linux-gnu.pioasm-9fdfe11.250530.tar.gz",
+                     "archiveFileName": "aarch64-linux-gnu.pioasm-9fdfe11.250530.tar.gz",
+                     "checksum": "SHA-256:fb6df3d97b5e03859617565317dd88092f57e158878b436ae0c54c8113276609",
+                     "size": "644159"
                  },
                  {
                     "host": "arm-linux-gnueabihf",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/arm-linux-gnueabihf.pioasm-efe2103.240929.tar.gz",
-                     "archiveFileName": "arm-linux-gnueabihf.pioasm-efe2103.240929.tar.gz",
-                     "checksum": "SHA-256:06001c3eaf5fbe29e94634218569d13c8d61d6007f7b8da0cca1e7f1fd9414cc",
-                     "size": "576904"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/arm-linux-gnueabihf.pioasm-9fdfe11.250530.tar.gz",
+                     "archiveFileName": "arm-linux-gnueabihf.pioasm-9fdfe11.250530.tar.gz",
+                     "checksum": "SHA-256:0dd9c0942ddc56044fb684eaf44f8444313b2d3a476c4545863d8e632dc1afc9",
+                     "size": "577126"
                  },
                  {
                     "host": "i686-pc-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/i686-linux-gnu.pioasm-efe2103.240929.tar.gz",
-                     "archiveFileName": "i686-linux-gnu.pioasm-efe2103.240929.tar.gz",
-                     "checksum": "SHA-256:09c4db3bf797b2a9f5edc3db05717c32c2fdd045ebca12ffba1c3ba037759470",
-                     "size": "703370"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/i686-linux-gnu.pioasm-9fdfe11.250530.tar.gz",
+                     "archiveFileName": "i686-linux-gnu.pioasm-9fdfe11.250530.tar.gz",
+                     "checksum": "SHA-256:2f54fd0355964c4069e9f105ecade3183764ba1e2d57dfd1546d8c065132b619",
+                     "size": "703647"
                  },
                  {
                     "host": "i686-mingw32",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/i686-w64-mingw32.pioasm-efe2103.240929.zip",
-                     "archiveFileName": "i686-w64-mingw32.pioasm-efe2103.240929.zip",
-                     "checksum": "SHA-256:50ec452554c000c692e1f8ee6657a5bb47d99aae62ac10cbf2da3e97cdc45db1",
-                     "size": "797527"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/i686-w64-mingw32.pioasm-9fdfe11.250530.zip",
+                     "archiveFileName": "i686-w64-mingw32.pioasm-9fdfe11.250530.zip",
+                     "checksum": "SHA-256:ea59960c2a4516b5a4d770613548300d0ae8aab1ec9aa4990cec0251a1a2b0d7",
+                     "size": "797374"
                  },
                  {
                     "host": "x86_64-apple-darwin",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-apple-darwin20.4.pioasm-efe2103.240929.tar.gz",
-                     "archiveFileName": "x86_64-apple-darwin20.4.pioasm-efe2103.240929.tar.gz",
-                     "checksum": "SHA-256:9161b685fe394a6bbc19e3f14082d018d230a33941edd523d163d158f0480422",
-                     "size": "780453"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-apple-darwin20.4.pioasm-9fdfe11.250530.tar.gz",
+                     "archiveFileName": "x86_64-apple-darwin20.4.pioasm-9fdfe11.250530.tar.gz",
+                     "checksum": "SHA-256:a69f28aa203a515ea2270a7b274c155c60e1de48a8d5ed1341de50c8d62f238e",
+                     "size": "780687"
                  },
                  {
                     "host": "x86_64-pc-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-linux-gnu.pioasm-efe2103.240929.tar.gz",
-                     "archiveFileName": "x86_64-linux-gnu.pioasm-efe2103.240929.tar.gz",
-                     "checksum": "SHA-256:974481d6b9678c73cefc3c7df657647bc216f2d6c2bdef12236aa06542246973",
-                     "size": "649767"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-linux-gnu.pioasm-9fdfe11.250530.tar.gz",
+                     "archiveFileName": "x86_64-linux-gnu.pioasm-9fdfe11.250530.tar.gz",
+                     "checksum": "SHA-256:ec079c8964f79bc56fe62eb6bc7d711315ec4e939f853956bf36bffd13555470",
+                     "size": "649984"
                  },
                  {
                     "host": "x86_64-mingw32",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-w64-mingw32.pioasm-efe2103.240929.zip",
-                     "archiveFileName": "x86_64-w64-mingw32.pioasm-efe2103.240929.zip",
-                     "checksum": "SHA-256:73cc318e0b1df84fcb661ae9322e22a52f49678f44d3766b4baa82b328b19822",
-                     "size": "929510"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-w64-mingw32.pioasm-9fdfe11.250530.zip",
+                     "archiveFileName": "x86_64-w64-mingw32.pioasm-9fdfe11.250530.zip",
+                     "checksum": "SHA-256:8ec38271642b1b3ae650316b7355d9195812fe805c6c7b6f22b706a56d6c275f",
+                     "size": "929788"
                  }
               ]
            },
            {
-               "version": "4.0.1-8ec9d6f",
+               "version": "4.1.0-1aec55e",
               "name": "pqt-mklittlefs",
               "systems": [
                  {
                     "host": "arm64-apple-darwin",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/aarch64-apple-darwin20.4.mklittlefs-2f7654f.240929.tar.gz",
-                     "archiveFileName": "aarch64-apple-darwin20.4.mklittlefs-2f7654f.240929.tar.gz",
-                     "checksum": "SHA-256:09ddf3f856f2828e94c1e3599021265eb1e69ed84d659604a638af4a010f4f3d",
-                     "size": "72517"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/aarch64-apple-darwin20.4.mklittlefs-db0513a.250530.tar.gz",
+                     "archiveFileName": "aarch64-apple-darwin20.4.mklittlefs-db0513a.250530.tar.gz",
+                     "checksum": "SHA-256:eb33a68039c3fee582db90efeda9332edb96746b4173d9ac83bb35fed4f0fafd",
+                     "size": "72455"
                  },
                  {
                     "host": "aarch64-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/aarch64-linux-gnu.mklittlefs-2f7654f.240929.tar.gz",
-                     "archiveFileName": "aarch64-linux-gnu.mklittlefs-2f7654f.240929.tar.gz",
-                     "checksum": "SHA-256:47e276ee0707e78fa4b588ef4346187071ea4be194519d405b8a1da91d34e682",
-                     "size": "684064"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/aarch64-linux-gnu.mklittlefs-db0513a.250530.tar.gz",
+                     "archiveFileName": "aarch64-linux-gnu.mklittlefs-db0513a.250530.tar.gz",
+                     "checksum": "SHA-256:e724923d634ce117836b5fd71cc6821282d84d9f4624701bd468b8bfc87b47a1",
+                     "size": "683775"
                  },
                  {
                     "host": "arm-linux-gnueabihf",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/arm-linux-gnueabihf.mklittlefs-2f7654f.240929.tar.gz",
-                     "archiveFileName": "arm-linux-gnueabihf.mklittlefs-2f7654f.240929.tar.gz",
-                     "checksum": "SHA-256:f4fb24a675de0bf3575ed6320ae1053d67355bbd3af116933bb1a90c1989bf57",
-                     "size": "632936"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/arm-linux-gnueabihf.mklittlefs-db0513a.250530.tar.gz",
+                     "archiveFileName": "arm-linux-gnueabihf.mklittlefs-db0513a.250530.tar.gz",
+                     "checksum": "SHA-256:0d6fdc45d341e88a43186e666d3f968be0919f3934b29eca6e6d7ca09c36c112",
+                     "size": "632909"
                  },
                  {
                     "host": "i686-pc-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/i686-linux-gnu.mklittlefs-2f7654f.240929.tar.gz",
-                     "archiveFileName": "i686-linux-gnu.mklittlefs-2f7654f.240929.tar.gz",
-                     "checksum": "SHA-256:29df0ca122767357a7f14a2b5fb6e6d1f912789086dcb5e3c39b9df8d85f908a",
-                     "size": "665594"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/i686-linux-gnu.mklittlefs-db0513a.250530.tar.gz",
+                     "archiveFileName": "i686-linux-gnu.mklittlefs-db0513a.250530.tar.gz",
+                     "checksum": "SHA-256:853d9e041468aaff05c130f9ebd56a0ed977b750e79d29409f2f5c24b3eb33f7",
+                     "size": "665575"
                  },
                  {
                     "host": "i686-mingw32",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/i686-w64-mingw32.mklittlefs-2f7654f.240929.zip",
-                     "archiveFileName": "i686-w64-mingw32.mklittlefs-2f7654f.240929.zip",
-                     "checksum": "SHA-256:fa9071ee8f806ca7bf1cc16e1cb2be5588908cff929ec91e007dafa33eb4be1c",
-                     "size": "1232212"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/i686-w64-mingw32.mklittlefs-db0513a.250530.zip",
+                     "archiveFileName": "i686-w64-mingw32.mklittlefs-db0513a.250530.zip",
+                     "checksum": "SHA-256:8471d2315ba92137e0b88aea8e71fee4e0834e4b75867c79ffdaa5657ab7c940",
+                     "size": "1232388"
                  },
                  {
                     "host": "x86_64-apple-darwin",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-apple-darwin20.4.mklittlefs-2f7654f.240929.tar.gz",
-                     "archiveFileName": "x86_64-apple-darwin20.4.mklittlefs-2f7654f.240929.tar.gz",
-                     "checksum": "SHA-256:50a932d7c0351a70c3ecfce725b2c7bd926ddfb086145c225bb1134ad1b1a5ff",
-                     "size": "621594"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-apple-darwin20.4.mklittlefs-db0513a.250530.tar.gz",
+                     "archiveFileName": "x86_64-apple-darwin20.4.mklittlefs-db0513a.250530.tar.gz",
+                     "checksum": "SHA-256:f37c1946df5d2f4047d7703b07b953bb04efd8cf56baa3992c0a6fe625a11158",
+                     "size": "621818"
                  },
                  {
                     "host": "x86_64-pc-linux-gnu",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-linux-gnu.mklittlefs-2f7654f.240929.tar.gz",
-                     "archiveFileName": "x86_64-linux-gnu.mklittlefs-2f7654f.240929.tar.gz",
-                     "checksum": "SHA-256:aec72ad65cec9a96afda0507605661dfd552d5e304dd654c1b1ebb2bcc9f2d76",
-                     "size": "690461"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-linux-gnu.mklittlefs-db0513a.250530.tar.gz",
+                     "archiveFileName": "x86_64-linux-gnu.mklittlefs-db0513a.250530.tar.gz",
+                     "checksum": "SHA-256:a135f6d4a51137c420e92da24469c84d4502f762dd8dc8d6f40bc794508f61ed",
+                     "size": "690394"
                  },
                  {
                     "host": "x86_64-mingw32",
-                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.0.1/x86_64-w64-mingw32.mklittlefs-2f7654f.240929.zip",
-                     "archiveFileName": "x86_64-w64-mingw32.mklittlefs-2f7654f.240929.zip",
-                     "checksum": "SHA-256:83f75c88e8e44fa1a38346ccff2e89756ffcfcda96b5d849f9e6563d996081eb",
-                     "size": "1328984"
+                     "url": "https://github.com/earlephilhower/pico-quick-toolchain/releases/download/4.1.0/x86_64-w64-mingw32.mklittlefs-db0513a.250530.zip",
+                     "archiveFileName": "x86_64-w64-mingw32.mklittlefs-db0513a.250530.zip",
+                     "checksum": "SHA-256:7db0ecc013cec3dad4e18987508f8e86c0aecd8453978559220742562aeb05b9",
+                     "size": "1328438"
                  }
               ]
            }
@@ -20,7 +20,7 @@
 # https://github.com/arduino/Arduino/wiki/Arduino-IDE-1.5---3rd-party-Hardware-specification

 name=Raspberry Pi RP2040/RP2350 Boards
-version=4.5.2
+version=4.6.0

 # Required discoveries and monitors
 # ---------------------------------
@@ -60,7 +60,7 @@ compiler.libbearssl="{runtime.platform.path}/lib/{build.chip}/libbearssl.a"
 compiler.c.cmd={build.toolchain}-gcc
 compiler.c.flags=-c {compiler.warning_flags} {compiler.defines} {compiler.flags} -MMD {compiler.includes} -std=gnu17 -g -pipe
 compiler.c.elf.cmd={build.toolchain}-g++
-compiler.c.elf.flags={compiler.warning_flags} {compiler.defines} {compiler.flags} {build.flags.optimize} -u _printf_float -u _scanf_float
+compiler.c.elf.flags={compiler.warning_flags} {compiler.defines} {compiler.flags} {build.flags.optimize}
 compiler.S.cmd={build.toolchain}-gcc
 compiler.S.flags=-c {compiler.warning_flags} {compiler.defines} -g -x assembler-with-cpp -MMD {compiler.includes} {build.toolchainopts} -g
 compiler.cpp.cmd={build.toolchain}-g++
@@ -203,6 +203,7 @@ tools.uf2conv-network.cmd={runtime.platform.path}/system/python3/python3
 tools.uf2conv-network.upload.protocol=uf2
 tools.uf2conv-network.upload.params.verbose=
 tools.uf2conv-network.upload.params.quiet=
+tools.uf2conv-network.upload.field.password=Password
 tools.uf2conv-network.upload.pattern="{cmd}" -I "{runtime.platform.path}/tools/espota.py" -i "{upload.port.address}" -p "{upload.port.properties.port}" "--auth={upload.field.password}" -f "{build.path}/{build.project_name}.bin"

 #tools.picotool.cmd={runtime.tools.pqt-picotool.path}
@@ -13,7 +13,7 @@ for dir in ./cores/rp2040 ./libraries/EEPROM ./libraries/I2S ./libraries/SingleF
           ./libraries/JoystickBT ./libraries/KeyboardBT ./variants ./libraries/BTstackLib \
           ./libraries/MouseBT ./libraries/SerialBT ./libraries/HID_Bluetooth \
           ./libraries/JoystickBLE ./libraries/KeyboardBLE ./libraries/MouseBLE \
-           ./libraries/lwIP_w55rp20 ./libraries/lwIP_w5500 ./libraries/lwIP_w5100 ./libraries/lwIP_enc28j60 \
+           ./libraries/lwIP_w6300 ./libraries/lwIP_w55rp20 ./libraries/lwIP_w5500 ./libraries/lwIP_w5100 ./libraries/lwIP_enc28j60 \
           ./libraries/SPISlave ./libraries/lwIP_ESPHost ./libraries/FatFS\
           ./libraries/FatFSUSB ./libraries/BluetoothAudio ./libraries/BluetoothHCI \
           ./libraries/BluetoothHIDMaster ./libraries/NetBIOS ./libraries/Ticker \
@@ -30,6 +30,15 @@ as necessary to add any add'l fields or menus required.  Used because the
 `boards.txt` file is very repetitive and it's safer to generate with code
 than by hand.

+## makepacer.cpp
+Generates ``libraries/PWMAudio/src/PWMAudioPrecalc.h` which contains the
+precalculated DMA pacer settings for common audio sample rates and CPU
+frequencies.  Makes setting the frequency for PWMAudio instantaneous.
+
+## makepio.py
+Rebuilds all the ``*.pio`` files in the core and libraries using the
+currently installed pioasm.  Use when a new PIOASM is available.
+
 ## makever.py
 Updates the version info prior to a release in platform.txt, package.json,
 and the version header.   Run from root of the repo.
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Helios",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "DudesCab",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "RP2040",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Feather RP2040",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Feather RP2040 Adalogger",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Feather RP2040 CAN",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Feather RP2040 DVI",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Feather RP2040 Prop-Maker",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Feather RP2040 RFM",
    "upload": {
@@ -25,12 +25,13 @@
        "variant": "adafruit_feather_rp2350_adalogger"
    },
    "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
        "openocd_target": "rp2350.cfg",
        "svd_path": "rp2350.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Feather RP2350 Adalogger",
    "upload": {
@@ -25,12 +25,13 @@
        "variant": "adafruit_feather_rp2350_hstx"
    },
    "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
        "openocd_target": "rp2350.cfg",
        "svd_path": "rp2350.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Feather RP2350 HSTX",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Feather RP2040 SCORPIO",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Feather RP2040 ThinkINK",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Feather RP2040 USB Host",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Floppsy",
    "upload": {
@@ -25,12 +25,13 @@
        "variant": "adafruit_fruitjam"
    },
    "debug": {
-        "jlink_device": "RP2350_0",
+        "jlink_device": "RP2350_M33_0",
        "openocd_target": "rp2350.cfg",
        "svd_path": "rp2350.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "Fruit Jam RP2350",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "ItsyBitsy RP2040",
    "upload": {
@@ -30,7 +30,8 @@
        "svd_path": "rp2040.svd"
    },
    "frameworks": [
-        "arduino"
+        "arduino",
+        "picosdk"
    ],
    "name": "KB2040",
    "upload": {
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
Earle F. Philhower, III	6fc3165d3a	Update version	2025-06-19 18:36:46 -07:00
Maximilian Gerhardt	5dba6f2d1c	Fix JLink device names for RP2350 in PIO boards (#3001 )	2025-06-19 18:30:37 -07:00
Stefan Krüger	53583b2d8e	Add BigTreeTech SKR-Pico (#2988 )	2025-06-19 12:36:20 -07:00
Shubham Patel	327f10cc7e	Add Waveshare RP2350 Plus (#3000 ) * Add Waveshare RP2350 Plus * Refactor to use flash size menu Replaces separate board entries for Waveshare RP2350 Plus 4MB and 16MB variants with a flash size menu.	2025-06-19 11:55:06 -07:00
wiznet-mason	a7380a5de0	Add support for W6300-EVB-Pico and W6300-EVB-Pico2 boards (#2999 )	2025-06-19 11:16:53 -07:00
Earle F. Philhower, III	878271e122	Verify ADCInput buffer sizes legal for 3 and 4 inputs (#2996 ) Related to #2991, the ADCInput bufferWords needs to be a size that always has the 1st ADC sample at offset 0:0. For 1 and 2 inputs that's guaranteed. For 3 inputs we need a multiple of 3 words to ensure things always align in the case of overflow. For 4 inputs, a multiple of 2 words is needed.	2025-06-16 12:29:12 -07:00
Shubham Patel	1df647a104	Add Waveshare RP2350 LCD 0.96 (#2997 )	2025-06-16 12:18:01 -07:00
Earle F. Philhower, III	f07079bb7d	Remove dead debug code in PIOProgram (#2992 )	2025-06-12 11:15:12 -07:00
Earle F. Philhower, III	e7a23550ce	Update to GCC 14.3, Newlib 4.5.0 (#2975 ) Moves to just released GCC 14.3 Moves to full-fat printf/scanf because Newlib no longer supports all the calls libstdc++ requires with the older, smaller, nano-formatted-io option. Moves to latest SDK develop branch with important float acceleration fixes for the RP2350, among other updates. Moves to latest pioasm, picotool develop branches * SDK was refactored, update the includes * Rebuild PicoSDK and BearSSL libs * Update certs in BSSL validation example * Don't spell check the certs! * Updated tools with full fat++ newlib printf/scanf	2025-06-12 10:54:37 -07:00
Earle F. Philhower, III	0beb2d4ae8	Add SDIO PIN definitions for Adafruit Metro RP2040 (#2989 ) Fixes #2985	2025-06-12 08:16:55 -07:00
Maximilian Gerhardt	4de3ea94a9	Cleanly install PlatformIO platform from scratch (#2982 ) Prevents weird update errors stemming from an already installed platform (cached), then updating some files in it manually and then pio pkg updating it.	2025-06-01 08:08:45 -07:00
Maximilian Gerhardt	68f1da5f94	Mark all boards as picosdk compatible in PlatformIO board definition (#2980 )	2025-05-31 12:19:21 -07:00
Earle F. Philhower, III	948e9bfd22	Clear any existing IP before sending a DHCP request (#2979 ) Fixes #2978	2025-05-31 11:20:14 -07:00
Earle F. Philhower, III	73bd6a0891	Send DHCP request on ::begin even if lease exists (#2977 ) When a link comes up, we were only sending a DHCP request if the existing netif's ipaddress was 0. When a DHCP lease is acquired at first that IP is changed to the given address, and if we do another ::begin we wouldn't dhcp_start to send a new request and use the old one (until its lease expired). In the case of network changing (i.e. WiFiMulti on different nets or moving an Ethernet cable to another router) that old address would not be valid. Track if an IP address has been manually set and use that to determine if DHCP needs to be re-requested instead of looking at the old netif's ipaddress. Fixes #2974	2025-05-31 09:19:42 -07:00
Earle F. Philhower, III	f3df355663	Fix BSTstackLib service UUID reporting to client (#2968 ) Fixes #2967	2025-05-22 12:34:26 -07:00
Earle F. Philhower, III	7dcfe4d483	Update version	2025-05-22 08:19:51 -07:00
Lorandil	3df1392a1b	Added 'TwoWire::setBufferSize()' to Wire library (#2962 ) 'setBufferSize()' allows to modify the receive buffer size (inspired by the ESP32 code)	2025-05-21 13:57:35 -07:00
Earle F. Philhower, III	7c51742522	Add PSRAM option for Adafruit Metro RP2350 (#2961 ) Fixes #2960	2025-05-16 08:34:01 -07:00
Earle F. Philhower, III	08353deb88	Ignore libpico build dirs for git	2025-05-14 15:00:03 -07:00
Earle F. Philhower, III	d5e844b2bd	Panic on stack protector crash instead of exit (#2955 ) Newlib has a stack protector fail handler which write(2)s a message to STDERR which doesn't work here. Override with a call to panic(). Tell GCC to protect all functions for stack protection instead of ones that it heuristically decides need protection. Slower but safer, and only when stack protection is enabled.	2025-05-14 07:38:25 -07:00
Ricardo Marques	de7f1a7e83	Fixed generic PIN_LED and SPI0 Pin assignment on WIZnet W55RP20-EVB-Pico. (#2956 ) * Update pins_arduino.h Changed PIN_LED to match USERLED on PCB. Removed unavailable pins from SPI0 connection. * Update pins_arduino.h Uncommented SPI0 pins and reassigned them over GPIO 2,3,4,5.	2025-05-13 17:18:04 -07:00
jeroenzwanandjeroen	19b14898ea	Add target platform for compiling (#2939 ) * add target platform for compiling * added target specification for riscv --------- Co-authored-by: jeroen <jeroen.zwanepol@tective.nl>	2025-05-09 07:57:50 -07:00
Jan-Philipp	304e9ce2d1	Make Arduino IDE ask for OTA password (#2938 )	2025-05-07 09:03:29 -07:00
Earle F. Philhower, III	2bc00bef57	Fix ADCInput masking (#2937 ) Fixes #2935 The PICO_2350A patch flipped the logic of the ADCInput bitmask calcs causing the 2040 and 2350A to use bitmasks for the 2350B (i.e. wrong GPIOs) and vice versa.	2025-05-05 09:16:29 -07:00
Earle F. Philhower, III	47c2cd2b0b	Update version	2025-05-02 08:59:52 -07:00
Ahmed ARIFandAhmed ARIF	59614a99c8	optimize parity calculations in SerialPIO (#2932 ) (#2933 ) use bit manipulation technique from http://www.graphics.stanford.edu/~seander/bithacks.html#ParityParallel for parity calculation Co-authored-by: Ahmed ARIF <contact@eotics.com>	2025-05-01 14:06:52 -07:00
Earle F. Philhower, III	227d71ed18	Fix RP2350B SPI RX pin list (#2931 ) Fixes #2930	2025-04-29 16:29:45 -07:00
Earle F. Philhower, III	5e74bbbbb2	Rewrite SerialPIO receive path, ensure proper edge (#2929 ) The SerialPIO(SoftwareSerial) receive path was convoluted and required a lot of work on the host to get the actual data out. It also wasn't always sampling on the proper edge leading to errors whenever clocks or hold times shifted slightly. Rewrite the SerialPIO RX path to explicitily wait for start bit, pause 1/2 bit time, then idle for a full bit time for all bits. Takes more PIO instruction memory but works flawlessly even with mismatched clocks. Tested with a loopback from HW UART to SW UART with a 5% clock mismatch @ 19200 baud without reception errors, whereas the original code would fail with less than a 0.5% variation. Fixes #2928 ```` SoftwareSerial s(15, -1); void setup() { Serial1.setTX(0); Serial1.begin(19200 + 1920/2, SERIAL_8N1); s.begin(19200, SERIAL_8N1); } void loop() { Serial.println("---"); Serial1.write("Had we but world enough and time", 32); uint32_t now = millis(); while (millis() - now < 500) { while (s.available()) { auto c = s.read(); Serial.printf("%02x '%c'\n", c, c); } } } ````	2025-04-29 13:39:34 -07:00
Earle F. Philhower, III	8d58a9207f	Update LittleFS and Adafruit USB libraries (#2919 ) Only very minor changes to the submodules were noted. Should not have any effect on this core.	2025-04-18 18:00:56 -07:00
Earle F. Philhower, III	bc5b2c24ff	Fix rp2040.getCycleCount() from core1 (#2915 ) Fixes #2914 There are 2 systick units, one per core. Set up and start core1's systick unit and track each core's epoch separately. Document a method of preserving 100% user-only code on core1 and add a core1_disable_systick boolean flag that works like the separate stack one.	2025-04-18 09:16:36 -07:00
Wai WengandKong Wai Weng	40b9d5b07e	Add pin definitions for I2C1 on Cytron IRIV (#2916 ) Co-authored-by: Kong Wai Weng <waiweng@cytron.io>	2025-04-18 08:59:23 -07:00
Earle F. Philhower, III	07ea22d877	Generate PWMAudio pacer frequencies for 176/276MHz (#2913 ) Overclock settings changed, need to update the precalculated pacer fractions for PWMAudio.	2025-04-17 08:21:14 -07:00
Earle F. Philhower, III	253e946dcb	Update tools README.md	2025-04-17 07:04:26 -07:00
Earle F. Philhower, III	60d28d6c92	Add PIO.h header verification to CI (#2911 ) * Add PIO.h header verification to CI Ensure all PIO .pio.h headers match the .pio sources in the tree * Install all tools for Style check * Clean up mismatched PIO headers No functional changes, but the PDM pdm.pio file did not init a data pin while the pdm.pio.h (the one actually used in the core) did. Correct to match. * No need for submodules in the style check	2025-04-16 14:56:31 -07:00