Update version

Update PIO USB docs, fixup used VID/PID macros (#2505 )
Update PIO platform before compile, add RISC-V PIO build to CI (#2504 )
2024-10-01 09:25:29 -07:00 · 2024-09-30 09:57:21 -07:00 · 2024-09-30 09:41:16 -07:00 · 2024-09-29 15:10:36 -07:00 · 2024-09-24 06:59:23 -07:00 · 2024-09-24 06:58:41 -07:00
134 changed files with 22483 additions and 754 deletions
@@ -17,7 +17,7 @@ jobs:
      with:
        submodules: false
    - name: Run codespell
-      uses: codespell-project/actions-codespell@master
+      uses: codespell-project/actions-codespell@v2
      with:
        skip: ./ArduinoCore-API,./libraries/ESP8266SdFat,./libraries/Adafruit_TinyUSB_Arduino,./libraries/LittleFS/lib,./tools/pyserial,./pico-sdk,./.github,./docs/i2s.rst,./cores/rp2040/api,./libraries/FreeRTOS,./tools/libbearssl/bearssl,./include,./libraries/WiFi/examples/BearSSL_Server,./ota/uzlib,./libraries/http-parser/lib,./libraries/WebServer/examples/HelloServerBearSSL/HelloServerBearSSL.ino,./libraries/HTTPUpdateServer/examples/SecureBearSSLUpdater/SecureBearSSLUpdater.ino,./.git,./libraries/FatFS/lib/fatfs,./libraries/FatFS/src/diskio.h,./libraries/FatFS/src/ff.cpp,./libraries/FatFS/src/ffconf.h,./libraries/FatFS/src/ffsystem.cpp,./libraries/FatFS/src/ff.h,./libraries/lwIP_WINC1500/src/driver,./libraries/lwIP_WINC1500/src/common,./libraries/lwIP_WINC1500/src/bus_wrapper,./libraries/lwIP_WINC1500/src/spi_flash
        ignore_words_list: ser,dout,shiftIn,acount
@@ -101,6 +101,37 @@ jobs:
        cd ..
        bash ./tests/build-rp2350.sh

+# Build all rp2350-riscv examples on linux (core and Arduino IDE)
+  build-rp2350-riscv-linux:
+    name: Build RP2350-RISCV ${{ matrix.chunk }}
+    runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        chunk: [0, 1, 2, 3, 4, 5]
+    steps:
+    - uses: actions/checkout@v4
+      with:
+        submodules: true
+    - uses: actions/setup-python@v5
+      with:
+        python-version: '3.x'
+    - name: Cache Linux toolchain
+      id: cache-linux
+      uses: actions/cache@v4
+      with:
+        path: ./tools/dist
+        key: ${{ runner.os }}-${{ hashFiles('package/package_pico_index.template.json', 'tests/common.sh') }}
+    - name: Build Sketches
+      env:
+        BUILD_PARITY: custom
+        mod: 6
+        rem: ${{ matrix.chunk }}
+      run: |
+        cd pico-sdk
+        git submodule update --init
+        cd ..
+        bash ./tests/build-rp2350-riscv.sh
+
 # Build TinyUSB examples, requires custom build command line
  build-tinyusb:
    name: Build TinyUSB Examples
@@ -234,10 +265,13 @@ jobs:
        python -m pip install --upgrade pip
        pip install --upgrade platformio
        pio pkg install --global --platform https://github.com/maxgerhardt/platform-raspberrypi.git
+        pio pkg update --global --platform https://github.com/maxgerhardt/platform-raspberrypi.git
        pio pkg install --global --tool symlink://.
        cp -f /home/runner/work/arduino-pico/arduino-pico/tools/json/*.json /home/runner/.platformio/platforms/raspberrypi/boards/.
    - name: Build Multicore Example
      run: pio ci -v --board=rpipico --board=rpipico2 --board=adafruit_feather -O "platform_packages=framework-arduinopico@symlink:///home/runner/work/arduino-pico/arduino-pico" libraries/rp2040/examples/Multicore/Multicore.ino
+    - name: Build Multicore Example (RISC-V)
+      run: pio ci -v --board=rpipico2 -O "board_build.mcu = rp2350-riscv" -O "platform_packages=framework-arduinopico@symlink:///home/runner/work/arduino-pico/arduino-pico" libraries/rp2040/examples/Multicore/Multicore.ino
    - name: Build Fade Example
      run: pio ci --board=rpipico --board=adafruit_feather -O "platform_packages=framework-arduinopico@symlink:///home/runner/work/arduino-pico/arduino-pico" libraries/rp2040/examples/Fade/Fade.ino
    - name: Build TinyUSB Example
@@ -46,3 +46,6 @@
 [submodule "cores/rp2040/tlsf"]
 	path = lib/tlsf
 	url = https://github.com/earlephilhower/tlsf.git
+[submodule "libraries/ESPHost"]
+	path = libraries/ESPHost
+	url = https://github.com/Networking-for-Arduino/ESPHost.git
@@ -4,7 +4,7 @@

 Raspberry Pi Pico Arduino core, for all RP2040 and RP2350 boards

-This is a port of Arduino to the RP2040 (Raspberry Pi Pico processor) and RP2350 (Raspberry Pi Pico 2 processor). It uses the bare Raspberry Pi Pico SDK and a custom GCC 12.3/Newlib 4.0 toolchain.
+This is a port of Arduino to the RP2040 (Raspberry Pi Pico processor) and RP2350 (Raspberry Pi Pico 2 processor). It uses the bare Raspberry Pi Pico SDK and a custom GCC 14.2/Newlib 4.3 toolchain and supports ARM and RISC-V cores.

 # Documentation
 See https://arduino-pico.readthedocs.io/en/latest/ along with the examples for more detailed usage information.
@@ -40,7 +40,8 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Cytron Maker Nano RP2040
 * Cytron Maker Uno RP2040
 * Cytron Motion 2350 Pro
-* DatanoiseTV PicoADK+
+* Datanoise PicoADK v1
+* Datanoise PicoADK v2 (RP2350)
 * Degz Suibo RP2040
 * DeRuiLab FlyBoard2040 Core
 * DFRobot Beetle RP2040
@@ -125,6 +126,7 @@ Read the [Contributing Guide](https://github.com/earlephilhower/arduino-pico/blo
 * Peripherals:  SPI master/slave, Wire(I2C) master/slave, dual UART, emulated EEPROM, I2S audio input/output, Servo
 * printf (i.e. debug) output over USB serial
 * Transparent use of PSRAM globals and heap (RP2350 only)
+* ARM or RISC-V (Hazard3) support for The RP2350

 The RP2040 PIO state machines (SMs) are used to generate jitter-free:
 * Servos
@@ -261,6 +263,7 @@ The installed tools include a version of OpenOCD (in the pqt-openocd directory)
 * [Xoshiro-cpp](https://github.com/Reputeless/Xoshiro-cpp) is copyright (c) 2020 Ryo Suzuki and distributed under the MIT license.
 * [FatFS low-level filesystem](http://elm-chan.org/fsw/ff/) code is Copyright (C) 2024, ChaN, all rights reserved.
 * [TLSF memory manager for PSRAM from Espressif fork](https://github.com/espressif/tlsf) of [original](https://github.com/mattconte/tlsf) by Matthew Conte is copyright Matthew Conte and licensed under the MIT license.
+* [ESPHost library](https://github.com/Networking-for-Arduino/ESPHost) is LGPL licensed by its maintainers.

 -Earle F. Philhower, III  
 earlephilhower@yahoo.com
@@ -0,0 +1,4 @@
+.section .boot2, "ax"
+
+.global __boot2_entry_point
+__boot2_entry_point:
@@ -1,25 +0,0 @@
-// Padded and checksummed version of: boot2_generic_03h.2.bin
-
-.cpu cortex-m0plus
-.thumb
-
-.section .boot2, "ax"
-
-.global __boot2_entry_point
-__boot2_entry_point:
-.byte 0x00, 0xb5, 0x05, 0x4b, 0x05, 0x48, 0xd8, 0x60, 0x4f, 0xf0, 0x03, 0x00, 0x58, 0x61, 0x4f, 0xf4
-.byte 0x80, 0x50, 0x18, 0x61, 0x00, 0xbd, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x40, 0x02, 0x01, 0x00, 0x40
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
@@ -1,25 +0,0 @@
-// Padded and checksummed version of: boot2_generic_03h.4.bin
-
-.cpu cortex-m0plus
-.thumb
-
-.section .boot2, "ax"
-
-.global __boot2_entry_point
-__boot2_entry_point:
-.byte 0x00, 0xb5, 0x05, 0x4b, 0x05, 0x48, 0xd8, 0x60, 0x4f, 0xf0, 0x03, 0x00, 0x58, 0x61, 0x4f, 0xf4
-.byte 0x80, 0x50, 0x18, 0x61, 0x00, 0xbd, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x40, 0x04, 0x01, 0x00, 0x40
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
@@ -1,25 +0,0 @@
-// Padded and checksummed version of: boot2_w25q080.2.bin
-
-.cpu cortex-m0plus
-.thumb
-
-.section .boot2, "ax"
-
-.global __boot2_entry_point
-__boot2_entry_point:
-.byte 0x00, 0xb5, 0x24, 0x4b, 0x21, 0x20, 0x58, 0x60, 0x13, 0xf5, 0x40, 0x53, 0x02, 0x20, 0x98, 0x60
-.byte 0xd8, 0x60, 0x18, 0x61, 0x58, 0x61, 0x13, 0xf5, 0x0d, 0x23, 0x1f, 0x49, 0x19, 0x60, 0x18, 0x68
-.byte 0x10, 0xf0, 0x02, 0x0f, 0xfb, 0xd1, 0x35, 0x20, 0x00, 0xf0, 0x2c, 0xf8, 0x02, 0x28, 0x14, 0xd0
-.byte 0x06, 0x20, 0x58, 0x60, 0x00, 0xf0, 0x22, 0xf8, 0x98, 0x68, 0x01, 0x20, 0x58, 0x60, 0x00, 0x20
-.byte 0x58, 0x60, 0x02, 0x20, 0x58, 0x60, 0x00, 0xf0, 0x19, 0xf8, 0x98, 0x68, 0x98, 0x68, 0x98, 0x68
-.byte 0x05, 0x20, 0x00, 0xf0, 0x17, 0xf8, 0x40, 0x08, 0xfa, 0xd2, 0x31, 0xf0, 0x01, 0x01, 0x19, 0x60
-.byte 0x0e, 0x48, 0xd8, 0x60, 0x4a, 0xf2, 0xeb, 0x00, 0x58, 0x61, 0x0d, 0x48, 0x18, 0x61, 0x4f, 0xf0
-.byte 0xa0, 0x51, 0x09, 0x78, 0x20, 0xf4, 0x80, 0x50, 0x18, 0x61, 0x00, 0xbd, 0x18, 0x68, 0x80, 0x08
-.byte 0xfc, 0xd2, 0x70, 0x47, 0x00, 0xb5, 0x58, 0x60, 0x58, 0x60, 0xff, 0xf7, 0xf7, 0xff, 0x98, 0x68
-.byte 0x98, 0x68, 0x00, 0xbd, 0x00, 0x00, 0x04, 0x40, 0x41, 0x00, 0x80, 0x07, 0x02, 0x02, 0x00, 0x40
-.byte 0xa8, 0x92, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
@@ -1,25 +0,0 @@
-// Padded and checksummed version of: boot2_w25q080.4.bin
-
-.cpu cortex-m0plus
-.thumb
-
-.section .boot2, "ax"
-
-.global __boot2_entry_point
-__boot2_entry_point:
-.byte 0x00, 0xb5, 0x24, 0x4b, 0x21, 0x20, 0x58, 0x60, 0x13, 0xf5, 0x40, 0x53, 0x02, 0x20, 0x98, 0x60
-.byte 0xd8, 0x60, 0x18, 0x61, 0x58, 0x61, 0x13, 0xf5, 0x0d, 0x23, 0x1f, 0x49, 0x19, 0x60, 0x18, 0x68
-.byte 0x10, 0xf0, 0x02, 0x0f, 0xfb, 0xd1, 0x35, 0x20, 0x00, 0xf0, 0x2c, 0xf8, 0x02, 0x28, 0x14, 0xd0
-.byte 0x06, 0x20, 0x58, 0x60, 0x00, 0xf0, 0x22, 0xf8, 0x98, 0x68, 0x01, 0x20, 0x58, 0x60, 0x00, 0x20
-.byte 0x58, 0x60, 0x02, 0x20, 0x58, 0x60, 0x00, 0xf0, 0x19, 0xf8, 0x98, 0x68, 0x98, 0x68, 0x98, 0x68
-.byte 0x05, 0x20, 0x00, 0xf0, 0x17, 0xf8, 0x40, 0x08, 0xfa, 0xd2, 0x31, 0xf0, 0x01, 0x01, 0x19, 0x60
-.byte 0x0e, 0x48, 0xd8, 0x60, 0x4a, 0xf2, 0xeb, 0x00, 0x58, 0x61, 0x0d, 0x48, 0x18, 0x61, 0x4f, 0xf0
-.byte 0xa0, 0x51, 0x09, 0x78, 0x20, 0xf4, 0x80, 0x50, 0x18, 0x61, 0x00, 0xbd, 0x18, 0x68, 0x80, 0x08
-.byte 0xfc, 0xd2, 0x70, 0x47, 0x00, 0xb5, 0x58, 0x60, 0x58, 0x60, 0xff, 0xf7, 0xf7, 0xff, 0x98, 0x68
-.byte 0x98, 0x68, 0x00, 0xbd, 0x00, 0x00, 0x04, 0x40, 0x41, 0x00, 0x80, 0x07, 0x04, 0x02, 0x00, 0x40
-.byte 0xa8, 0x92, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
@@ -0,0 +1,4 @@
+.section .boot2, "ax"
+
+.global __boot2_entry_point
+__boot2_entry_point:
@@ -37,7 +37,7 @@
 #ifdef abs
 #undef abs
 #endif // abs
-#ifdef __cplusplus
+#if defined(__cplusplus) && !defined(__riscv)
 using std::abs;
 using std::round;
 #else
@@ -26,7 +26,9 @@ static bool __no_inline_not_in_flash_func(get_bootsel_button)() {

    // Must disable interrupts, as interrupt handlers may be in flash, and we
    // are about to temporarily disable flash access!
-    noInterrupts();
+    if (!__isFreeRTOS) {
+        noInterrupts();
+    }
    rp2040.idleOtherCore();

    // Set chip select to Hi-Z
@@ -53,7 +55,9 @@ static bool __no_inline_not_in_flash_func(get_bootsel_button)() {
                    IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_BITS);

    rp2040.resumeOtherCore();
-    interrupts();
+    if (!__isFreeRTOS) {
+        interrupts();
+    }

    return button_state;
 }
@@ -175,18 +175,22 @@ public:

    void begin() {
        _epoch = 0;
+#if !defined(__riscv)
        if (!__isFreeRTOS) {
            // Enable SYSTICK exception
            exception_set_exclusive_handler(SYSTICK_EXCEPTION, _SystickHandler);
            systick_hw->csr = 0x7;
            systick_hw->rvr = 0x00FFFFFF;
        } else {
+#endif
            int off = 0;
            _ccountPgm = new PIOProgram(&ccount_program);
            _ccountPgm->prepare(&_pio, &_sm, &off);
            ccount_program_init(_pio, _sm, off);
            pio_sm_set_enabled(_pio, _sm, true);
+#if !defined(__riscv)
        }
+#endif
    }

    // Convert from microseconds to PIO clock cycles
@@ -208,6 +212,7 @@ public:
    // Get CPU cycle count.  Needs to do magic to extens 24b HW to something longer
    volatile uint64_t _epoch = 0;
    inline uint32_t getCycleCount() {
+#if !defined(__riscv)
        if (!__isFreeRTOS) {
            uint32_t epoch;
            uint32_t ctr;
@@ -217,11 +222,15 @@ public:
            } while (epoch != (uint32_t)_epoch);
            return epoch + (1 << 24) - ctr; /* CTR counts down from 1<<24-1 */
        } else {
+#endif
            return ccount_read(_pio, _sm);
+#if !defined(__riscv)
        }
+#endif
    }

    inline uint64_t getCycleCount64() {
+#if !defined(__riscv)
        if (!__isFreeRTOS) {
            uint64_t epoch;
            uint64_t ctr;
@@ -231,8 +240,11 @@ public:
            } while (epoch != _epoch);
            return epoch + (1LL << 24) - ctr;
        } else {
+#endif
            return ccount_read(_pio, _sm);
+#if !defined(__riscv)
        }
+#endif
    }

    inline int getFreeHeap() {
@@ -1,5 +1,5 @@
 #pragma once
 #define ARDUINO_PICO_MAJOR 4
-#define ARDUINO_PICO_MINOR 0
-#define ARDUINO_PICO_REVISION 2
-#define ARDUINO_PICO_VERSION_STR "4.0.2"
+#define ARDUINO_PICO_MINOR 1
+#define ARDUINO_PICO_REVISION 0
+#define ARDUINO_PICO_VERSION_STR "4.1.0"
@@ -79,9 +79,9 @@ static int _parity(int bits, int data) {

 // We need to cache generated SerialPIOs so we can add data to them from
 // the shared handler
-static SerialPIO *_pioSP[2][4];
+static SerialPIO *_pioSP[3][4];
 static void __not_in_flash_func(_fifoIRQ)() {
-    for (int p = 0; p < 2; p++) {
+    for (int p = 0; p < 3; p++) {
        for (int sm = 0; sm < 4; sm++) {
            SerialPIO *s = _pioSP[p][sm];
            if (s) {
@@ -148,6 +148,21 @@ SerialPIO::~SerialPIO() {
    delete[] _queue;
 }

+static int pio_irq_0(PIO p) {
+    switch (pio_get_index(p)) {
+    case 0:
+        return PIO0_IRQ_0;
+    case 1:
+        return PIO1_IRQ_0;
+#if defined(PICO_RP2350)
+    case 2:
+        return PIO2_IRQ_0;
+#endif
+    default:
+        return -1;
+    }
+}
+
 void SerialPIO::begin(unsigned long baud, uint16_t config) {
    _overflow = false;
    _baud = baud;
@@ -247,7 +262,7 @@ void SerialPIO::begin(unsigned long baud, uint16_t config) {
        case 2: pio_set_irq0_source_enabled(_rxPIO, pis_sm2_rx_fifo_not_empty, true); break;
        case 3: pio_set_irq0_source_enabled(_rxPIO, pis_sm3_rx_fifo_not_empty, true); break;
        }
-        auto irqno = pio_get_index(_rxPIO) == 0 ? PIO0_IRQ_0 : PIO1_IRQ_0;
+        auto irqno = pio_irq_0(_rxPIO);
        irq_set_exclusive_handler(irqno, _fifoIRQ);
        irq_set_enabled(irqno, true);

@@ -278,7 +293,7 @@ void SerialPIO::end() {
            used = used || !!_pioSP[pioNum][i];
        }
        if (!used) {
-            auto irqno = pioNum == 0 ? PIO0_IRQ_0 : PIO1_IRQ_0;
+            auto irqno = pio_irq_0(_rxPIO);
            irq_set_enabled(irqno, false);
        }
        gpio_set_inover(_rx, 0);
@@ -32,7 +32,7 @@ extern void serialEvent1() __attribute__((weak));
 extern void serialEvent2() __attribute__((weak));

 bool SerialUART::setRX(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({1, 13, 17, 29, 33, 45}) /* UART0 */,
                                    __bitset({5, 9, 21, 25, 37, 41})  /* UART1 */
                                  };
@@ -59,7 +59,7 @@ bool SerialUART::setRX(pin_size_t pin) {
 }

 bool SerialUART::setTX(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({0, 12, 16, 28, 32, 44}) /* UART0 */,
                                    __bitset({4, 8, 20, 24, 36, 40})  /* UART1 */
                                  };
@@ -86,7 +86,7 @@ bool SerialUART::setTX(pin_size_t pin) {
 }

 bool SerialUART::setRTS(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({3, 15, 19, 31, 35, 47}) /* UART0 */,
                                    __bitset({7, 11, 23, 27, 39, 43})  /* UART1 */
                                  };
@@ -113,7 +113,7 @@ bool SerialUART::setRTS(pin_size_t pin) {
 }

 bool SerialUART::setCTS(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({2, 14, 18, 30, 34, 46}) /* UART0 */,
                                    __bitset({6, 10, 22, 26, 38, 42})  /* UART1 */
                                  };
@@ -31,7 +31,7 @@ typedef struct {
 static FMMap *_map = nullptr;
 SemaphoreHandle_t __get_freertos_mutex_for_ptr(mutex_t *m, bool recursive) {
    if (!_map) {
-        _map = (FMMap *)calloc(sizeof(FMMap), 16);
+        _map = (FMMap *)calloc(16, sizeof(FMMap));
    }
    // Pre-existing map
    for (int i = 0; i < 16; i++) {
@@ -54,5 +54,8 @@ extern "C" {

    extern void __freertos_idle_other_core() __attribute__((weak));
    extern void __freertos_resume_other_core() __attribute__((weak));
+
+    extern void __freertos_task_exit_critical() __attribute__((weak));
+    extern void __freertos_task_enter_critical() __attribute__((weak));
 }
 extern SemaphoreHandle_t __get_freertos_mutex_for_ptr(mutex_t *m, bool recursive = false);
@@ -99,7 +99,7 @@ static SemaphoreHandle_t __getFreeRTOSRecursiveMutex(_LOCK_T lock) {
    return __get_freertos_mutex_for_ptr((mutex_t *)l, true);
 }

-void __retarget_lock_init(_LOCK_T *lock) {
+void __retarget_lock_init(_LOCK_T lock) {
    if (__freeRTOSinitted) {
        mutex_t *l = (mutex_t *)lock;
        if ((l == &__lock___at_quick_exit_mutex) || (l == &__lock___tz_mutex) || (l == &__lock___dd_hash_mutex) || (l == &__lock___arc4random_mutex)) {
@@ -113,7 +113,7 @@ void __retarget_lock_init(_LOCK_T *lock) {
    }
 }

-void __retarget_lock_init_recursive(_LOCK_T *lock) {
+void __retarget_lock_init_recursive(_LOCK_T lock) {
    if (__freeRTOSinitted) {
        recursive_mutex_t *l = (recursive_mutex_t *)lock;
        if ((l == &__lock___sinit_recursive_mutex) || (l == &__lock___sfp_recursive_mutex) || (l == &__lock___atexit_recursive_mutex) || (l == &__lock___malloc_recursive_mutex) || (l == &__lock___env_recursive_mutex)) {
@@ -88,7 +88,7 @@ extern "C" int main() {

    // Allocate impure_ptr (newlib temps) if there is a 2nd core running
    if (!__isFreeRTOS && (setup1 || loop1)) {
-        _impure_ptr1 = (struct _reent*)calloc(sizeof(struct _reent), 1);
+        _impure_ptr1 = (struct _reent*)calloc(1, sizeof(struct _reent));
        _REENT_INIT_PTR(_impure_ptr1);
    }

@@ -134,7 +134,6 @@ extern "C" int main() {
        }
        rp2040.fifo.registerCore();
    }
-
    if (!__isFreeRTOS) {
        if (setup1 || loop1) {
            delay(1); // Needed to make Picoprobe upload start 2nd core
@@ -88,7 +88,7 @@ extern "C" void *__wrap_realloc(void *mem, size_t size) {
    void *rc;
    noInterrupts();
 #ifdef RP2350_PSRAM_CS
-    if (mem < __ram_start) {
+    if (mem && (mem < __ram_start)) {
        rc = __psram_realloc(mem, size);
    } else {
        rc = __real_realloc(mem, size);
@@ -103,7 +103,7 @@ extern "C" void *__wrap_realloc(void *mem, size_t size) {
 extern "C" void __wrap_free(void *mem) {
    noInterrupts();
 #ifdef RP2350_PSRAM_CS
-    if (mem < __ram_start) {
+    if (mem && (mem < __ram_start)) {
        __psram_free(mem);
    } else {
        __real_free(mem);
@@ -49,11 +49,15 @@ static uint32_t pico_flash_bank_get_alignment(void * context) {
 static void pico_flash_bank_erase(void * context, int bank) {
    (void)(context);
    DEBUG_PRINT("erase: bank %d\n", bank);
-    noInterrupts();
+    if (!__isFreeRTOS) {
+        noInterrupts();
+    }
    rp2040.idleOtherCore();
    flash_range_erase(PICO_FLASH_BANK_STORAGE_OFFSET + (PICO_FLASH_BANK_SIZE * bank), PICO_FLASH_BANK_SIZE);
    rp2040.resumeOtherCore();
-    interrupts();
+    if (!__isFreeRTOS) {
+        interrupts();
+    }
 }

 static void pico_flash_bank_read(void *context, int bank, uint32_t offset, uint8_t *buffer, uint32_t size) {
@@ -147,11 +151,15 @@ static void pico_flash_bank_write(void * context, int bank, uint32_t offset, con
        offset = 0;

        // Now program the entire page
-        noInterrupts();
+        if (!__isFreeRTOS) {
+            noInterrupts();
+        }
        rp2040.idleOtherCore();
        flash_range_program(bank_start_pos + (page * FLASH_PAGE_SIZE), page_data, FLASH_PAGE_SIZE);
        rp2040.resumeOtherCore();
-        interrupts();
+        if (!__isFreeRTOS) {
+            interrupts();
+        }
    }
 }

@@ -23,6 +23,8 @@
 #include <hardware/gpio.h>
 #include <hardware/sync.h>
 #include <map>
+#include "_freertos.h"
+

 // Support nested IRQ disable/re-enable
 #ifndef maxIRQs
@@ -32,22 +34,29 @@ static uint32_t _irqStackTop[2] = { 0, 0 };
 static uint32_t _irqStack[2][maxIRQs];

 extern "C" void interrupts() {
-    auto core = get_core_num();
-    if (!_irqStackTop[core]) {
-        // ERROR
-        return;
+    if (__freeRTOSinitted) {
+        __freertos_task_exit_critical();
+    } else {
+        auto core = get_core_num();
+        if (!_irqStackTop[core]) {
+            // ERROR
+            return;
+        }
+        restore_interrupts(_irqStack[core][--_irqStackTop[core]]);
    }
-    restore_interrupts(_irqStack[core][--_irqStackTop[core]]);
 }

 extern "C" void noInterrupts() {
-    auto core = get_core_num();
-    if (_irqStackTop[core] == maxIRQs) {
-        // ERROR
-        panic("IRQ stack overflow");
+    if (__freeRTOSinitted) {
+        __freertos_task_enter_critical();
+    } else {
+        auto core = get_core_num();
+        if (_irqStackTop[core] == maxIRQs) {
+            // ERROR
+            panic("IRQ stack overflow");
+        }
+        _irqStack[core][_irqStackTop[core]++] = save_and_disable_interrupts();
    }
-
-    _irqStack[core][_irqStackTop[core]++] = save_and_disable_interrupts();
 }

 // Only 1 GPIO IRQ callback for all pins, so we need to look at the pin it's for and
@@ -54,9 +54,9 @@ author = u'Earle F. Philhower, III'
 # built documents.
 #
 # The short X.Y version.
-version = u'4.0.2'
+version = u'4.1.0'
 # The full version, including alpha/beta/rc tags.
-release = u'4.0.2'
+release = u'4.1.0'

 # The language for content autogenerated by Sphinx. Refer to documentation
 # for a list of supported languages.
@@ -1,8 +1,6 @@
 FreeRTOS SMP
 ============

-**NOTE:** FreeRTOS is not yet supported on the RP2350.  PRs gladly accepted!
-
 The SMP (multicore) port of FreeRTOS is included with the core.  This allows complex
 task operations and real preemptive multithreading in your sketches.  While the
 ``setup1`` and ``loop1`` way of multitasking is simplest for most folks, FreeRTOS
@@ -7,7 +7,7 @@ RP2040 (Raspberry Pi Pico processor) and RP2350 (Raspberry Pi Pico 2
 processor), intended to make it easier and more fun to use and
 program the Raspberry Pi Pico / RP2040 / RP2350 based boards.

-This Arduino core uses a custom toolset with GCC 12.3 and Newlib 4.0.0
+This Arduino core uses a custom toolset with GCC 14.2 and Newlib 4.3
 and doesn't require any system-installed prerequisites.

 For the latest version, always check https://github.com/earlephilhower/arduino-pico
@@ -1,8 +1,6 @@
 OTA Updates
 ===========

-**NOTE:** OTA is not yet supported on the RP2350.  PRs gladly accepted!
-
 Introduction
 ------------

@@ -262,6 +262,18 @@ default Pico SDK USB stack. To change it, add
 Note that the special "No USB" setting is also supported, through the
 shortcut-define ``PIO_FRAMEWORK_ARDUINO_NO_USB``.

+USB Customization
+-----------------
+
+If you want to change the USB VID, PID, product or manufacturer name that the device will appear under, configure them as follows:
+
+.. code:: ini
+
+    board_build.arduino.earlephilhower.usb_manufacturer = Custom Manufacturer
+    board_build.arduino.earlephilhower.usb_product = Ultra Cool Product
+    board_build.arduino.earlephilhower.usb_vid = 0xABCD
+    board_build.arduino.earlephilhower.usb_pid = 0x1337
+
 IP Stack
 --------

@@ -309,6 +321,19 @@ local copy of the core (with e.g. some modifications) on disk (`see documentatio
 Note that this can only be done for versions that have the PlatformIO
 builder script it in, so versions before 1.9.2 are not supported.

+Selecting the CPU architecture
+------------------------------
+
+By default Platform.IO will build for the onboard ARM cores on the RP2350.  To build RISC-V binaries
+adjust the ``board_build.mcu`` option accordingly:
+
+.. code:: ini
+
+    ; RP2350 based (RISC-V)
+    [env:rpipico2-riscv]
+    board = rpipico2
+    board_build.mcu = rp2350-riscv
+
 Examples
 --------

@@ -6,8 +6,14 @@ is supported by the core with some minor caveats:

 * PSRAM is supported via a new ``pmalloc`` call and ``PSRAM`` variable decorator.
 * Both RP2350A and RP2350B (48 GPIOs) are supported.
-* Only ARM mode is available.  For RISC-V (Hazard3), please use the raw SDK.
-* FreeRTOS and OTA are not yet supported.
+
+ARM and RISC-V Modes
+~~~~~~~~~~~~~~~~~~~~
+
+Either set of cores can be used on the RP2350, ARM Cortex-M33 or RISC-V Hazard3.
+Select the desired core from the IDE menus under ``Tools->CPU Architecture``.
+As of the initial release, all libraries should work under the new RISC-V mode with
+the exception of FreeRTOS.  If not, patches are always welcome.

 P2350-E9 Errata ("Increased leakage current on Bank 0 GPIO when pad input is enabled")
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -1,2 +1,2 @@
 // Do not edit -- Automatically generated by tools/sdk/ssl/bearssl/Makefile
-#define BEARSSL_GIT c2c9d9d
+#define BEARSSL_GIT 5b7f3d5
@@ -42,6 +42,7 @@
 -iwithprefixbefore/pico-sdk/src/rp2_common/hardware_vreg/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/hardware_watchdog/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/hardware_xosc/include
+-iwithprefixbefore/pico-sdk/src/rp2_common/pico_aon_timer/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_async_context/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_bootrom/include
 -iwithprefixbefore/pico-sdk/src/rp2_common/pico_double/include
@@ -0,0 +1,336 @@
+/* Based on GCC ARM embedded samples.
+   Defines the following symbols for use by code:
+    __exidx_start
+    __exidx_end
+    __etext
+    __data_start__
+    __preinit_array_start
+    __preinit_array_end
+    __init_array_start
+    __init_array_end
+    __fini_array_start
+    __fini_array_end
+    __data_end__
+    __bss_start__
+    __bss_end__
+    __end__
+    end
+    __HeapLimit
+    __StackLimit
+    __StackTop
+    __stack (== StackTop)
+*/
+
+
+
+
+MEMORY
+{
+    FLASH(rx) : ORIGIN = 0x10000000, LENGTH = __FLASH_LENGTH__
+    PSRAM(rwx) : ORIGIN = 0x11000000, LENGTH = __PSRAM_LENGTH__
+    RAM(rwx) : ORIGIN =  0x20000000, LENGTH = __RAM_LENGTH__
+    SCRATCH_X(rwx) : ORIGIN = 0x20080000, LENGTH = 4k
+    SCRATCH_Y(rwx) : ORIGIN = 0x20081000, LENGTH = 4k
+}
+
+PROVIDE ( _EEPROM_start = __EEPROM_START__ );
+PROVIDE ( _FS_start     = __FS_START__ );
+PROVIDE ( _FS_end       = __FS_END__ );
+
+ENTRY(_entry_point)
+
+SECTIONS
+{
+    .flash_begin : {
+        __flash_binary_start = .;
+    } > FLASH
+
+    .ota : {
+        /* Start image with OTA */
+        KEEP (*(.OTA))
+        *ota.o
+    } > FLASH
+
+    .partition : {
+        . = __flash_binary_start + 0x2ff0;
+        LONG(__FS_START__)
+        LONG(__FS_END__)
+        LONG(__EEPROM_START__)
+        LONG(__FLASH_LENGTH__)
+    } > FLASH
+
+    /* The bootrom will enter the image at the point indicated in your
+       IMAGE_DEF, which is usually the reset handler of your vector table.
+
+       The debugger will use the ELF entry point, which is the _entry_point
+       symbol, and in our case is *different from the bootrom's entry point.*
+       This is used to go back through the bootrom on debugger launches only,
+       to perform the same initial flash setup that would be performed on a
+       cold boot.
+    */
+
+    .text : {
+        KEEP (*(.vectors))
+        __logical_binary_start = .;
+        KEEP (*(.binary_info_header))
+        __binary_info_header_end = .;
+        KEEP (*(.embedded_block))
+        __embedded_block_end = .;
+        KEEP (*(.reset))
+        /* TODO revisit this now memset/memcpy/float in ROM */
+        /* bit of a hack right now to exclude all floating point and time critical (e.g. memset, memcpy) code from
+         * FLASH ... we will include any thing excluded here in .data below by default */
+        *(.init)
+        *libgcc.a:cmse_nonsecure_call.o
+        *(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a:) .text*)
+        *(.fini)
+        /* Pull all c'tors into .text */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+        /* Followed by destructors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(SORT(.preinit_array.*)))
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        *(SORT(.fini_array.*))
+        *(.fini_array)
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        *(.eh_frame*)
+        . = ALIGN(4);
+    } > FLASH
+
+    /* Note the boot2 section is optional, and should be discarded if there is
+       no reference to it *inside* the binary, as it is not called by the
+       bootrom. (The bootrom performs a simple best-effort XIP setup and
+       leaves it to the binary to do anything more sophisticated.) However
+       there is still a size limit of 256 bytes, to ensure the boot2 can be
+       stored in boot RAM.
+
+       Really this is a "XIP setup function" -- the name boot2 is historic and
+       refers to its dual-purpose on RP2040, where it also handled vectoring
+       from the bootrom into the user image.
+    */
+/*
+    .boot2 : {
+        __boot2_start__ = .;
+        *(.boot2)
+        __boot2_end__ = .;
+    } > FLASH
+
+    ASSERT(__boot2_end__ - __boot2_start__ <= 256,
+        "ERROR: Pico second stage bootloader must be no more than 256 bytes in size")
+*/
+    .rodata : {
+        *(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a:) .rodata*)
+        *(.srodata*)
+        . = ALIGN(4);
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.flashdata*)))
+        . = ALIGN(4);
+    } > FLASH
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > FLASH
+    __exidx_end = .;
+
+    /* Machine inspectable binary information */
+    . = ALIGN(4);
+    __binary_info_start = .;
+    .binary_info :
+    {
+        KEEP(*(.binary_info.keep.*))
+        *(.binary_info.*)
+    } > FLASH
+    __binary_info_end = .;
+    . = ALIGN(4);
+
+    .ram_vector_table (NOLOAD): {
+        *(.ram_vector_table)
+    } > RAM
+
+    .uninitialized_data (NOLOAD): {
+        . = ALIGN(4);
+        *(.uninitialized_data*)
+    } > RAM
+
+    .data : {
+        __data_start__ = .;
+        *(vtable)
+
+        *(.time_critical*)
+
+        /* remaining .text and .rodata; i.e. stuff we exclude above because we want it in RAM */
+        *(.text*)
+        . = ALIGN(4);
+        *(.rodata*)
+        . = ALIGN(4);
+
+        *(.data*)
+        *(.sdata*)
+
+        . = ALIGN(4);
+        *(.after_data.*)
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__mutex_array_start = .);
+        KEEP(*(SORT(.mutex_array.*)))
+        KEEP(*(.mutex_array))
+        PROVIDE_HIDDEN (__mutex_array_end = .);
+
+        *(.jcr)
+        . = ALIGN(4);
+    } > RAM AT> FLASH
+
+    .tdata : {
+        . = ALIGN(4);
+		*(.tdata .tdata.* .gnu.linkonce.td.*)
+        /* All data end */
+        __tdata_end = .;
+    } > RAM AT> FLASH
+    PROVIDE(__data_end__ = .);
+
+    /* __etext is (for backwards compatibility) the name of the .data init source pointer (...) */
+    __etext = LOADADDR(.data);
+
+    .tbss (NOLOAD) : {
+        . = ALIGN(4);
+        __bss_start__ = .;
+        __tls_base = .;
+        *(.tbss .tbss.* .gnu.linkonce.tb.*)
+        *(.tcommon)
+
+        __tls_end = .;
+    } > RAM
+
+    .bss (NOLOAD) : {
+        . = ALIGN(4);
+        __tbss_end = .;
+
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.bss*)))
+        *(COMMON)
+        PROVIDE(__global_pointer$ = . + 2K);
+        *(.sbss*)
+        . = ALIGN(4);
+        __bss_end__ = .;
+    } > RAM
+
+    .heap (NOLOAD):
+    {
+        __end__ = .;
+        end = __end__;
+        KEEP(*(.heap*))
+        /* historically on GCC sbrk was growing past __HeapLimit to __StackLimit, however
+           to be more compatible, we now set __HeapLimit explicitly to where the end of the heap is */
+        . = ORIGIN(RAM) + LENGTH(RAM);
+        __HeapLimit = .;
+    } > RAM
+
+    /* Start and end symbols must be word-aligned */
+    .scratch_x : {
+        __scratch_x_start__ = .;
+        *(.scratch_x.*)
+        . = ALIGN(4);
+        __scratch_x_end__ = .;
+    } > SCRATCH_X AT > FLASH
+    __scratch_x_source__ = LOADADDR(.scratch_x);
+
+    .scratch_y : {
+        __scratch_y_start__ = .;
+        *(.scratch_y.*)
+        . = ALIGN(4);
+        __scratch_y_end__ = .;
+    } > SCRATCH_Y AT > FLASH
+    __scratch_y_source__ = LOADADDR(.scratch_y);
+
+    /* .stack*_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later
+     *
+     * stack1 section may be empty/missing if platform_launch_core1 is not used */
+
+    /* by default we put core 0 stack at the end of scratch Y, so that if core 1
+     * stack is not used then all of SCRATCH_X is free.
+     */
+    .stack1_dummy (NOLOAD):
+    {
+        *(.stack1*)
+    } > SCRATCH_X
+    .stack_dummy (NOLOAD):
+    {
+        KEEP(*(.stack*))
+    } > SCRATCH_Y
+
+    .flash_end : {
+        KEEP(*(.embedded_end_block*))
+        PROVIDE(__flash_binary_end = .);
+    } > FLASH = 0xaa
+
+    .psram (NOLOAD) : {
+        __psram_start__ = .;
+        *(.psram*)
+        . = ALIGN(4096);
+        __psram_heap_start__ = .;
+    } > PSRAM
+
+    /* stack limit is poorly named, but historically is maximum heap ptr */
+    __StackLimit = ORIGIN(RAM) + LENGTH(RAM);
+    __StackOneTop = ORIGIN(SCRATCH_X) + LENGTH(SCRATCH_X);
+    __StackTop = ORIGIN(SCRATCH_Y) + LENGTH(SCRATCH_Y);
+    __StackOneBottom = __StackOneTop - SIZEOF(.stack1_dummy);
+    __StackBottom = __StackTop - SIZEOF(.stack_dummy);
+    PROVIDE(__stack = __StackTop);
+
+    /* picolibc and LLVM */
+    PROVIDE (__heap_start = __end__);
+    PROVIDE (__heap_end = __HeapLimit);
+    PROVIDE( __tls_align = MAX(ALIGNOF(.tdata), ALIGNOF(.tbss)) );
+    PROVIDE( __tls_size_align = (__tls_size + __tls_align - 1) & ~(__tls_align - 1));
+    PROVIDE( __arm32_tls_tcb_offset = MAX(8, __tls_align) );
+
+    /* TLSF */
+    PROVIDE (__psram_start = __psram_start__);
+    PROVIDE (__psram_heap_start = __psram_heap_start__);
+
+    /* llvm-libc */
+    PROVIDE (_end = __end__);
+    PROVIDE (__llvm_libc_heap_limit = __HeapLimit);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed")
+
+    ASSERT( __binary_info_header_end - __logical_binary_start <= 1024, "Binary info must be in first 1024 bytes of the binary")
+    ASSERT( __embedded_block_end - __logical_binary_start <= 4096, "Embedded block must be in first 4096 bytes of the binary")
+
+    /* todo assert on extra code */
+}
+
@@ -0,0 +1,53 @@
+-DCFG_TUSB_MCU=OPT_MCU_RP2040
+-DCFG_TUSB_OS=OPT_OS_PICO
+-DLIB_BOOT_STAGE2_HEADERS=1
+-DLIB_PICO_ATOMIC=1
+-DLIB_PICO_BIT_OPS=1
+-DLIB_PICO_BIT_OPS_PICO=1
+-DLIB_PICO_CLIB_INTERFACE=1
+-DLIB_PICO_CRT0=1
+-DLIB_PICO_CXX_OPTIONS=1
+-DLIB_PICO_DIVIDER=1
+-DLIB_PICO_DIVIDER_COMPILER=1
+-DLIB_PICO_DOUBLE=1
+-DLIB_PICO_DOUBLE_PICO=1
+-DLIB_PICO_FIX_RP2040_USB_DEVICE_ENUMERATION=1
+-DLIB_PICO_FLOAT=1
+-DLIB_PICO_FLOAT_PICO=1
+-DLIB_PICO_FLOAT_PICO_VFP=1
+-DLIB_PICO_INT64_OPS=1
+-DLIB_PICO_INT64_OPS_COMPILER=1
+-DLIB_PICO_MEM_OPS=1
+-DLIB_PICO_MEM_OPS_COMPILER=1
+-DLIB_PICO_NEWLIB_INTERFACE=1
+-DLIB_PICO_PLATFORM=1
+-DLIB_PICO_PLATFORM_COMPILER=1
+-DLIB_PICO_PLATFORM_PANIC=1
+-DLIB_PICO_PLATFORM_SECTIONS=1
+-DLIB_PICO_RUNTIME=1
+-DLIB_PICO_RUNTIME_INIT=1
+-DLIB_PICO_STANDARD_BINARY_INFO=1
+-DLIB_PICO_STANDARD_LINK=1
+-DLIB_PICO_SYNC=1
+-DLIB_PICO_SYNC_CRITICAL_SECTION=1
+-DLIB_PICO_SYNC_MUTEX=1
+-DLIB_PICO_SYNC_SEM=1
+-DLIB_PICO_TIME=1
+-DLIB_PICO_TIME_ADAPTER=1
+-DLIB_PICO_UNIQUE_ID=1
+-DLIB_PICO_UTIL=1
+-DLIB_TINYUSB_BOARD=1
+-DLIB_TINYUSB_DEVICE=1
+-DPICO_32BIT=1
+-DPICO_BOARD=\"solderparty_rp2350_stamp_xl\"
+-DPICO_BUILD=1
+-DPICO_COPY_TO_RAM=0
+-DPICO_CXX_ENABLE_EXCEPTIONS=0
+-DPICO_NO_FLASH=0
+-DPICO_NO_HARDWARE=0
+-DPICO_ON_DEVICE=1
+-DPICO_RP2040_USB_DEVICE_ENUMERATION_FIX=1
+-DPICO_RP2040_USB_DEVICE_UFRAME_FIX=1
+-DPICO_RP2350=1
+-DPICO_RISCV=1
+-DPICO_USE_BLOCKED_RAM=0
@@ -0,0 +1,10 @@
+-iwithprefixbefore/include/rp2350
+-iwithprefixbefore/include/rp2350/pico_base
+-iwithprefixbefore/pico-sdk/src/rp2350/hardware_regs/include
+-iwithprefixbefore/pico-sdk/src/rp2350/hardware_structs/include
+-iwithprefixbefore/pico-sdk/src/rp2350/pico_platform/include
+-iwithprefixbefore/pico-sdk/src/rp2_common/hardware_riscv/include
+-iwithprefixbefore/pico-sdk/src/rp2_common/hardware_riscv_platform_timer/include
+-iwithprefixbefore/pico-sdk/src/rp2_common/hardware_hazard3/include
+-iwithprefixbefore/pico-sdk/src/rp2_common/hardware_sha256/include
+-iwithprefixbefore/pico-sdk/src/rp2_common/pico_sha256/include
@@ -0,0 +1 @@
+-Wl,--wrap=__ctzdi2
@@ -21,6 +21,9 @@
    __stack (== StackTop)
 */

+
+
+
 MEMORY
 {
    FLASH(rx) : ORIGIN = 0x10000000, LENGTH = __FLASH_LENGTH__
@@ -42,6 +45,20 @@ SECTIONS
        __flash_binary_start = .;
    } > FLASH

+    .ota : {
+        /* Start image with OTA */
+        KEEP (*(.OTA))
+        *ota.o
+    } > FLASH
+
+    .partition : {
+        . = __flash_binary_start + 0x2ff0;
+        LONG(__FS_START__)
+        LONG(__FS_END__)
+        LONG(__EEPROM_START__)
+        LONG(__FLASH_LENGTH__)
+    } > FLASH
+
    /* The bootrom will enter the image at the point indicated in your
       IMAGE_DEF, which is usually the reset handler of your vector table.

@@ -53,8 +70,8 @@ SECTIONS
    */

    .text : {
-        __logical_binary_start = .;
        KEEP (*(.vectors))
+        __logical_binary_start = .;
        KEEP (*(.binary_info_header))
        __binary_info_header_end = .;
        KEEP (*(.embedded_block))
@@ -116,7 +133,7 @@ SECTIONS
       refers to its dual-purpose on RP2040, where it also handled vectoring
       from the bootrom into the user image.
    */
-
+/*
    .boot2 : {
        __boot2_start__ = .;
        *(.boot2)
@@ -125,7 +142,7 @@ SECTIONS

    ASSERT(__boot2_end__ - __boot2_start__ <= 256,
        "ERROR: Pico second stage bootloader must be no more than 256 bytes in size")
-
+*/
    .rodata : {
        *(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a:) .rodata*)
        *(.srodata*)
@@ -276,7 +293,7 @@ SECTIONS
    .flash_end : {
        KEEP(*(.embedded_end_block*))
        PROVIDE(__flash_binary_end = .);
-    } > FLASH =0xaa
+    } > FLASH = 0xaa

    .psram (NOLOAD) : {
        __psram_start__ = .;
@@ -1,4 +1,3 @@
-DCFG_TUSB_DEBUG=0
 -DCFG_TUSB_MCU=OPT_MCU_RP2040
 -DCFG_TUSB_OS=OPT_OS_PICO
 -DLIB_BOOT_STAGE2_HEADERS=1
@@ -40,7 +39,7 @@
 -DLIB_TINYUSB_BOARD=1
 -DLIB_TINYUSB_DEVICE=1
 -DPICO_32BIT=1
-DPICO_BOARD=\"pico2\"
+-DPICO_BOARD=\"solderparty_rp2350_stamp_xl\"
 -DPICO_BUILD=1
 -DPICO_COPY_TO_RAM=0
 -DPICO_CXX_ENABLE_EXCEPTIONS=0
@@ -118,12 +118,16 @@ bool EEPROMClass::commit() {
        return false;
    }

-    noInterrupts();
+    if (!__isFreeRTOS) {
+        noInterrupts();
+    }
    rp2040.idleOtherCore();
    flash_range_erase((intptr_t)_sector - (intptr_t)XIP_BASE, 4096);
    flash_range_program((intptr_t)_sector - (intptr_t)XIP_BASE, _data, _size);
    rp2040.resumeOtherCore();
-    interrupts();
+    if (!__isFreeRTOS) {
+        interrupts();
+    }
    _dirty = false;

    return true;
@@ -1,5 +1 @@
-#ifdef PICO_RP2350
-#error Sorry, FreeRTOS is not yet supported on the RP2350 in this core.
-#else
 #include "../lib/FreeRTOS-Kernel/include/FreeRTOS.h"
-#endif
@@ -200,6 +200,10 @@ extern unsigned long ulMainGetRunTimeCounterValue(void);
 #endif
 #endif

+#define configENABLE_MPU                        0
+#define configENABLE_TRUSTZONE                  0
+#define configRUN_FREERTOS_SECURE_ONLY          1
+#define configENABLE_FPU                        1
 /*  The lowest interrupt priority that can be used in a call to a "set priority"
    function. */
 #ifndef configLIBRARY_LOWEST_INTERRUPT_PRIORITY
@@ -219,11 +223,16 @@ extern unsigned long ulMainGetRunTimeCounterValue(void);
 #ifndef configKERNEL_INTERRUPT_PRIORITY
 #define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
 #endif
+
 /* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
    See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
 #ifndef configMAX_SYSCALL_INTERRUPT_PRIORITY
+#ifdef PICO_RP2350
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY    16
+#else
 #define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
 #endif
+#endif

 #ifndef configASSERT
 #ifdef __cplusplus
@@ -0,0 +1 @@
+#include "../lib/FreeRTOS-Kernel/include/mpu_syscall_numbers.h"
@@ -0,0 +1,5 @@
+#ifdef PICO_RP2350
+#ifndef __riscv
+#include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2350_ARM_NTZ/non_secure/mpu_wrappers_v2_asm.c"
+#endif
+#endif
@@ -1 +1,9 @@
+#ifdef PICO_RP2040
 #include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2040/port.c"
+#else
+#ifndef __riscv
+#include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2350_ARM_NTZ/non_secure/port.c"
+#else
+#include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2350_RISC-V/port.c"
+#endif
+#endif
@@ -0,0 +1,5 @@
+#ifdef PICO_RP2350
+#ifdef __riscv
+#include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2350_RISC-V/portASM.S"
+#endif
+#endif
@@ -0,0 +1,6 @@
+#ifdef PICO_RP2350
+#ifdef __riscv
+#include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2350_RISC-V/include/portContext.h"
+#endif
+#endif
+
@@ -0,0 +1,5 @@
+#ifdef PICO_RP2350
+#ifndef __riscv
+#include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2350_ARM_NTZ/non_secure/portasm.c"
+#endif
+#endif
@@ -1 +1,9 @@
+#ifdef PICO_RP2350
+#ifndef __riscv
+#include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2350_ARM_NTZ/non_secure/portmacro.h"
+#else
+#include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2350_RISC-V/include/portmacro.h"
+#endif
+#else
 #include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2040/include/portmacro.h"
+#endif
@@ -1 +1,9 @@
+#ifdef PICO_RP2350
+#ifndef __riscv
+#include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2350_ARM_NTZ/non_secure//rp2040_config.h"
+#else
+#include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2350_RISC-V/include/rp2040_config.h"
+#endif
+#else
 #include "../lib/FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2040/include/rp2040_config.h"
+#endif
@@ -91,6 +91,14 @@ extern "C" {
    bool __freertos_check_if_in_isr() {
        return portCHECK_IF_IN_ISR();
    }
+
+    void __freertos_task_exit_critical() {
+        taskEXIT_CRITICAL();
+    }
+
+    void __freertos_task_enter_critical() {
+        taskENTER_CRITICAL();
+    }
 }


@@ -0,0 +1,25 @@
+#include <Arduino.h>
+#include <FreeRTOS.h>
+#include "LittleFS.h"
+
+void setup() {
+  pinMode(LED_BUILTIN, OUTPUT);
+  digitalWrite(LED_BUILTIN, LOW);
+  LittleFS.format();
+}
+
+void setup1() {
+}
+
+void loop() {
+  digitalWrite(LED_BUILTIN, HIGH);
+  delay(200);
+}
+
+int x = 0;
+void loop1() {
+  delay(100);
+  digitalWrite(LED_BUILTIN, LOW);
+  delay(100);
+  Serial.printf("%d\n", x++);
+}
@@ -0,0 +1,57 @@
+// Released to the public domain
+#include <FreeRTOS.h>
+#include <task.h>
+#include <map>
+#define STACK_SIZE 512
+#define CORE_0 (1 << 0)
+#define CORE_1 (1 << 1)
+
+std::map<eTaskState, const char *> eTaskStateName { {eReady, "Ready"}, { eRunning, "Running" }, {eBlocked, "Blocked"}, {eSuspended, "Suspended"}, {eDeleted, "Deleted"} };
+void ps() {
+  int tasks = uxTaskGetNumberOfTasks();
+  TaskStatus_t *pxTaskStatusArray = new TaskStatus_t[tasks];
+  unsigned long runtime;
+  tasks = uxTaskGetSystemState( pxTaskStatusArray, tasks, &runtime );
+  Serial.printf("# Tasks: %d\n", tasks);
+  Serial.printf("%-3s %-16s %-10s %s %s\n", "ID", "NAME", "STATE", "PRIO", "CYCLES");
+  for (int i = 0; i < tasks; i++) {
+    Serial.printf("%2d: %-16s %-10s %4d %lu\n", i, pxTaskStatusArray[i].pcTaskName, eTaskStateName[pxTaskStatusArray[i].eCurrentState], (int)pxTaskStatusArray[i].uxCurrentPriority, pxTaskStatusArray[i].ulRunTimeCounter);
+  }
+  delete[] pxTaskStatusArray;
+}
+
+static TaskHandle_t l[16];
+
+void loop() {
+  ps();
+  delay(1000);
+}
+
+#define LOOP(z) \
+void loop##z(void *params) {\
+  (void) params;\
+  while (true) {\
+    srand(z);\
+    int sum = 0;\
+    for (int i = 0; i < 500000; i++) sum+= rand();\
+    Serial.printf("L%d: %08x\n", z, sum);\
+    delay(1000 + z * 10);\
+  }\
+}
+
+LOOP(0);
+LOOP(1);
+LOOP(2);
+LOOP(3);
+
+
+void setup() {
+  xTaskCreate(loop0, "loop0", STACK_SIZE, NULL, 1, &l[0]);
+  vTaskCoreAffinitySet(l[0], CORE_0);
+//  xTaskCreate(loop1, "loop1", STACK_SIZE, NULL, 1, &l[1]);
+//  vTaskCoreAffinitySet(l[1], CORE_0);
+//  xTaskCreate(loop2, "loop2", STACK_SIZE, NULL, 1, &l[2]);
+//  vTaskCoreAffinitySet(l[2], CORE_0);
+//  xTaskCreate(loop3, "loop3", STACK_SIZE, NULL, 1, &l[3]);
+//  vTaskCoreAffinitySet(l[3], CORE_1);
+}
@@ -182,12 +182,16 @@ int LittleFSImpl::lfs_flash_prog(const struct lfs_config *c,
                                 lfs_block_t block, lfs_off_t off, const void *buffer, lfs_size_t size) {
    LittleFSImpl *me = reinterpret_cast<LittleFSImpl*>(c->context);
    uint8_t *addr = me->_start + (block * me->_blockSize) + off;
-    noInterrupts();
+    if (!__isFreeRTOS) {
+        noInterrupts();
+    }
    rp2040.idleOtherCore();
    //    Serial.printf("WRITE: %p, $d\n", (intptr_t)addr - (intptr_t)XIP_BASE, size);
    flash_range_program((intptr_t)addr - (intptr_t)XIP_BASE, (const uint8_t *)buffer, size);
    rp2040.resumeOtherCore();
-    interrupts();
+    if (!__isFreeRTOS) {
+        interrupts();
+    }
    return 0;
 }

@@ -195,11 +199,15 @@ int LittleFSImpl::lfs_flash_erase(const struct lfs_config *c, lfs_block_t block)
    LittleFSImpl *me = reinterpret_cast<LittleFSImpl*>(c->context);
    uint8_t *addr = me->_start + (block * me->_blockSize);
    //    Serial.printf("ERASE: %p, %d\n", (intptr_t)addr - (intptr_t)XIP_BASE, me->_blockSize);
-    noInterrupts();
+    if (!__isFreeRTOS) {
+        noInterrupts();
+    }
    rp2040.idleOtherCore();
    flash_range_erase((intptr_t)addr - (intptr_t)XIP_BASE, me->_blockSize);
    rp2040.resumeOtherCore();
-    interrupts();
+    if (!__isFreeRTOS) {
+        interrupts();
+    }
    return 0;
 }

@@ -119,7 +119,7 @@ bool PWMAudio::begin() {

    if (_stereo && (_pin & 1)) {
        // Illegal, need to have consecutive pins on the same PWM slice
-        Serial.printf("ERROR: PWMAudio stereo mode requires pin be even\n");
+        DEBUGV("ERROR: PWMAudio stereo mode requires pin be even\n");
        return false;
    }

@@ -12,7 +12,8 @@

 #include <PicoOTA.h>
 #include <LittleFS.h>
-#include "blink_100_1000.h"
+#include "blink_100_1000_rp2040.h"
+#include "blink_500_500_rp2350.h"

 void setup() {
  Serial.begin(115200);
@@ -1,3 +1,4 @@
+#ifdef PICO_RP2040
 const unsigned char blink_gz[] = {
    0x1f, 0x8b, 0x08, 0x08, 0x86, 0x7e, 0xf3, 0x62, 0x02, 0x03, 0x73, 0x6b,
    0x65, 0x74, 0x63, 0x68, 0x5f, 0x61, 0x75, 0x67, 0x31, 0x30, 0x61, 0x2e,
@@ -3896,3 +3897,4 @@ const unsigned char blink_gz[] = {
    0x03, 0xeb, 0x79, 0x7c, 0xf6, 0x3f, 0x01, 0xa8, 0x7b, 0x69, 0xf7, 0x10,
    0x11, 0x01, 0x00
 };
+#endif
@@ -9,7 +9,9 @@

 #include <PicoOTA.h>
 #include <LittleFS.h>
-#include "blink_100_1000.h"
+#include "blink_100_1000_rp2040.h"
+#include "blink_500_500_rp2350.h"
+#include "blink_250_250_rp2350-riscv.h"

 void setup() {
  Serial.begin(115200);
@@ -1,3 +1,4 @@
+#ifdef PICO_RP2040
 const unsigned char blink[] = {
    0x00, 0xb5, 0x32, 0x4b, 0x21, 0x20, 0x58, 0x60, 0x98, 0x68, 0x02, 0x21,
    0x88, 0x43, 0x98, 0x60, 0xd8, 0x60, 0x18, 0x61, 0x58, 0x61, 0x2e, 0x4b,
@@ -5826,3 +5827,4 @@ const unsigned char blink[] = {
    0xc1, 0x45, 0x00, 0x10, 0x9d, 0x48, 0x00, 0x10, 0xad, 0x4b, 0x00, 0x10,
    0xed, 0x63, 0x00, 0x10
 };
+#endif
@@ -179,6 +179,12 @@ void SPIClassRP2040::transfer(const void *txbuf, void *rxbuf, size_t count) {
    DEBUGSPI("SPI::transfer completed\n");
 }

+#ifdef PICO_RP2350B
+#define GPIOIRQREGS 6
+#else
+#define GPIOIRQREGS 4
+#endif
+
 void SPIClassRP2040::beginTransaction(SPISettings settings) {
    noInterrupts(); // Avoid possible race conditions if IRQ comes in while main app is in middle of this
    DEBUGSPI("SPI::beginTransaction(clk=%lu, bo=%s)\n", settings.getClockFreq(), (settings.getBitOrder() == MSBFIRST) ? "MSB" : "LSB");
@@ -201,7 +207,7 @@ void SPIClassRP2040::beginTransaction(SPISettings settings) {
    }
    // Disable any IRQs that are being used for SPI
    io_bank0_irq_ctrl_hw_t *irq_ctrl_base = get_core_num() ? &iobank0_hw->proc1_irq_ctrl : &iobank0_hw->proc0_irq_ctrl;
-    DEBUGSPI("SPI: IRQ masks before = %08x %08x %08x %08x\n", (unsigned)irq_ctrl_base->inte[0], (unsigned)irq_ctrl_base->inte[1], (unsigned)irq_ctrl_base->inte[2], (unsigned)irq_ctrl_base->inte[3]);
+    DEBUGSPI("SPI: IRQ masks before = %08x %08x %08x %08x %08x %08x\n", (unsigned)irq_ctrl_base->inte[0], (unsigned)irq_ctrl_base->inte[1], (unsigned)irq_ctrl_base->inte[2], (unsigned)irq_ctrl_base->inte[3], (GPIOIRQREGS > 4) ? (unsigned)irq_ctrl_base->inte[4] : 0, (GPIOIRQREGS > 5) ? (unsigned)irq_ctrl_base->inte[5] : 0);
    for (auto entry : _usingIRQs) {
        int gpio = entry.first;

@@ -212,7 +218,7 @@ void SPIClassRP2040::beginTransaction(SPISettings settings) {
        DEBUGSPI("SPI: GPIO %d = %lu\n", gpio, val);
        (*en_reg) ^= val << (4 * (gpio % 8));
    }
-    DEBUGSPI("SPI: IRQ masks after = %08x %08x %08x %08x\n", (unsigned)irq_ctrl_base->inte[0], (unsigned)irq_ctrl_base->inte[1], (unsigned)irq_ctrl_base->inte[2], (unsigned)irq_ctrl_base->inte[3]);
+    DEBUGSPI("SPI: IRQ masks after = %08x %08x %08x %08x %08x %08x\n", (unsigned)irq_ctrl_base->inte[0], (unsigned)irq_ctrl_base->inte[1], (unsigned)irq_ctrl_base->inte[2], (unsigned)irq_ctrl_base->inte[3], (GPIOIRQREGS > 4) ? (unsigned)irq_ctrl_base->inte[4] : 0, (GPIOIRQREGS > 5) ? (unsigned)irq_ctrl_base->inte[5] : 0);
    interrupts();
 }

@@ -227,7 +233,7 @@ void SPIClassRP2040::endTransaction(void) {
    }
    io_bank0_irq_ctrl_hw_t *irq_ctrl_base = get_core_num() ? &iobank0_hw->proc1_irq_ctrl : &iobank0_hw->proc0_irq_ctrl;
    (void) irq_ctrl_base;
-    DEBUGSPI("SPI: IRQ masks = %08x %08x %08x %08x\n", (unsigned)irq_ctrl_base->inte[0], (unsigned)irq_ctrl_base->inte[1], (unsigned)irq_ctrl_base->inte[2], (unsigned)irq_ctrl_base->inte[3]);
+    DEBUGSPI("SPI: IRQ masks = %08x %08x %08x %08x %08x %08x\n", (unsigned)irq_ctrl_base->inte[0], (unsigned)irq_ctrl_base->inte[1], (unsigned)irq_ctrl_base->inte[2], (unsigned)irq_ctrl_base->inte[3], (GPIOIRQREGS > 4) ? (unsigned)irq_ctrl_base->inte[4] : 0, (GPIOIRQREGS > 5) ? (unsigned)irq_ctrl_base->inte[5] : 0);
    interrupts();
 }

@@ -329,7 +335,7 @@ void SPIClassRP2040::abortAsync() {


 bool SPIClassRP2040::setRX(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({0, 4, 16, 20, 32, 26}) /* SPI0 */,
                                    __bitset({8, 12, 24, 28, 40, 44})  /* SPI1 */
                                  };
@@ -356,7 +362,7 @@ bool SPIClassRP2040::setRX(pin_size_t pin) {
 }

 bool SPIClassRP2040::setCS(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({1, 5, 17, 21, 33, 37}) /* SPI0 */,
                                    __bitset({9, 13, 25, 29, 41, 45})  /* SPI1 */
                                  };
@@ -383,7 +389,7 @@ bool SPIClassRP2040::setCS(pin_size_t pin) {
 }

 bool SPIClassRP2040::setSCK(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({2, 6, 18, 22, 34, 38}) /* SPI0 */,
                                    __bitset({10, 14, 26, 30, 42, 46})  /* SPI1 */
                                  };
@@ -410,7 +416,7 @@ bool SPIClassRP2040::setSCK(pin_size_t pin) {
 }

 bool SPIClassRP2040::setTX(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({3, 7, 19, 23, 35, 39}) /* SPI0 */,
                                    __bitset({11, 15, 27, 31, 43, 47})  /* SPI1 */
                                  };
@@ -79,7 +79,7 @@ inline spi_cpha_t SPISlaveClass::cpha(SPISettings _spis) {
 }

 bool SPISlaveClass::setRX(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({0, 4, 16, 20, 32, 26}) /* SPI0 */,
                                    __bitset({8, 12, 24, 28, 40, 44})  /* SPI1 */
                                  };
@@ -106,7 +106,7 @@ bool SPISlaveClass::setRX(pin_size_t pin) {
 }

 bool SPISlaveClass::setCS(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({1, 5, 17, 21, 33, 37}) /* SPI0 */,
                                    __bitset({9, 13, 25, 29, 41, 45})  /* SPI1 */
                                  };
@@ -133,7 +133,7 @@ bool SPISlaveClass::setCS(pin_size_t pin) {
 }

 bool SPISlaveClass::setSCK(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({2, 6, 18, 22, 34, 38}) /* SPI0 */,
                                    __bitset({10, 14, 26, 30, 42, 46})  /* SPI1 */
                                  };
@@ -160,7 +160,7 @@ bool SPISlaveClass::setSCK(pin_size_t pin) {
 }

 bool SPISlaveClass::setTX(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({3, 7, 19, 23, 35, 39}) /* SPI0 */,
                                    __bitset({11, 15, 27, 31, 43, 47})  /* SPI1 */
                                  };
@@ -291,12 +291,16 @@ bool UpdaterClass::_writeBuffer() {
            return false;
        }
    } else {
-        noInterrupts();
+        if (!__isFreeRTOS) {
+            noInterrupts();
+        }
        rp2040.idleOtherCore();
        flash_range_erase((intptr_t)_currentAddress - (intptr_t)XIP_BASE, 4096);
        flash_range_program((intptr_t)_currentAddress - (intptr_t)XIP_BASE, _buffer, 4096);
        rp2040.resumeOtherCore();
-        interrupts();
+        if (!__isFreeRTOS) {
+            interrupts();
+        }
    }
    if (!_verify) {
        _md5.add(_buffer, _bufferLen);
@@ -49,7 +49,7 @@ TwoWire::TwoWire(i2c_inst_t *i2c, pin_size_t sda, pin_size_t scl) {
 }

 bool TwoWire::setSDA(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44}) /* I2C0 */,
                                    __bitset({2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46})  /* I2C1 */
                                  };
@@ -76,7 +76,7 @@ bool TwoWire::setSDA(pin_size_t pin) {
 }

 bool TwoWire::setSCL(pin_size_t pin) {
-#ifdef RP2350B
+#ifdef PICO_RP2350B
    constexpr uint64_t valid[2] = { __bitset({1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45}) /* I2C0 */,
                                    __bitset({3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47})  /* I2C1 */
                                  };
@@ -291,7 +291,7 @@ size_t TwoWire::requestFrom(uint8_t address, size_t quantity) {
 }

 static bool _clockStretch(pin_size_t pin) {
-    auto end = time_us_64() + 100;
+    auto end = time_us_64() + 500;
    while ((time_us_64() < end) && (!digitalRead(pin))) { /* noop */ }
    return digitalRead(pin);
 }
@@ -366,6 +366,33 @@ void TwoWire::_handleTimeout(bool reset) {
        } else {
            int prev_clkHz = _clkHz;
            end();
+
+            // Attempt bus recovery if SDA is held LOW by another device
+            // See RP2040 datasheet "Bus clear feature" (not implemented in HW)
+            int delay = 5; //5us LOW/HIGH -> 10us period -> 100kHz freq
+            pinMode(_sda, INPUT_PULLUP);
+            pinMode(_scl, INPUT_PULLUP);
+            gpio_set_function(_scl, GPIO_FUNC_SIO);
+            gpio_set_function(_sda, GPIO_FUNC_SIO);
+
+            if (digitalRead(_sda) == LOW) {
+                int sclPulseCount = 0;
+                while (sclPulseCount < 9 && digitalRead(_sda) == LOW) {
+                    sclPulseCount++;
+                    digitalWrite(_scl, LOW);
+                    sleep_us(delay);
+                    digitalWrite(_scl, HIGH);
+                    sleep_us(delay);
+                }
+
+                if (digitalRead(_sda) == HIGH) {
+                    // Bus recovered : send a STOP
+                    digitalWrite(_sda, LOW);
+                    sleep_us(delay);
+                    digitalWrite(_sda, HIGH);
+                }
+            }
+
            setClock(prev_clkHz);
            begin();
        }
@@ -409,10 +436,17 @@ size_t TwoWire::write(uint8_t ucData) {
    }

    if (_slave) {
-        // Wait for a spot in the TX FIFO
-        while (0 == (_i2c->hw->status & (1 << 1))) { /* noop wait */ }
-        _i2c->hw->data_cmd = ucData;
-        return 1;
+        // Wait for a spot in the TX FIFO and return in case of timeout
+        auto end = make_timeout_time_ms(_timeout);
+        while ((i2c_get_write_available(_i2c) == 0) && !time_reached(end)) { /* noop wait */ }
+
+        if (i2c_get_write_available(_i2c) > 0) {
+            _i2c->hw->data_cmd = ucData;
+            return 1;
+        } else {
+            _handleTimeout(_reset_with_timeout);
+            return 0;
+        }
    } else {
        if (!_txBegun || (_buffLen == sizeof(_buff))) {
            return 0;
@@ -75,14 +75,22 @@ void __removeEthernetPacketHandler(int id) {
 }

 #define GPIOSTACKSIZE 8
-static uint32_t gpioMaskStack[GPIOSTACKSIZE][4];
-static uint32_t gpioMask[4] = {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff};
+#ifdef PICO_RP2350B
+#define GPIOIRQREGS 6
+#define GPIOIRQREGSINIT 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
+#else
+#define GPIOIRQREGS 4
+#define GPIOIRQREGSINIT 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
+#endif
+
+static uint32_t gpioMaskStack[GPIOSTACKSIZE][GPIOIRQREGS];
+static uint32_t gpioMask[GPIOIRQREGS] = {GPIOIRQREGSINIT};

 void ethernet_arch_lwip_gpio_mask() {
    noInterrupts();
-    memmove(gpioMaskStack[1], gpioMaskStack[0], 4 * sizeof(uint32_t) * (GPIOSTACKSIZE - 1)); // Push down the stack
+    memmove(gpioMaskStack[1], gpioMaskStack[0], GPIOIRQREGS * sizeof(uint32_t) * (GPIOSTACKSIZE - 1)); // Push down the stack
    io_bank0_irq_ctrl_hw_t *irq_ctrl_base = get_core_num() ? &io_bank0_hw->proc1_irq_ctrl : &io_bank0_hw->proc0_irq_ctrl;
-    for (int i = 0; i < 4; i++) {
+    for (int i = 0; i < GPIOIRQREGS; i++) {
        gpioMaskStack[0][i] = irq_ctrl_base->inte[i];
        irq_ctrl_base->inte[i] = irq_ctrl_base->inte[i] & gpioMask[i];
    }
@@ -92,10 +100,10 @@ void ethernet_arch_lwip_gpio_mask() {
 void ethernet_arch_lwip_gpio_unmask() {
    noInterrupts();
    io_bank0_irq_ctrl_hw_t *irq_ctrl_base = get_core_num() ? &io_bank0_hw->proc1_irq_ctrl : &io_bank0_hw->proc0_irq_ctrl;
-    for (int i = 0; i < 4; i++) {
+    for (int i = 0; i < GPIOIRQREGS; i++) {
        irq_ctrl_base->inte[i] = gpioMaskStack[0][i];
    }
-    memmove(gpioMaskStack[0], gpioMaskStack[1],  4 * sizeof(uint32_t) * (GPIOSTACKSIZE - 1)); // Pop up the stack
+    memmove(gpioMaskStack[0], gpioMaskStack[1],  GPIOIRQREGS * sizeof(uint32_t) * (GPIOSTACKSIZE - 1)); // Pop up the stack
    interrupts();
 }

@@ -28,22 +28,22 @@ void verify(const char *name, uint32_t *src) {
 void loop() {
  uint64_t start, stop;

-  start = rp2040.getCycleCount();
+  start = rp2040.getCycleCount64();
  for (int i = 0; i < 1000; i++) {
    memcpy(dest, src, 4 * 1024);
    memcpy(src, dest, 4 * 1024);
  }
-  stop = rp2040.getCycleCount();
+  stop = rp2040.getCycleCount64();
  verify("CPU", src);
  verify("CPU", dest);
  Serial.printf("CPU: %lld clock cycles for 4K\n", (stop - start) / 1000);

-  start = rp2040.getCycleCount();
+  start = rp2040.getCycleCount64();
  for (int i = 0; i < 1000; i++) {
    rp2040.memcpyDMA(dest, src, 4 * 1024);
    rp2040.memcpyDMA(src, dest, 4 * 1024);
  }
-  stop = rp2040.getCycleCount();
+  stop = rp2040.getCycleCount64();
  verify("DMA", src);
  verify("DMA", dest);
  Serial.printf("DMA: %lld clock cycles for 4K\n\n\n", (stop - start) / 1000);
@@ -7,10 +7,23 @@ if (${cpu} MATCHES "rp2040")
    set(PICO_BOARD pico)
    set(PICO_PLATFORM rp2040)
    set(PICO_CYW43_SUPPORTED 0)
-elseif(${cpu} MATCHES "rp2350")
+    set(OBJARCH armv6-m)
+    set(WRAP -Wl,--wrap=clocks_init)
+    set(TUPLE arm-none-eabi)
+elseif(${cpu} MATCHES "rp2350$")
    set(PICO_BOARD pico2)
    set(PICO_PLATFORM rp2350)
    set(PICO_CYW43_SUPPORTED 0)
+    set(OBJARCH armv8-m)
+    set(WRAP )
+    set(TUPLE arm-none-eabi)
+elseif(${cpu} MATCHES "rp2350-riscv$")
+    set(PICO_BOARD pico2)
+    set(PICO_PLATFORM rp2350-riscv)
+    set(PICO_CYW43_SUPPORTED 0)
+    set(OBJARCH rv32imac_zicsr_zifencei_zba_zbb_zbs_zbkb)
+    set(WRAP )
+    set(TUPLE riscv32-unknown-elf)
 else()
    message(FATAL_ERROR "Unknown CPU, '${cpu}'")
 endif()
@@ -71,7 +84,7 @@ target_compile_options(ota PUBLIC
 )

 target_link_options(ota PUBLIC
-        -Wl,--wrap=clocks_init
+        ${WRAP}
        -Wl,--wrap=exit
        -Wl,--wrap=atexit
        -Wl,--wrap=panic_unsupported
@@ -97,7 +110,7 @@ target_link_libraries(ota
 )

 add_custom_command(TARGET ota POST_BUILD
-        COMMAND ../../system/arm-none-eabi/bin/arm-none-eabi-ld -r -A armv6-m -b binary -o ota.o ota.bin
-        COMMAND ../../system/arm-none-eabi/bin/arm-none-eabi-objcopy --rename-section .data=.OTA ota.o ../../lib/${cpu}/ota.o
+        COMMAND ../../system/${TUPLE}/bin/${TUPLE}-ld -r -A ${OBJARCH} -b binary -o ota.o ota.bin
+        COMMAND ../../system/${TUPLE}/bin/${TUPLE}-objcopy --rename-section .data=.OTA ota.o ../../lib/${cpu}/ota.o
        COMMAND cp ../ota_command.h ../../include/${cpu}/pico_base/pico/.
 )
@@ -4,6 +4,7 @@ set -e # Exit on error

 export PICO_SDK_PATH="$(cd ../pico-sdk/; pwd)"
 export PATH="$(cd ../system/arm-none-eabi/bin; pwd):$PATH"
+export PATH="$(cd ../system/riscv32-unknown-elf/bin; pwd):$PATH"

 rm -rf build
 mkdir build
@@ -18,3 +19,10 @@ cd build-rp2350
 CPU=rp2350 cmake .. -DPICO_RUNTIME_SKIP_INIT_DEFAULT_ALARM_POOL=1
 CPU=rp2350 make -j # VERBOSE=1
 cd ..
+
+rm -rf build-rp2350-riscv
+mkdir build-rp2350-riscv
+cd build-rp2350-riscv
+CPU=rp2350-riscv cmake .. -DPICO_RUNTIME_SKIP_INIT_DEFAULT_ALARM_POOL=1
+CPU=rp2350-riscv make -j # VERBOSE=1
+cd ..
@@ -0,0 +1,295 @@
+/* Based on GCC ARM embedded samples.
+   Defines the following symbols for use by code:
+    __exidx_start
+    __exidx_end
+    __etext
+    __data_start__
+    __preinit_array_start
+    __preinit_array_end
+    __init_array_start
+    __init_array_end
+    __fini_array_start
+    __fini_array_end
+    __data_end__
+    __bss_start__
+    __bss_end__
+    __end__
+    end
+    __HeapLimit
+    __StackLimit
+    __StackTop
+    __stack (== StackTop)
+*/
+
+MEMORY
+{
+    INCLUDE "pico_flash_region.ld"
+    RAM(rwx) : ORIGIN =  0x20000000, LENGTH = 212k
+    GLOBALS(rwx) :   ORIGIN = 0x20035000, LENGTH = 44k
+    SCRATCH_X(rwx) : ORIGIN = 0x20080000, LENGTH = 4k
+    SCRATCH_Y(rwx) : ORIGIN = 0x20081000, LENGTH = 4k
+}
+
+ENTRY(_entry_point)
+
+SECTIONS
+{
+    /* Second stage bootloader is prepended to the image. It must be 256 bytes big
+       and checksummed. It is usually built by the boot_stage2 target
+       in the Raspberry Pi Pico SDK
+    */
+
+    /* Make sure the globals are not copied/etc.  They're empty RAM we will init ourselves */
+    .globals (NOLOAD) : {
+    } > GLOBALS
+
+    .flash_begin : {
+        __flash_binary_start = .;
+    } > FLASH
+
+    /* The bootrom will enter the image at the point indicated in your
+       IMAGE_DEF, which is usually the reset handler of your vector table.
+
+       The debugger will use the ELF entry point, which is the _entry_point
+       symbol, and in our case is *different from the bootrom's entry point.*
+       This is used to go back through the bootrom on debugger launches only,
+       to perform the same initial flash setup that would be performed on a
+       cold boot.
+    */
+
+    .flashtext : {
+        __logical_binary_start = .;
+        KEEP (*(.vectors))
+        KEEP (*(.binary_info_header))
+        __binary_info_header_end = .;
+        KEEP (*(.embedded_block))
+        __embedded_block_end = .;
+        KEEP (*(.reset))
+        . = ALIGN(4);
+    } > FLASH
+
+    .rodata : {
+        /* segments not marked as .flashdata are instead pulled into .data (in RAM) to avoid accidental flash accesses */
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.flashdata*)))
+        . = ALIGN(4);
+    } > FLASH
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > FLASH
+
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > FLASH
+    __exidx_end = .;
+
+    /* Machine inspectable binary information */
+    . = ALIGN(4);
+    __binary_info_start = .;
+    .binary_info :
+    {
+        KEEP(*(.binary_info.keep.*))
+        *(.binary_info.*)
+    } > FLASH
+    __binary_info_end = .;
+    . = ALIGN(4);
+
+    /* Vector table goes first in RAM, to avoid large alignment hole */
+    .ram_vector_table (NOLOAD): {
+        *(.ram_vector_table)
+    } > RAM
+
+    .uninitialized_data (NOLOAD): {
+        . = ALIGN(4);
+        *(.uninitialized_data*)
+    } > RAM
+
+    .text : {
+        __ram_text_start__ = .;
+        *(.init)
+        *(.text*)
+        *(.fini)
+        /* Pull all c'tors into .text */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+        /* Followed by destructors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        *(.eh_frame*)
+        . = ALIGN(4);
+        __ram_text_end__ = .;
+    } > RAM AT> FLASH
+    __ram_text_source__ = LOADADDR(.text);
+    . = ALIGN(4);
+
+    .data : {
+        __data_start__ = .;
+        *(vtable)
+
+        *(.time_critical*)
+
+        . = ALIGN(4);
+        *(.rodata*)
+        *(.srodata*)
+        . = ALIGN(4);
+
+        *(.data*)
+        *(.sdata*)
+
+        . = ALIGN(4);
+        *(.after_data.*)
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__mutex_array_start = .);
+        KEEP(*(SORT(.mutex_array.*)))
+        KEEP(*(.mutex_array))
+        PROVIDE_HIDDEN (__mutex_array_end = .);
+
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(SORT(.preinit_array.*)))
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        *(SORT(.fini_array.*))
+        *(.fini_array)
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        *(.jcr)
+        . = ALIGN(4);
+    } > RAM AT> FLASH
+
+    .tdata : {
+        . = ALIGN(4);
+		*(.tdata .tdata.* .gnu.linkonce.td.*)
+        /* All data end */
+        __tdata_end = .;
+    } > RAM AT> FLASH
+    PROVIDE(__data_end__ = .);
+
+    /* __etext is (for backwards compatibility) the name of the .data init source pointer (...) */
+    __etext = LOADADDR(.data);
+
+    .tbss (NOLOAD) : {
+        . = ALIGN(4);
+        __bss_start__ = .;
+        __tls_base = .;
+        *(.tbss .tbss.* .gnu.linkonce.tb.*)
+        *(.tcommon)
+
+        __tls_end = .;
+    } > RAM
+
+    .bss  : {
+        . = ALIGN(4);
+        __tbss_end = .;
+
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.bss*)))
+        *(COMMON)
+        PROVIDE(__global_pointer$ = . + 2K);
+        *(.sbss*)
+        . = ALIGN(4);
+        __bss_end__ = .;
+    } > RAM
+
+    .heap (NOLOAD):
+    {
+        __end__ = .;
+        end = __end__;
+        KEEP(*(.heap*))
+        /* historically on GCC sbrk was growing past __HeapLimit to __StackLimit, however
+           to be more compatible, we now set __HeapLimit explicitly to where the end of the heap is */
+        . = ORIGIN(RAM) + LENGTH(RAM);
+        __HeapLimit = .;
+    } > RAM
+
+    /* Start and end symbols must be word-aligned */
+    .scratch_x : {
+        __scratch_x_start__ = .;
+        *(.scratch_x.*)
+        . = ALIGN(4);
+        __scratch_x_end__ = .;
+    } > SCRATCH_X AT > FLASH
+    __scratch_x_source__ = LOADADDR(.scratch_x);
+
+    .scratch_y : {
+        __scratch_y_start__ = .;
+        *(.scratch_y.*)
+        . = ALIGN(4);
+        __scratch_y_end__ = .;
+    } > SCRATCH_Y AT > FLASH
+    __scratch_y_source__ = LOADADDR(.scratch_y);
+
+    /* .stack*_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later
+     *
+     * stack1 section may be empty/missing if platform_launch_core1 is not used */
+
+    /* by default we put core 0 stack at the end of scratch Y, so that if core 1
+     * stack is not used then all of SCRATCH_X is free.
+     */
+    .stack1_dummy (NOLOAD):
+    {
+        *(.stack1*)
+    } > SCRATCH_X
+    .stack_dummy (NOLOAD):
+    {
+        KEEP(*(.stack*))
+    } > SCRATCH_Y
+
+    .flash_end : {
+        KEEP(*(.embedded_end_block*))
+        PROVIDE(__flash_binary_end = .);
+    } > FLASH =0xaa
+
+    /* stack limit is poorly named, but historically is maximum heap ptr */
+    __StackLimit = ORIGIN(RAM) + LENGTH(RAM);
+    __StackOneTop = ORIGIN(SCRATCH_X) + LENGTH(SCRATCH_X);
+    __StackTop = ORIGIN(SCRATCH_Y) + LENGTH(SCRATCH_Y);
+    __StackOneBottom = __StackOneTop - SIZEOF(.stack1_dummy);
+    __StackBottom = __StackTop - SIZEOF(.stack_dummy);
+    PROVIDE(__stack = __StackTop);
+
+    /* picolibc and LLVM */
+    PROVIDE (__heap_start = __end__);
+    PROVIDE (__heap_end = __HeapLimit);
+    PROVIDE( __tls_align = MAX(ALIGNOF(.tdata), ALIGNOF(.tbss)) );
+    PROVIDE( __tls_size_align = (__tls_size + __tls_align - 1) & ~(__tls_align - 1));
+    PROVIDE( __arm32_tls_tcb_offset = MAX(8, __tls_align) );
+
+    /* llvm-libc */
+    PROVIDE (_end = __end__);
+    PROVIDE (__llvm_libc_heap_limit = __HeapLimit);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed")
+
+    ASSERT( __binary_info_header_end - __logical_binary_start <= 1024, "Binary info must be in first 1024 bytes of the binary")
+    ASSERT( __embedded_block_end - __logical_binary_start <= 4096, "Embedded block must be in first 4096 bytes of the binary")
+
+    /* todo assert on extra code */
+    PROVIDE(__mainapp = 0x10003022);
+}
+
@@ -23,19 +23,17 @@

 MEMORY
 {
-    FLASH(rx) :      ORIGIN = 0x10000100, LENGTH = 16384k
-    RAM(rwx) :       ORIGIN = 0x20000000, LENGTH = 212k
-    /* We split RAM into main (where the flash->ram code will be copied) and GLOBALS which has all large arrays */
-    /* By placing those arrays at the end of RAM we can avoid overwriting uninitialize_ram from the main app as */
-    /* long as those vars are stored after 12K by using an alignment value in the main app linker file. */
+    INCLUDE "pico_flash_region.ld"
+    RAM(rwx) : ORIGIN =  0x20000000, LENGTH = 212k
    GLOBALS(rwx) :   ORIGIN = 0x20035000, LENGTH = 44k
-    SCRATCH_X(rwx) : ORIGIN = 0x20040000, LENGTH = 4k
-    SCRATCH_Y(rwx) : ORIGIN = 0x20041000, LENGTH = 4k
+    SCRATCH_X(rwx) : ORIGIN = 0x20080000, LENGTH = 4k
+    SCRATCH_Y(rwx) : ORIGIN = 0x20081000, LENGTH = 4k
 }

 ENTRY(_entry_point)

-SECTIONS {
+SECTIONS
+{
    /* Second stage bootloader is prepended to the image. It must be 256 bytes big
       and checksummed. It is usually built by the boot_stage2 target
       in the Raspberry Pi Pico SDK
@@ -45,24 +43,19 @@ SECTIONS {
    .globals (NOLOAD) : {
    } > GLOBALS

+
    .flash_begin : {
        __flash_binary_start = .;
    } > FLASH
-/*
-    .boot2 : {
-        __boot2_start__ = .;
-        KEEP (*(.boot2))
-        __boot2_end__ = .;
-    } > FLASH

-    ASSERT(__boot2_end__ - __boot2_start__ == 256,
-        "ERROR: Pico second stage bootloader must be 256 bytes in size")
-*/
-    /* The second stage will always enter the image at the start of .text.
+    /* The bootrom will enter the image at the point indicated in your
+       IMAGE_DEF, which is usually the reset handler of your vector table.
+
       The debugger will use the ELF entry point, which is the _entry_point
-       symbol if present, otherwise defaults to start of .text.
-       This can be used to transfer control back to the bootrom on debugger
-       launches only, to perform proper flash setup.
+       symbol, and in our case is *different from the bootrom's entry point.*
+       This is used to go back through the bootrom on debugger launches only,
+       to perform the same initial flash setup that would be performed on a
+       cold boot.
    */

    .flashtext : {
@@ -70,8 +63,11 @@ SECTIONS {
        KEEP (*(.vectors))
        KEEP (*(.binary_info_header))
        __binary_info_header_end = .;
+        KEEP (*(.embedded_block))
+        __embedded_block_end = .;
        KEEP (*(.reset))
-    }
+        . = ALIGN(4);
+    } > FLASH

    .rodata : {
        /* segments not marked as .flashdata are instead pulled into .data (in RAM) to avoid accidental flash accesses */
@@ -79,23 +75,39 @@ SECTIONS {
        . = ALIGN(4);
    } > FLASH

-    .ARM.extab : {
+    .ARM.extab :
+    {
        *(.ARM.extab* .gnu.linkonce.armextab.*)
    } > FLASH

    __exidx_start = .;
-    .ARM.exidx : {
+    .ARM.exidx :
+    {
        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
    } > FLASH
    __exidx_end = .;

+    /* Machine inspectable binary information */
+    . = ALIGN(4);
+    __binary_info_start = .;
+    .binary_info :
+    {
+        KEEP(*(.binary_info.keep.*))
+        *(.binary_info.*)
+    } > FLASH
+    __binary_info_end = .;
    . = ALIGN(4);

    /* Vector table goes first in RAM, to avoid large alignment hole */
-   .ram_vector_table (COPY): {
+    .ram_vector_table (NOLOAD): {
        *(.ram_vector_table)
    } > RAM

+    .uninitialized_data (NOLOAD): {
+        . = ALIGN(4);
+        *(.uninitialized_data*)
+    } > RAM
+
    .text : {
        __ram_text_start__ = .;
        *(.init)
@@ -119,7 +131,7 @@ SECTIONS {
        __ram_text_end__ = .;
    } > RAM AT> FLASH
    __ram_text_source__ = LOADADDR(.text);
-
+    . = ALIGN(4);

    .data : {
        __data_start__ = .;
@@ -176,6 +188,50 @@ SECTIONS {
        *(.uninitialized_data*)
    } > RAM

+    .tdata : {
+        . = ALIGN(4);
+		*(.tdata .tdata.* .gnu.linkonce.td.*)
+        /* All data end */
+        __tdata_end = .;
+    } > RAM AT> FLASH
+    PROVIDE(__data_end__ = .);
+
+    /* __etext is (for backwards compatibility) the name of the .data init source pointer (...) */
+    __etext = LOADADDR(.data);
+
+    .tbss (NOLOAD) : {
+        . = ALIGN(4);
+        __bss_start__ = .;
+        __tls_base = .;
+        *(.tbss .tbss.* .gnu.linkonce.tb.*)
+        *(.tcommon)
+
+        __tls_end = .;
+    } > RAM
+
+    .bss  : {
+        . = ALIGN(4);
+        __tbss_end = .;
+
+        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.bss*)))
+        *(COMMON)
+        PROVIDE(__global_pointer$ = . + 2K);
+        *(.sbss*)
+        . = ALIGN(4);
+        __bss_end__ = .;
+    } > RAM
+
+    .heap (NOLOAD):
+    {
+        __end__ = .;
+        end = __end__;
+        KEEP(*(.heap*))
+        /* historically on GCC sbrk was growing past __HeapLimit to __StackLimit, however
+           to be more compatible, we now set __HeapLimit explicitly to where the end of the heap is */
+        . = ORIGIN(RAM) + LENGTH(RAM);
+        __HeapLimit = .;
+    } > RAM
+
    /* Start and end symbols must be word-aligned */
    .scratch_x : {
        __scratch_x_start__ = .;
@@ -193,22 +249,6 @@ SECTIONS {
    } > SCRATCH_Y AT > FLASH
    __scratch_y_source__ = LOADADDR(.scratch_y);

-    .bss : {
-        . = ALIGN(4);
-        __bss_start__ = .;
-        *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.bss*)))
-        *(COMMON)
-        . = ALIGN(4);
-        __bss_end__ = .;
-    } > RAM
-
-    .heap (COPY): {
-        __end__ = .;
-        end = __end__;
-        *(.heap*)
-        __HeapLimit = .;
-    } > RAM
-
    /* .stack*_dummy section doesn't contains any symbols. It is only
     * used for linker to calculate size of stack sections, and assign
     * values to stack symbols later
@@ -218,16 +258,19 @@ SECTIONS {
    /* by default we put core 0 stack at the end of scratch Y, so that if core 1
     * stack is not used then all of SCRATCH_X is free.
     */
-    .stack1_dummy (COPY): {
+    .stack1_dummy (NOLOAD):
+    {
        *(.stack1*)
    } > SCRATCH_X
-    .stack_dummy (COPY): {
-        *(.stack*)
+    .stack_dummy (NOLOAD):
+    {
+        KEEP(*(.stack*))
    } > SCRATCH_Y

    .flash_end : {
-        __flash_binary_end = .;
-    } > FLASH
+        KEEP(*(.embedded_end_block*))
+        PROVIDE(__flash_binary_end = .);
+    } > FLASH =0xaa

    /* stack limit is poorly named, but historically is maximum heap ptr */
    __StackLimit = ORIGIN(RAM) + LENGTH(RAM);
@@ -237,10 +280,23 @@ SECTIONS {
    __StackBottom = __StackTop - SIZEOF(.stack_dummy);
    PROVIDE(__stack = __StackTop);

+    /* picolibc and LLVM */
+    PROVIDE (__heap_start = __end__);
+    PROVIDE (__heap_end = __HeapLimit);
+    PROVIDE( __tls_align = MAX(ALIGNOF(.tdata), ALIGNOF(.tbss)) );
+    PROVIDE( __tls_size_align = (__tls_size + __tls_align - 1) & ~(__tls_align - 1));
+    PROVIDE( __arm32_tls_tcb_offset = MAX(8, __tls_align) );
+
+    /* llvm-libc */
+    PROVIDE (_end = __end__);
+    PROVIDE (__llvm_libc_heap_limit = __HeapLimit);
+
    /* Check if data + heap + stack exceeds RAM limit */
    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed")

-/*    ASSERT( __binary_info_header_end - __logical_binary_start <= 256, "Binary info must be in first 256 bytes of the binary")*/
+    ASSERT( __binary_info_header_end - __logical_binary_start <= 1024, "Binary info must be in first 1024 bytes of the binary")
+    ASSERT( __embedded_block_end - __logical_binary_start <= 4096, "Embedded block must be in first 4096 bytes of the binary")
+
    /* todo assert on extra code */
 }

@@ -178,6 +178,13 @@ int main(int a, char **b) {

    do_ota();

+#ifdef __riscv
+    extern void __mainapp();
+    __mainapp();
+
+    // Should never get here!
+    return 0;
+#else
    // Reset the interrupt/etc. vectors to the real app.  Will be copied to RAM in app's runtime_init
    scb_hw->vtor = (uint32_t)0x10003000;

@@ -190,6 +197,7 @@ int main(int a, char **b) {

    // Should never get here!
    return *sp;
+#endif
 }
 #pragma GCC pop_options

--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
Earle F. Philhower, III	500fcf2513	Update version	2024-10-01 09:25:29 -07:00
Maximilian Gerhardt	a2164a5b10	Update PIO USB docs, fixup used VID/PID macros (#2505 )	2024-09-30 09:57:21 -07:00
Maximilian Gerhardt	25501953df	Update PIO platform before compile, add RISC-V PIO build to CI (#2504 )	2024-09-30 09:41:16 -07:00
Earle F. Philhower, III	f6973fc64d	Add RISC-V support, GCC 14 move (#2491 ) * Adds RISC-V compilation option to the IDE and Platform.IO. * Build RP2350-RISCV libpico, libbearssl * Fix RP2350 BearSSL library (was copied from RP2040, now built for M33) * New GCC 14.2 toolchain is required (12.4 RISC-V support is borked) * Newlib locking fixed prototypes * Manually force all runtime init code into RP2350 binaries * Add RISC-V to CI * Remove RP2350 BOOT2.S files, binaries (not used) * Clean up minor GCC 14.x warnings * Add RP2350-RISCV OTA build, link * Add RISC-V FreeRTOS files (configuration still not running, but builds) * Add basic documentation	2024-09-29 15:10:36 -07:00
Earle F. Philhower, III	f49d058477	Update version	2024-09-24 06:59:23 -07:00
Earle F. Philhower, III	777eacdfc3	Wire probe clock stretch up to 500us (#2493 ) As reported by @Rasmusfk in #2455, allow for a longer clock stretch period during probes.	2024-09-24 06:58:41 -07:00
Sylwester	39ad2aeced	Add Datanoise PicoADK v2 (RP2350). (#2413 )	2024-09-24 06:46:05 -07:00
Earle F. Philhower, III	a9fd579ce9	Add new Pico SDK AON_Timer module (#2489 ) Fixes #2488	2024-09-22 15:16:28 -07:00
Earle F. Philhower, III	a6ab6e1f95	Fix FreeRTOS Flash Freeze, Fastly (#2486 ) Fixes #2485	2024-09-20 15:04:56 -07:00
Earle F. Philhower, III	b2ec6ecb09	GCC to 12.4, Newlib to 4.3.0, faster RP2350 libs (#2480 ) Newlib built using `-Os` causes things like `memcpy` to be very slow on the RP2350 because it uses byte-wise operations. On the RP2040 this doesn't matter because there is a ROM routine we use instead of the library, but on the Pico 2 it's almost 10x slower than the optimal method. Update GCC to 12.4 Update Newlib to 4.4.0 Move to -O2 library compilation New toolchain looks to add ~10K to RP2350 flash usage (less on the RP2040).	2024-09-19 17:03:23 -07:00
Earle F. Philhower, III	f18fa88565	Update DMAMemcpy.ino (#2481 ) Use 64-bit cycle counts to avoid occasional overflows.	2024-09-19 09:25:29 -07:00
Tom MagnierandTom Magnier	07b7d9748b	I2C lib : implement "bus recovery" feature on timeout reset (#2479 ) * I2C lib : implement "bus recovery" feature on timeout reset --------- Co-authored-by: Tom Magnier <tom@tmagnier.fr>	2024-09-19 08:58:47 -07:00
Earle F. Philhower, III	66c1f78f7d	Minimize skipped ESPHost CI tests (#2477 )	2024-09-18 08:28:05 -07:00
Pontus OldbergandPontus Oldberg	f6940cc04e	Adds support for ESP Hosted to WiFi/BLE boards and adds a menu item for ESP WiFi selection (#2468 ) * Adds a menu item for selecting type of ESP wifi type. * Updated pin definitions to work with ESP hosted. * Fixed residual debug modification. * Added ESPHost support library. * Removed local cloning of ESPHost and added to excluded from CI * Updated boards.txt --------- Co-authored-by: Pontus Oldberg <pontus.oldberg@non.se.com>	2024-09-18 07:16:23 -07:00
Earle F. Philhower, III	5830cd8e7d	Clean up libpico Cmakefile, 1 entry per line (#2474 ) Split the 1300+ char define-setting line into a multi-line value. Makes it more maintainable and easier to see when changes needed. No settings should have been modified.	2024-09-17 18:26:16 -07:00
Earle F. Philhower, III	2063a2d23d	Enable OTA support for RP2350 (#2472 ) The RP2350 has a different blob header requirement to identify a working image. Ensure that header is present in the OTA loader. Update the PicoOTA examples for the 2350	2024-09-17 15:05:42 -07:00
Earle F. Philhower, III	4504d72972	Don't realloc(nullptr) from PSRAM by default (#2473 ) Several Arduino APIs realloc(NULL) which is legal and equivalent to "malloc()", but the PSRAM logic was placing those malloc calls in PSRAM and not RAM because "0" < RAM_START. Ensure the realloc address is non-null and before RAM_START before using PSRAM.	2024-09-17 14:46:41 -07:00
Yveaux	5db8063756	Also remove CFG_TUSB_DEBUG from platformio-build.py for rp2350 (#2471 )	2024-09-17 11:52:30 -07:00
Yveaux	5fbda35282	Remove CFG_TUSB_DEBUG for rp2350 (#2469 )	2024-09-17 11:21:16 -07:00
Liz Scott Shawcroft ladyada	163b209d6c	Add Adafruit Feather RP2350 with HSTX (#2459 ) * Add xosc delay for RP2350 * init feather rp2350 addition * Update Feather RP2350 JSON --------- Co-authored-by: Scott Shawcroft <scott@tannewt.org> Co-authored-by: ladyada <support@adafruit.com>	2024-09-17 09:45:45 -07:00
Earle F. Philhower, III	ccdc76c279	Update freertos.rst - FreeRTOS RP2350 support added	2024-09-16 16:59:19 -07:00
Earle F. Philhower, III	e88d2d0469	Update rp2350.rst - FreeRTOS support added	2024-09-16 16:57:32 -07:00
Earle F. Philhower, IIIandfietser28	a0b3876de4	Add FreeRTOS support for RP2350 (#2406 ) Pull in Raspberry Pi's custom RP2350 ARM and RISC-V ports for FreeRTOS. Basic tests run, but stress mutex test is failing in unique and interesting ways. * Add simplified switching test catching task swap problem * Freertosrp2350: use FreeRTOS macros in noInterrupts/interrupts when applicable. (#2456) * Use FreeRTOS macros in noInterrupts/interrupts when applicable. * Fixed calling taskEXIT_CRITICAL and taskENTER_CRITICAL --------- Co-authored-by: fietser28 <fietser28@users.noreply.github.com>	2024-09-16 16:56:22 -07:00
Earle F. Philhower, III	5f6e4aff5c	Allow LWIP Ethernet HW IRQs > 32 (#2464 ) Allow RP2350B boards to use GPIOs 31+ for the Ethernet HW IRQ line. Also update SPI debug output with the new registers.	2024-09-16 12:35:46 -07:00
Earle F. Philhower, III	4d1d1d2304	Fix PICO_RP2350B define check for other peripherals (#2463 ) Fixes #2461	2024-09-16 11:16:08 -07:00
Earle F. Philhower, III	1f291482cd	Fix SerialUART RP2350B define checks Fixes #2460	2024-09-16 09:27:08 -07:00
Tom MagnierandTom Magnier	d26a358055	I2C lib: Handle timeout in write() (#2458 ) Co-authored-by: Tom Magnier <tom@tmagnier.fr>	2024-09-16 08:08:21 -07:00
Earle F. Philhower, III	aaaa99d969	Support PIO2 for SoftwareSerial/SerialPIO (#2451 ) New IRQs and PIO pointers required for the 3rd PIO on the 2350. Fixes #2447	2024-09-13 12:25:55 -07:00
SamHalvoe	12130eb767	Add "#define PICO_RP2350B 1" since this board is based on RP2350B (#2445 )	2024-09-12 12:50:04 -07:00
arturo182	f5c85fa958	Solderparty_rp2350_stamp_xl: Properly mark as using RP2350B (#2446 )	2024-09-12 11:52:30 -07:00
				`@@ -0,0 +1 @@`
				`#include "../lib/FreeRTOS-Kernel/include/mpu_syscall_numbers.h"`