Fix memory leak in tone/noTone calls (#125)

Was never deleting the tone object on noTone, so eventually the leaked
objects would fill up heap and cause a crash.

Fixes #121

README.md

@@ -98,6 +98,7 @@ The installed tools include a version of OpenOCD (in the pqt-openocd directory)
 
 # Status of Port
 Relatively stable and very functional, but bug reports and PRs always accepted.
+* Multicore support (setup1() and loop1())
 * digitalWrite/Read
 * shiftIn/Out
 * SPI master
@@ -136,7 +137,7 @@ If you want to contribute or have bugfixes, drop me a note at <earlephilhower@ya
 * The [Pico-SDK](https://github.com/raspberrypi/pico-sdk) and [Pico-Extras](https://github.com/raspberrypi/pico-extras) are by Raspberry Pi (Trading) Ltd and licensed under the BSD 3-Clause license.
 * [Arduino-Pico](https://github.com/earlephilhower/arduino-pico) core files are licenses under the LGPL.
 * [LittleFS](https://github.com/ARMmbed/littlefs) library written by ARM Limited and released under the [BSD 3-clause license](https://github.com/ARMmbed/littlefs/blob/master/LICENSE.md).
-* [UF2CONV.PY](https://github.com/microsoft/uf2) is by Microsoft Corporatio and licensed under the MIT license.
+* [UF2CONV.PY](https://github.com/microsoft/uf2) is by Microsoft Corporation and licensed under the MIT license.
 * Some filesystem code taken from the [ESP8266 Arduino Core](https://github.com/esp8266/Arduino) and licensed under the LGPL.
 
 -Earle F. Philhower, III

cores/rp2040/Bootsel.cpp

@@ -26,7 +26,8 @@ static bool __no_inline_not_in_flash_func(get_bootsel_button)() {
 
     // Must disable interrupts, as interrupt handlers may be in flash, and we
     // are about to temporarily disable flash access!
-    uint32_t flags = save_and_disable_interrupts();
+    noInterrupts();
+    rp2040.idleOtherCore();
 
     // Set chip select to Hi-Z
     hw_write_masked(&ioqspi_hw->io[CS_PIN_INDEX].ctrl,
@@ -46,7 +47,8 @@ static bool __no_inline_not_in_flash_func(get_bootsel_button)() {
                     GPIO_OVERRIDE_NORMAL << IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_LSB,
                     IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_BITS);
 
-    restore_interrupts(flags);
+    interrupts();
+    rp2040.resumeOtherCore();
 
     return button_state;
 }

cores/rp2040/RP2040.h

@@ -23,6 +23,7 @@
 #include <hardware/pio.h>
 #include <pico/multicore.h>
 #include <pico/util/queue.h>
+#include <CoreMutex.h>
 
 class _MFIFO {
 public:
@@ -132,7 +133,6 @@ public:
 extern RP2040 rp2040;
 
 // Wrapper class for PIO programs, abstracting common operations out
-// TODO - Make dualcore safe
 // TODO - Add unload/destructor
 class PIOProgram {
 public:
@@ -140,6 +140,8 @@ public:
 
     // Possibly load into a PIO and allocate a SM
     bool prepare(PIO *pio, int *sm, int *offset) {
+        extern mutex_t _pioMutex;
+        CoreMutex m(&_pioMutex);
         // Is there an open slot to run in, first?
         if (!_findFreeSM(pio, sm)) return false;
 	// Is it loaded on that PIO?

cores/rp2040/Tone.cpp

@@ -95,6 +95,7 @@ void noTone(uint8_t pin) {
     if (entry != _toneMap.end()) {
         pio_sm_set_enabled(entry->second->pio, entry->second->sm, false);
 	pio_sm_unclaim(entry->second->pio, entry->second->sm);
+        delete entry->second;
         _toneMap.erase(entry);
         pinMode(pin, OUTPUT);
         digitalWrite(pin, LOW);

cores/rp2040/main.cpp

@@ -25,6 +25,8 @@
 RP2040 rp2040;
 
 volatile bool _MFIFO::_otherIdled = false;
+mutex_t _pioMutex;
+
 
 extern void setup();
 extern void loop();
@@ -55,6 +57,7 @@ extern "C" int main() {
     set_sys_clock_khz(F_CPU / 1000, true);
 #endif
 
+    mutex_init(&_pioMutex);
     initVariant();
 
 #ifndef DISABLE_USB_SERIAL

docs/multicore.rst

@@ -30,7 +30,7 @@ pauses core 1, and vice versa).  Waits for the other core to acknowledge
 before returning.
 
 The other core will have its interrupts disabled and be busy-waiting in
-an RAM-based routine, so flash and other peripherals can be accesses.
+an RAM-based routine, so flash and other peripherals can be accessed.
 
 **NOTE** If you idle core 0 too long, then the USB port can become frozen.
 This is because core 0 manages the USB and needs to service IRQs in a
@@ -46,7 +46,7 @@ Communicating Between Cores
 
 The RP2040 provides a hardware FIFO for communicating between cores, but it
 is used exclusively for the idle/resume calls described above.  Instead, please
-use the following functions to access a softwarae-managed, multicore safe
+use the following functions to access a software-managed, multicore safe
 FIFO.
 
 void rp2040.fifo.push(uint32_t)

keywords.txt

@@ -9,6 +9,8 @@
 #######################################
 # Methods and Functions (KEYWORD2)
 #######################################
+setup1  KEYWORD2
+loop2   KEYWORD2
 analogWriteFreq	KEYWORD2
 analogWriteRange	KEYWORD2
 analogWriteResolution KEYWORD2