Releases v1.0.0 to support RP2040-based boards
### Initial Releases v1.0.0 1. Initial coding to support RP2040-based boards such as RASPBERRY_PI_PICO. etc. using [Earle Philhower's arduino-pico core](https://github.com/earlephilhower/arduino-pico)
This commit is contained in:
@@ -0,0 +1,383 @@
|
||||
/****************************************************************************************************************************
|
||||
RPi_Pico_ISR_Timer.cpp
|
||||
For RP2040-based boards such as RASPBERRY_PI_PICO, ADAFRUIT_FEATHER_RP2040 and GENERIC_RP2040.
|
||||
Written by Khoi Hoang
|
||||
|
||||
Built by Khoi Hoang https://github.com/khoih-prog/RPI_PICO_TimerInterrupt
|
||||
Licensed under MIT license
|
||||
|
||||
The RPI_PICO system timer peripheral provides a global microsecond timebase for the system, and generates
|
||||
interrupts based on this timebase. It supports the following features:
|
||||
• A single 64-bit counter, incrementing once per microsecond
|
||||
• This counter can be read from a pair of latching registers, for race-free reads over a 32-bit bus.
|
||||
• Four alarms: match on the lower 32 bits of counter, IRQ on match: TIMER_IRQ_0-TIMER_IRQ_3
|
||||
|
||||
Now even you use all these new 16 ISR-based timers,with their maximum interval practically unlimited (limited only by
|
||||
unsigned long miliseconds), you just consume only one RPI_PICO timer and avoid conflicting with other cores' tasks.
|
||||
The accuracy is nearly perfect compared to software timers. The most important feature is they're ISR-based timers
|
||||
Therefore, their executions are not blocked by bad-behaving functions / tasks.
|
||||
This important feature is absolutely necessary for mission-critical tasks.
|
||||
|
||||
Based on SimpleTimer - A timer library for Arduino.
|
||||
Author: mromani@ottotecnica.com
|
||||
Copyright (c) 2010 OTTOTECNICA Italy
|
||||
|
||||
Based on BlynkTimer.h
|
||||
Author: Volodymyr Shymanskyy
|
||||
|
||||
Version: 1.0.0
|
||||
|
||||
Version Modified By Date Comments
|
||||
------- ----------- ---------- -----------
|
||||
1.0.0 K Hoang 11/05/2021 Initial coding to support RP2040-based boards such as RASPBERRY_PI_PICO. etc.
|
||||
*****************************************************************************************************************************/
|
||||
|
||||
#include <string.h>
|
||||
|
||||
#include "RPi_Pico_ISR_Timer.h"
|
||||
|
||||
RPI_PICO_ISR_Timer::RPI_PICO_ISR_Timer()
|
||||
: numTimers (-1)
|
||||
{
|
||||
}
|
||||
|
||||
void RPI_PICO_ISR_Timer::init()
|
||||
{
|
||||
unsigned long current_millis = millis(); //elapsed();
|
||||
|
||||
for (uint8_t i = 0; i < RPI_PICO_MAX_TIMERS; i++)
|
||||
{
|
||||
memset((void*) &timer[i], 0, sizeof (timer_t));
|
||||
timer[i].prev_millis = current_millis;
|
||||
}
|
||||
|
||||
numTimers = 0;
|
||||
}
|
||||
|
||||
void RPI_PICO_ISR_Timer::run()
|
||||
{
|
||||
uint8_t i;
|
||||
unsigned long current_millis;
|
||||
|
||||
// get current time
|
||||
current_millis = millis(); //elapsed();
|
||||
|
||||
// RPI_PICO is a multi core / multi processing chip. It is mandatory to disable task switches during ISR
|
||||
rp2040.idleOtherCore();
|
||||
|
||||
for (i = 0; i < RPI_PICO_MAX_TIMERS; i++)
|
||||
{
|
||||
|
||||
timer[i].toBeCalled = RPI_PICO_DEFCALL_DONTRUN;
|
||||
|
||||
// no callback == no timer, i.e. jump over empty slots
|
||||
if (timer[i].callback != NULL)
|
||||
{
|
||||
|
||||
// is it time to process this timer ?
|
||||
// see http://arduino.cc/forum/index.php/topic,124048.msg932592.html#msg932592
|
||||
|
||||
if ((current_millis - timer[i].prev_millis) >= timer[i].delay)
|
||||
{
|
||||
unsigned long skipTimes = (current_millis - timer[i].prev_millis) / timer[i].delay;
|
||||
|
||||
// update time
|
||||
timer[i].prev_millis += timer[i].delay * skipTimes;
|
||||
|
||||
// check if the timer callback has to be executed
|
||||
if (timer[i].enabled)
|
||||
{
|
||||
|
||||
// "run forever" timers must always be executed
|
||||
if (timer[i].maxNumRuns == RPI_PICO_RUN_FOREVER)
|
||||
{
|
||||
timer[i].toBeCalled = RPI_PICO_DEFCALL_RUNONLY;
|
||||
}
|
||||
// other timers get executed the specified number of times
|
||||
else if (timer[i].numRuns < timer[i].maxNumRuns)
|
||||
{
|
||||
timer[i].toBeCalled = RPI_PICO_DEFCALL_RUNONLY;
|
||||
timer[i].numRuns++;
|
||||
|
||||
// after the last run, delete the timer
|
||||
if (timer[i].numRuns >= timer[i].maxNumRuns)
|
||||
{
|
||||
timer[i].toBeCalled = RPI_PICO_DEFCALL_RUNANDDEL;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < RPI_PICO_MAX_TIMERS; i++)
|
||||
{
|
||||
if (timer[i].toBeCalled == RPI_PICO_DEFCALL_DONTRUN)
|
||||
continue;
|
||||
|
||||
if (timer[i].hasParam)
|
||||
(*(timer_callback_p)timer[i].callback)(timer[i].param);
|
||||
else
|
||||
(*(timer_callback)timer[i].callback)();
|
||||
|
||||
if (timer[i].toBeCalled == RPI_PICO_DEFCALL_RUNANDDEL)
|
||||
deleteTimer(i);
|
||||
}
|
||||
|
||||
// RPI_PICO is a multi core / multi processing chip. It is mandatory to disable task switches during ISR
|
||||
rp2040.resumeOtherCore();
|
||||
|
||||
}
|
||||
|
||||
|
||||
// find the first available slot
|
||||
// return -1 if none found
|
||||
int RPI_PICO_ISR_Timer::findFirstFreeSlot()
|
||||
{
|
||||
// all slots are used
|
||||
if (numTimers >= RPI_PICO_MAX_TIMERS)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
// return the first slot with no callback (i.e. free)
|
||||
for (uint8_t i = 0; i < RPI_PICO_MAX_TIMERS; i++)
|
||||
{
|
||||
if (timer[i].callback == NULL)
|
||||
{
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
||||
// no free slots found
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
int RPI_PICO_ISR_Timer::setupTimer(unsigned long d, void* f, void* p, bool h, unsigned n)
|
||||
{
|
||||
int freeTimer;
|
||||
|
||||
if (numTimers < 0)
|
||||
{
|
||||
init();
|
||||
}
|
||||
|
||||
freeTimer = findFirstFreeSlot();
|
||||
if (freeTimer < 0)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (f == NULL)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
timer[freeTimer].delay = d;
|
||||
timer[freeTimer].callback = f;
|
||||
timer[freeTimer].param = p;
|
||||
timer[freeTimer].hasParam = h;
|
||||
timer[freeTimer].maxNumRuns = n;
|
||||
timer[freeTimer].enabled = true;
|
||||
timer[freeTimer].prev_millis = millis();
|
||||
|
||||
numTimers++;
|
||||
|
||||
return freeTimer;
|
||||
}
|
||||
|
||||
|
||||
int RPI_PICO_ISR_Timer::setTimer(unsigned long d, timer_callback f, unsigned n)
|
||||
{
|
||||
return setupTimer(d, (void *)f, NULL, false, n);
|
||||
}
|
||||
|
||||
int RPI_PICO_ISR_Timer::setTimer(unsigned long d, timer_callback_p f, void* p, unsigned n)
|
||||
{
|
||||
return setupTimer(d, (void *)f, p, true, n);
|
||||
}
|
||||
|
||||
int RPI_PICO_ISR_Timer::setInterval(unsigned long d, timer_callback f)
|
||||
{
|
||||
return setupTimer(d, (void *)f, NULL, false, RPI_PICO_RUN_FOREVER);
|
||||
}
|
||||
|
||||
int RPI_PICO_ISR_Timer::setInterval(unsigned long d, timer_callback_p f, void* p)
|
||||
{
|
||||
return setupTimer(d, (void *)f, p, true, RPI_PICO_RUN_FOREVER);
|
||||
}
|
||||
|
||||
int RPI_PICO_ISR_Timer::setTimeout(unsigned long d, timer_callback f)
|
||||
{
|
||||
return setupTimer(d, (void *)f, NULL, false, RPI_PICO_RUN_ONCE);
|
||||
}
|
||||
|
||||
int RPI_PICO_ISR_Timer::setTimeout(unsigned long d, timer_callback_p f, void* p)
|
||||
{
|
||||
return setupTimer(d, (void *)f, p, true, RPI_PICO_RUN_ONCE);
|
||||
}
|
||||
|
||||
bool RPI_PICO_ISR_Timer::changeInterval(unsigned numTimer, unsigned long d)
|
||||
{
|
||||
if (numTimer >= RPI_PICO_MAX_TIMERS)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
// Updates interval of existing specified timer
|
||||
if (timer[numTimer].callback != NULL)
|
||||
{
|
||||
// RPI_PICO is a multi core / multi processing chip. It is mandatory to disable task switches during modifying shared vars
|
||||
rp2040.idleOtherCore();
|
||||
|
||||
timer[numTimer].delay = d;
|
||||
timer[numTimer].prev_millis = millis();
|
||||
|
||||
// RPI_PICO is a multi core / multi processing chip. It is mandatory to disable task switches during modifying shared vars
|
||||
rp2040.resumeOtherCore();
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
// false return for non-used numTimer, no callback
|
||||
return false;
|
||||
}
|
||||
|
||||
void RPI_PICO_ISR_Timer::deleteTimer(unsigned timerId)
|
||||
{
|
||||
if (timerId >= RPI_PICO_MAX_TIMERS)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
// nothing to delete if no timers are in use
|
||||
if (numTimers == 0)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
// don't decrease the number of timers if the specified slot is already empty
|
||||
if (timer[timerId].callback != NULL)
|
||||
{
|
||||
// RPI_PICO is a multi core / multi processing chip. It is mandatory to disable task switches during modifying shared vars
|
||||
rp2040.idleOtherCore();
|
||||
|
||||
memset((void*) &timer[timerId], 0, sizeof (timer_t));
|
||||
timer[timerId].prev_millis = millis();
|
||||
|
||||
// update number of timers
|
||||
numTimers--;
|
||||
|
||||
// RPI_PICO is a multi core / multi processing chip. It is mandatory to disable task switches during modifying shared vars
|
||||
rp2040.resumeOtherCore();
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
// function contributed by code@rowansimms.com
|
||||
void RPI_PICO_ISR_Timer::restartTimer(unsigned numTimer)
|
||||
{
|
||||
if (numTimer >= RPI_PICO_MAX_TIMERS)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
// RPI_PICO is a multi core / multi processing chip. It is mandatory to disable task switches during modifying shared vars
|
||||
rp2040.idleOtherCore();
|
||||
|
||||
timer[numTimer].prev_millis = millis();
|
||||
|
||||
// RPI_PICO is a multi core / multi processing chip. It is mandatory to disable task switches during modifying shared vars
|
||||
rp2040.resumeOtherCore();
|
||||
}
|
||||
|
||||
|
||||
bool RPI_PICO_ISR_Timer::isEnabled(unsigned numTimer)
|
||||
{
|
||||
if (numTimer >= RPI_PICO_MAX_TIMERS)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
return timer[numTimer].enabled;
|
||||
}
|
||||
|
||||
|
||||
void RPI_PICO_ISR_Timer::enable(unsigned numTimer)
|
||||
{
|
||||
if (numTimer >= RPI_PICO_MAX_TIMERS)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
timer[numTimer].enabled = true;
|
||||
}
|
||||
|
||||
|
||||
void RPI_PICO_ISR_Timer::disable(unsigned numTimer)
|
||||
{
|
||||
if (numTimer >= RPI_PICO_MAX_TIMERS)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
timer[numTimer].enabled = false;
|
||||
}
|
||||
|
||||
void RPI_PICO_ISR_Timer::enableAll()
|
||||
{
|
||||
// Enable all timers with a callback assigned (used)
|
||||
|
||||
// RPI_PICO is a multi core / multi processing chip. It is mandatory to disable task switches during modifying shared vars
|
||||
rp2040.idleOtherCore();
|
||||
|
||||
for (uint8_t i = 0; i < RPI_PICO_MAX_TIMERS; i++)
|
||||
{
|
||||
if (timer[i].callback != NULL && timer[i].numRuns == RPI_PICO_RUN_FOREVER)
|
||||
{
|
||||
timer[i].enabled = true;
|
||||
}
|
||||
}
|
||||
|
||||
// RPI_PICO is a multi core / multi processing chip. It is mandatory to disable task switches during modifying shared vars
|
||||
rp2040.resumeOtherCore();
|
||||
}
|
||||
|
||||
void RPI_PICO_ISR_Timer::disableAll()
|
||||
{
|
||||
// Disable all timers with a callback assigned (used)
|
||||
|
||||
// RPI_PICO is a multi core / multi processing chip. It is mandatory to disable task switches during modifying shared vars
|
||||
rp2040.idleOtherCore();
|
||||
|
||||
for (uint8_t i = 0; i < RPI_PICO_MAX_TIMERS; i++)
|
||||
{
|
||||
if (timer[i].callback != NULL && timer[i].numRuns == RPI_PICO_RUN_FOREVER)
|
||||
{
|
||||
timer[i].enabled = false;
|
||||
}
|
||||
}
|
||||
|
||||
// RPI_PICO is a multi core / multi processing chip. It is mandatory to disable task switches during modifying shared vars
|
||||
rp2040.resumeOtherCore();
|
||||
|
||||
}
|
||||
|
||||
void RPI_PICO_ISR_Timer::toggle(unsigned numTimer)
|
||||
{
|
||||
if (numTimer >= RPI_PICO_MAX_TIMERS)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
timer[numTimer].enabled = !timer[numTimer].enabled;
|
||||
}
|
||||
|
||||
|
||||
unsigned RPI_PICO_ISR_Timer::getNumTimers()
|
||||
{
|
||||
return numTimers;
|
||||
}
|
||||
|
||||
|
||||
@@ -0,0 +1,189 @@
|
||||
/****************************************************************************************************************************
|
||||
RPi_Pico_ISR_Timer.h
|
||||
For RP2040-based boards such as RASPBERRY_PI_PICO, ADAFRUIT_FEATHER_RP2040 and GENERIC_RP2040.
|
||||
Written by Khoi Hoang
|
||||
|
||||
Built by Khoi Hoang https://github.com/khoih-prog/RPI_PICO_TimerInterrupt
|
||||
Licensed under MIT license
|
||||
|
||||
The RPI_PICO system timer peripheral provides a global microsecond timebase for the system, and generates
|
||||
interrupts based on this timebase. It supports the following features:
|
||||
• A single 64-bit counter, incrementing once per microsecond
|
||||
• This counter can be read from a pair of latching registers, for race-free reads over a 32-bit bus.
|
||||
• Four alarms: match on the lower 32 bits of counter, IRQ on match: TIMER_IRQ_0-TIMER_IRQ_3
|
||||
|
||||
Now even you use all these new 16 ISR-based timers,with their maximum interval practically unlimited (limited only by
|
||||
unsigned long miliseconds), you just consume only one RPI_PICO timer and avoid conflicting with other cores' tasks.
|
||||
The accuracy is nearly perfect compared to software timers. The most important feature is they're ISR-based timers
|
||||
Therefore, their executions are not blocked by bad-behaving functions / tasks.
|
||||
This important feature is absolutely necessary for mission-critical tasks.
|
||||
|
||||
Based on SimpleTimer - A timer library for Arduino.
|
||||
Author: mromani@ottotecnica.com
|
||||
Copyright (c) 2010 OTTOTECNICA Italy
|
||||
|
||||
Based on BlynkTimer.h
|
||||
Author: Volodymyr Shymanskyy
|
||||
|
||||
Version: 1.0.0
|
||||
|
||||
Version Modified By Date Comments
|
||||
------- ----------- ---------- -----------
|
||||
1.0.0 K Hoang 11/05/2021 Initial coding to support RP2040-based boards such as RASPBERRY_PI_PICO. etc.
|
||||
*****************************************************************************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef ISR_TIMER_GENERIC_H
|
||||
#define ISR_TIMER_GENERIC_H
|
||||
|
||||
#if !( defined(ARDUINO_RASPBERRY_PI_PICO) || defined(ARDUINO_ADAFRUIT_FEATHER_RP2040) || defined(ARDUINO_GENERIC_RP2040) )
|
||||
#error This code is intended to run on the RASPBERRY_PI_PICO platform! Please check your Tools->Board setting.
|
||||
#endif
|
||||
|
||||
#ifndef RPI_PICO_TIMER_INTERRUPT_VERSION
|
||||
#define RPI_PICO_TIMER_INTERRUPT_VERSION "RPi_Pico_TimerInterrupt v1.0.0"
|
||||
#endif
|
||||
|
||||
#include "TimerInterrupt_Generic_Debug.h"
|
||||
|
||||
#include <stddef.h>
|
||||
|
||||
#include <inttypes.h>
|
||||
|
||||
#include "pico/multicore.h"
|
||||
|
||||
#if defined(ARDUINO)
|
||||
#if ARDUINO >= 100
|
||||
#include <Arduino.h>
|
||||
#else
|
||||
#include <WProgram.h>
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define FLAG_VALUE 0xDEADBEEF
|
||||
|
||||
#define RPI_PICO_ISR_Timer RPI_PICO_ISRTimer
|
||||
|
||||
typedef void (*timer_callback)();
|
||||
typedef void (*timer_callback_p)(void *);
|
||||
|
||||
class RPI_PICO_ISR_Timer
|
||||
{
|
||||
|
||||
public:
|
||||
// maximum number of timers
|
||||
#define RPI_PICO_MAX_TIMERS 16
|
||||
#define RPI_PICO_RUN_FOREVER 0
|
||||
#define RPI_PICO_RUN_ONCE 1
|
||||
|
||||
// constructor
|
||||
RPI_PICO_ISR_Timer();
|
||||
|
||||
void init();
|
||||
|
||||
// this function must be called inside loop()
|
||||
void run();
|
||||
|
||||
// Timer will call function 'f' every 'd' milliseconds forever
|
||||
// returns the timer number (numTimer) on success or
|
||||
// -1 on failure (f == NULL) or no free timers
|
||||
int setInterval(unsigned long d, timer_callback f);
|
||||
|
||||
// Timer will call function 'f' with parameter 'p' every 'd' milliseconds forever
|
||||
// returns the timer number (numTimer) on success or
|
||||
// -1 on failure (f == NULL) or no free timers
|
||||
int setInterval(unsigned long d, timer_callback_p f, void* p);
|
||||
|
||||
// Timer will call function 'f' after 'd' milliseconds one time
|
||||
// returns the timer number (numTimer) on success or
|
||||
// -1 on failure (f == NULL) or no free timers
|
||||
int setTimeout(unsigned long d, timer_callback f);
|
||||
|
||||
// Timer will call function 'f' with parameter 'p' after 'd' milliseconds one time
|
||||
// returns the timer number (numTimer) on success or
|
||||
// -1 on failure (f == NULL) or no free timers
|
||||
int setTimeout(unsigned long d, timer_callback_p f, void* p);
|
||||
|
||||
// Timer will call function 'f' every 'd' milliseconds 'n' times
|
||||
// returns the timer number (numTimer) on success or
|
||||
// -1 on failure (f == NULL) or no free timers
|
||||
int setTimer(unsigned long d, timer_callback f, unsigned n);
|
||||
|
||||
// Timer will call function 'f' with parameter 'p' every 'd' milliseconds 'n' times
|
||||
// returns the timer number (numTimer) on success or
|
||||
// -1 on failure (f == NULL) or no free timers
|
||||
int setTimer(unsigned long d, timer_callback_p f, void* p, unsigned n);
|
||||
|
||||
// updates interval of the specified timer
|
||||
bool changeInterval(unsigned numTimer, unsigned long d);
|
||||
|
||||
// destroy the specified timer
|
||||
void deleteTimer(unsigned numTimer);
|
||||
|
||||
// restart the specified timer
|
||||
void restartTimer(unsigned numTimer);
|
||||
|
||||
// returns true if the specified timer is enabled
|
||||
bool isEnabled(unsigned numTimer);
|
||||
|
||||
// enables the specified timer
|
||||
void enable(unsigned numTimer);
|
||||
|
||||
// disables the specified timer
|
||||
void disable(unsigned numTimer);
|
||||
|
||||
// enables all timers
|
||||
void enableAll();
|
||||
|
||||
// disables all timers
|
||||
void disableAll();
|
||||
|
||||
// enables the specified timer if it's currently disabled, and vice-versa
|
||||
void toggle(unsigned numTimer);
|
||||
|
||||
// returns the number of used timers
|
||||
unsigned getNumTimers();
|
||||
|
||||
// returns the number of available timers
|
||||
unsigned getNumAvailableTimers()
|
||||
{
|
||||
return RPI_PICO_MAX_TIMERS - numTimers;
|
||||
};
|
||||
|
||||
private:
|
||||
// deferred call constants
|
||||
#define RPI_PICO_DEFCALL_DONTRUN 0 // don't call the callback function
|
||||
#define RPI_PICO_DEFCALL_RUNONLY 1 // call the callback function but don't delete the timer
|
||||
#define RPI_PICO_DEFCALL_RUNANDDEL 2 // call the callback function and delete the timer
|
||||
|
||||
// low level function to initialize and enable a new timer
|
||||
// returns the timer number (numTimer) on success or
|
||||
// -1 on failure (f == NULL) or no free timers
|
||||
int setupTimer(unsigned long d, void* f, void* p, bool h, unsigned n);
|
||||
|
||||
// find the first available slot
|
||||
int findFirstFreeSlot();
|
||||
|
||||
typedef struct
|
||||
{
|
||||
unsigned long prev_millis; // value returned by the millis() function in the previous run() call
|
||||
void* callback; // pointer to the callback function
|
||||
void* param; // function parameter
|
||||
bool hasParam; // true if callback takes a parameter
|
||||
unsigned long delay; // delay value
|
||||
unsigned maxNumRuns; // number of runs to be executed
|
||||
unsigned numRuns; // number of executed runs
|
||||
bool enabled; // true if enabled
|
||||
unsigned toBeCalled; // deferred function call (sort of) - N.B.: only used in run()
|
||||
} timer_t;
|
||||
|
||||
volatile timer_t timer[RPI_PICO_MAX_TIMERS];
|
||||
|
||||
// actual number of timers in use (-1 means uninitialized)
|
||||
volatile int numTimers;
|
||||
};
|
||||
|
||||
#endif // ISR_TIMER_GENERIC_H
|
||||
|
||||
|
||||
@@ -0,0 +1,198 @@
|
||||
|
||||
/****************************************************************************************************************************
|
||||
RPi_Pico_TimerInterrupt.h
|
||||
For RP2040-based boards such as RASPBERRY_PI_PICO, ADAFRUIT_FEATHER_RP2040 and GENERIC_RP2040.
|
||||
Written by Khoi Hoang
|
||||
|
||||
Built by Khoi Hoang https://github.com/khoih-prog/RPI_PICO_TimerInterrupt
|
||||
Licensed under MIT license
|
||||
|
||||
The RPI_PICO system timer peripheral provides a global microsecond timebase for the system, and generates
|
||||
interrupts based on this timebase. It supports the following features:
|
||||
• A single 64-bit counter, incrementing once per microsecond
|
||||
• This counter can be read from a pair of latching registers, for race-free reads over a 32-bit bus.
|
||||
• Four alarms: match on the lower 32 bits of counter, IRQ on match: TIMER_IRQ_0-TIMER_IRQ_3
|
||||
|
||||
Now even you use all these new 16 ISR-based timers,with their maximum interval practically unlimited (limited only by
|
||||
unsigned long miliseconds), you just consume only one RPI_PICO timer and avoid conflicting with other cores' tasks.
|
||||
The accuracy is nearly perfect compared to software timers. The most important feature is they're ISR-based timers
|
||||
Therefore, their executions are not blocked by bad-behaving functions / tasks.
|
||||
This important feature is absolutely necessary for mission-critical tasks.
|
||||
|
||||
Based on SimpleTimer - A timer library for Arduino.
|
||||
Author: mromani@ottotecnica.com
|
||||
Copyright (c) 2010 OTTOTECNICA Italy
|
||||
|
||||
Based on BlynkTimer.h
|
||||
Author: Volodymyr Shymanskyy
|
||||
|
||||
Version: 1.0.0
|
||||
|
||||
Version Modified By Date Comments
|
||||
------- ----------- ---------- -----------
|
||||
1.0.0 K Hoang 11/05/2021 Initial coding to support RP2040-based boards such as RASPBERRY_PI_PICO. etc.
|
||||
*****************************************************************************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef RPI_PICO_TIMERINTERRUPT_H
|
||||
#define RPI_PICO_TIMERINTERRUPT_H
|
||||
|
||||
#if !( defined(ARDUINO_RASPBERRY_PI_PICO) || defined(ARDUINO_ADAFRUIT_FEATHER_RP2040) || defined(ARDUINO_GENERIC_RP2040) )
|
||||
#error This code is intended to run on the RASPBERRY_PI_PICO platform! Please check your Tools->Board setting.
|
||||
#else
|
||||
#define USING_RPI_PICO_TIMER_INTERRUPT true
|
||||
#endif
|
||||
|
||||
#ifndef RPI_PICO_TIMER_INTERRUPT_VERSION
|
||||
#define RPI_PICO_TIMER_INTERRUPT_VERSION "RPi_Pico_TimerInterrupt v1.0.0"
|
||||
#endif
|
||||
|
||||
#ifndef TIMER_INTERRUPT_DEBUG
|
||||
#define TIMER_INTERRUPT_DEBUG 0
|
||||
#endif
|
||||
|
||||
#include <stdio.h>
|
||||
#include "pico/stdlib.h"
|
||||
#include "hardware/timer.h"
|
||||
#include "hardware/irq.h"
|
||||
|
||||
#include "TimerInterrupt_Generic_Debug.h"
|
||||
|
||||
/*
|
||||
To enable an alarm:
|
||||
• Enable the interrupt at the timer with a write to the appropriate alarm bit in INTE: i.e. (1 << 0) for ALARM0
|
||||
• Enable the appropriate timer interrupt at the processor (see Section 2.3.2)
|
||||
• Write the time you would like the interrupt to fire to ALARM0 (i.e. the current value in TIMERAWL plus your desired
|
||||
alarm time in microseconds). Writing the time to the ALARM register sets the ARMED bit as a side effect.
|
||||
Once the alarm has fired, the ARMED bit will be set to 0 . To clear the latched interrupt, write a 1 to the appropriate bit in
|
||||
INTR.
|
||||
*/
|
||||
|
||||
|
||||
class RPI_PICO_TimerInterrupt;
|
||||
|
||||
typedef RPI_PICO_TimerInterrupt RPI_PICO_Timer;
|
||||
|
||||
// We can use many timers here
|
||||
#define MAX_RPI_PICO_NUM_TIMERS 4
|
||||
|
||||
typedef bool (*pico_timer_callback) (struct repeating_timer *t);
|
||||
|
||||
|
||||
class RPI_PICO_TimerInterrupt
|
||||
{
|
||||
private:
|
||||
|
||||
uint8_t _timerNo;
|
||||
|
||||
pico_timer_callback _callback; // pointer to the callback function
|
||||
float _frequency; // Timer frequency
|
||||
uint64_t _timerCount; // count to activate timer, in us
|
||||
|
||||
struct repeating_timer _timer;
|
||||
|
||||
public:
|
||||
|
||||
RPI_PICO_TimerInterrupt(uint8_t timerNo)
|
||||
{
|
||||
_timerNo = timerNo;
|
||||
_callback = NULL;
|
||||
};
|
||||
|
||||
// frequency (in hertz) and duration (in milliseconds). Duration = 0 or not specified => run indefinitely
|
||||
// No params and duration now. To be added in the future by adding similar functions here
|
||||
bool setFrequency(float frequency, pico_timer_callback callback)
|
||||
{
|
||||
if (_timerNo < MAX_RPI_PICO_NUM_TIMERS)
|
||||
{
|
||||
// select timer frequency is 1MHz for better accuracy. We don't use 16-bit prescaler for now.
|
||||
// Will use later if very low frequency is needed.
|
||||
_frequency = (float) 1000000;
|
||||
_timerCount = (uint64_t) _frequency / frequency;
|
||||
|
||||
TISR_LOGWARN3(F("RPI_PICO_TimerInterrupt: _timerNo ="), _timerNo, F(", _fre ="), _frequency);
|
||||
TISR_LOGWARN3(F("_count ="), (uint32_t) (_timerCount >> 32) , F("-"), (uint32_t) (_timerCount));
|
||||
|
||||
_callback = callback;
|
||||
|
||||
// static bool add_repeating_timer_us(int64_t delay_us, repeating_timer_callback_t callback, void *user_data, repeating_timer_t *out);
|
||||
// static bool add_repeating_timer_ms(int64_t delay_ms, repeating_timer_callback_t callback, void *user_data, repeating_timer_t *out);
|
||||
// bool cancel_repeating_timer (repeating_timer_t *timer);
|
||||
cancel_repeating_timer(&_timer);
|
||||
add_repeating_timer_us(_timerCount, _callback, NULL, &_timer);
|
||||
|
||||
TISR_LOGWARN1(F("add_repeating_timer_us ="), _timerCount);
|
||||
|
||||
return true;
|
||||
}
|
||||
else
|
||||
{
|
||||
TISR_LOGERROR(F("Error. Timer must be 0-3"));
|
||||
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
// interval (in microseconds) and duration (in milliseconds). Duration = 0 or not specified => run indefinitely
|
||||
// No params and duration now. To be added in the future by adding similar functions here
|
||||
bool setInterval(unsigned long interval, pico_timer_callback callback)
|
||||
{
|
||||
return setFrequency((float) (1000000.0f / interval), callback);
|
||||
}
|
||||
|
||||
bool attachInterrupt(float frequency, pico_timer_callback callback)
|
||||
{
|
||||
return setFrequency(frequency, callback);
|
||||
}
|
||||
|
||||
// interval (in microseconds) and duration (in milliseconds). Duration = 0 or not specified => run indefinitely
|
||||
// No params and duration now. To be added in the future by adding similar functions here
|
||||
bool attachInterruptInterval(unsigned long interval, pico_timer_callback callback)
|
||||
{
|
||||
return setFrequency( (float) ( 1000000.0f / interval), callback);
|
||||
}
|
||||
|
||||
void detachInterrupt()
|
||||
{
|
||||
cancel_repeating_timer(&_timer);
|
||||
}
|
||||
|
||||
void disableTimer()
|
||||
{
|
||||
cancel_repeating_timer(&_timer);
|
||||
}
|
||||
|
||||
// Duration (in milliseconds). Duration = 0 or not specified => run indefinitely
|
||||
void reattachInterrupt()
|
||||
{
|
||||
add_repeating_timer_us(_timerCount, _callback, NULL, &_timer);
|
||||
}
|
||||
|
||||
// Duration (in milliseconds). Duration = 0 or not specified => run indefinitely
|
||||
void enableTimer()
|
||||
{
|
||||
add_repeating_timer_us(_timerCount, _callback, NULL, &_timer);
|
||||
}
|
||||
|
||||
// Just stop clock source, clear the count
|
||||
void stopTimer()
|
||||
{
|
||||
cancel_repeating_timer(&_timer);
|
||||
}
|
||||
|
||||
// Just reconnect clock source, start current count from 0
|
||||
void restartTimer()
|
||||
{
|
||||
cancel_repeating_timer(&_timer);
|
||||
add_repeating_timer_us(_timerCount, _callback, NULL, &_timer);
|
||||
}
|
||||
|
||||
int8_t getTimer() __attribute__((always_inline))
|
||||
{
|
||||
return _timerNo;
|
||||
};
|
||||
}; // class RPI_PICO_TimerInterrupt
|
||||
|
||||
#endif // RPI_PICO_TIMERINTERRUPT_H
|
||||
|
||||
@@ -0,0 +1,81 @@
|
||||
/****************************************************************************************************************************
|
||||
TimerInterrupt_Generic_Debug.h
|
||||
For RP2040-based boards such as RASPBERRY_PI_PICO, ADAFRUIT_FEATHER_RP2040 and GENERIC_RP2040.
|
||||
Written by Khoi Hoang
|
||||
|
||||
Built by Khoi Hoang https://github.com/khoih-prog/RPI_PICO_TimerInterrupt
|
||||
Licensed under MIT license
|
||||
|
||||
The RPI_PICO system timer peripheral provides a global microsecond timebase for the system, and generates
|
||||
interrupts based on this timebase. It supports the following features:
|
||||
• A single 64-bit counter, incrementing once per microsecond
|
||||
• This counter can be read from a pair of latching registers, for race-free reads over a 32-bit bus.
|
||||
• Four alarms: match on the lower 32 bits of counter, IRQ on match: TIMER_IRQ_0-TIMER_IRQ_3
|
||||
|
||||
Now even you use all these new 16 ISR-based timers,with their maximum interval practically unlimited (limited only by
|
||||
unsigned long miliseconds), you just consume only one RPI_PICO timer and avoid conflicting with other cores' tasks.
|
||||
The accuracy is nearly perfect compared to software timers. The most important feature is they're ISR-based timers
|
||||
Therefore, their executions are not blocked by bad-behaving functions / tasks.
|
||||
This important feature is absolutely necessary for mission-critical tasks.
|
||||
|
||||
Based on SimpleTimer - A timer library for Arduino.
|
||||
Author: mromani@ottotecnica.com
|
||||
Copyright (c) 2010 OTTOTECNICA Italy
|
||||
|
||||
Based on BlynkTimer.h
|
||||
Author: Volodymyr Shymanskyy
|
||||
|
||||
Version: 1.0.0
|
||||
|
||||
Version Modified By Date Comments
|
||||
------- ----------- ---------- -----------
|
||||
1.0.0 K Hoang 11/05/2021 Initial coding to support RP2040-based boards such as RASPBERRY_PI_PICO. etc.
|
||||
*****************************************************************************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef TIMERINTERRUPT_GENERIC_DEBUG_H
|
||||
#define TIMERINTERRUPT_GENERIC_DEBUG_H
|
||||
|
||||
#ifdef TIMERINTERRUPT_DEBUG_PORT
|
||||
#define TISR_DBG_PORT TIMERINTERRUPT_DEBUG_PORT
|
||||
#else
|
||||
#define TISR_DBG_PORT Serial
|
||||
#endif
|
||||
|
||||
// Change _TIMERINTERRUPT_LOGLEVEL_ to set tracing and logging verbosity
|
||||
// 0: DISABLED: no logging
|
||||
// 1: ERROR: errors
|
||||
// 2: WARN: errors and warnings
|
||||
// 3: INFO: errors, warnings and informational (default)
|
||||
// 4: DEBUG: errors, warnings, informational and debug
|
||||
|
||||
#ifndef _TIMERINTERRUPT_LOGLEVEL_
|
||||
#define _TIMERINTERRUPT_LOGLEVEL_ 1
|
||||
#endif
|
||||
|
||||
#define TISR_LOGERROR(x) if(_TIMERINTERRUPT_LOGLEVEL_>0) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.println(x); }
|
||||
#define TISR_LOGERROR0(x) if(_TIMERINTERRUPT_LOGLEVEL_>0) { TISR_DBG_PORT.print(x); }
|
||||
#define TISR_LOGERROR1(x,y) if(_TIMERINTERRUPT_LOGLEVEL_>0) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.print(x); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.println(y); }
|
||||
#define TISR_LOGERROR2(x,y,z) if(_TIMERINTERRUPT_LOGLEVEL_>0) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.print(x); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.print(y); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.println(z); }
|
||||
#define TISR_LOGERROR3(x,y,z,w) if(_TIMERINTERRUPT_LOGLEVEL_>0) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.print(x); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.print(y); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.print(z); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.println(w); }
|
||||
|
||||
#define TISR_LOGWARN(x) if(_TIMERINTERRUPT_LOGLEVEL_>1) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.println(x); }
|
||||
#define TISR_LOGWARN0(x) if(_TIMERINTERRUPT_LOGLEVEL_>1) { TISR_DBG_PORT.print(x); }
|
||||
#define TISR_LOGWARN1(x,y) if(_TIMERINTERRUPT_LOGLEVEL_>1) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.print(x); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.println(y); }
|
||||
#define TISR_LOGWARN2(x,y,z) if(_TIMERINTERRUPT_LOGLEVEL_>1) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.print(x); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.print(y); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.println(z); }
|
||||
#define TISR_LOGWARN3(x,y,z,w) if(_TIMERINTERRUPT_LOGLEVEL_>1) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.print(x); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.print(y); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.print(z); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.println(w); }
|
||||
|
||||
#define TISR_LOGINFO(x) if(_TIMERINTERRUPT_LOGLEVEL_>2) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.println(x); }
|
||||
#define TISR_LOGINFO0(x) if(_TIMERINTERRUPT_LOGLEVEL_>2) { TISR_DBG_PORT.print(x); }
|
||||
#define TISR_LOGINFO1(x,y) if(_TIMERINTERRUPT_LOGLEVEL_>2) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.print(x); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.println(y); }
|
||||
#define TISR_LOGINFO2(x,y,z) if(_TIMERINTERRUPT_LOGLEVEL_>2) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.print(x); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.print(y); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.println(z); }
|
||||
#define TISR_LOGINFO3(x,y,z,w) if(_TIMERINTERRUPT_LOGLEVEL_>2) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.print(x); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.print(y); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.print(z); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.println(w); }
|
||||
|
||||
#define TISR_LOGDEBUG(x) if(_TIMERINTERRUPT_LOGLEVEL_>3) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.println(x); }
|
||||
#define TISR_LOGDEBUG0(x) if(_TIMERINTERRUPT_LOGLEVEL_>3) { TISR_DBG_PORT.print(x); }
|
||||
#define TISR_LOGDEBUG1(x,y) if(_TIMERINTERRUPT_LOGLEVEL_>3) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.print(x); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.println(y); }
|
||||
#define TISR_LOGDEBUG2(x,y,z) if(_TIMERINTERRUPT_LOGLEVEL_>3) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.print(x); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.print(y); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.println(z); }
|
||||
#define TISR_LOGDEBUG3(x,y,z,w) if(_TIMERINTERRUPT_LOGLEVEL_>3) { TISR_DBG_PORT.print("[TISR] "); TISR_DBG_PORT.print(x); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.print(y); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.print(z); TISR_DBG_PORT.print(" "); TISR_DBG_PORT.println(w); }
|
||||
|
||||
#endif //TIMERINTERRUPT_GENERIC_DEBUG_H
|
||||
Reference in New Issue
Block a user