diff --git a/boards.txt b/boards.txt
index 41ab485d..1aa274ab 100644
--- a/boards.txt
+++ b/boards.txt
@@ -8427,7 +8427,7 @@ flyboard2040_core.build.core=rp2040
 flyboard2040_core.build.ldscript=memmap_default.ld
 flyboard2040_core.build.ram_length=256k
 flyboard2040_core.build.debugscript=picoprobe.tcl
-flyboard2040_core.build.boot2=boot2_generic_03h_4_padded_checksum
+flyboard2040_core.build.boot2=boot2_w25q080_2_padded_checksum
 flyboard2040_core.build.vid=0x2e8a
 flyboard2040_core.build.pid=0x008a
 flyboard2040_core.build.usb_manufacturer="DeRuiLab"
@@ -8602,7 +8602,7 @@ flyboard2040_corepicoprobe.build.core=rp2040
 flyboard2040_corepicoprobe.build.ldscript=memmap_default.ld
 flyboard2040_corepicoprobe.build.ram_length=256k
 flyboard2040_corepicoprobe.build.debugscript=picoprobe.tcl
-flyboard2040_corepicoprobe.build.boot2=boot2_generic_03h_4_padded_checksum
+flyboard2040_corepicoprobe.build.boot2=boot2_w25q080_2_padded_checksum
 flyboard2040_corepicoprobe.build.vid=0x2e8a
 flyboard2040_corepicoprobe.build.pid=0x008a
 flyboard2040_corepicoprobe.build.usb_manufacturer="DeRuiLab"
@@ -8777,7 +8777,7 @@ flyboard2040_corepicodebug.build.core=rp2040
 flyboard2040_corepicodebug.build.ldscript=memmap_default.ld
 flyboard2040_corepicodebug.build.ram_length=240k
 flyboard2040_corepicodebug.build.debugscript=picodebug.tcl
-flyboard2040_corepicodebug.build.boot2=boot2_generic_03h_4_padded_checksum
+flyboard2040_corepicodebug.build.boot2=boot2_w25q080_2_padded_checksum
 flyboard2040_corepicodebug.build.vid=0x2e8a
 flyboard2040_corepicodebug.build.pid=0x008a
 flyboard2040_corepicodebug.build.usb_manufacturer="DeRuiLab"
diff --git a/cores/rp2040/SerialPIO.cpp b/cores/rp2040/SerialPIO.cpp
index d38bb29b..68579891 100644
--- a/cores/rp2040/SerialPIO.cpp
+++ b/cores/rp2040/SerialPIO.cpp
@@ -230,7 +230,7 @@ void SerialPIO::begin(unsigned long baud, uint16_t config) {
         pio_sm_clear_fifos(_rxPIO, _rxSM); // Remove any existing data
 
         // Put phase divider into OSR w/o using add'l program memory
-        pio_sm_put_blocking(_rxPIO, _rxSM, clock_get_hz(clk_sys) / (_baud * 2) - 5 /* insns in PIO halfbit loop */);
+        pio_sm_put_blocking(_rxPIO, _rxSM, clock_get_hz(clk_sys) / (_baud * 2) - 7 /* insns in PIO halfbit loop */);
         pio_sm_exec(_rxPIO, _rxSM, pio_encode_pull(false, false));
 
         // Join the TX FIFO to the RX one now that we don't need it
diff --git a/tools/json/flyboard2040_core.json b/tools/json/flyboard2040_core.json
index fab7a0b8..de6b228f 100644
--- a/tools/json/flyboard2040_core.json
+++ b/tools/json/flyboard2040_core.json
@@ -2,7 +2,7 @@
   "build": {
     "arduino": {
       "earlephilhower": {
-        "boot2_source": "boot2_generic_03h_4_padded_checksum.S",
+        "boot2_source": "boot2_w25q080_2_padded_checksum.S",
         "usb_vid": "0x2E8A",
         "usb_pid": "0x008A"
       }
diff --git a/tools/makeboards.py b/tools/makeboards.py
index c417b0d2..d2689c9c 100755
--- a/tools/makeboards.py
+++ b/tools/makeboards.py
@@ -334,7 +334,7 @@ MakeBoard("cytron_maker_pi_rp2040", "Cytron", "Maker Pi RP2040", "0x2e8a", "0x10
 MakeBoard("degz_mizu", "Degz", "Mizu", "0x2e8a", "0x000a", 250, "DEGZ_MIZU", 8, "boot2_generic_03h_4_padded_checksum")
 
 # DeRuiLab
-MakeBoard("flyboard2040_core", "DeRuiLab", "FlyBoard2040Core", "0x2e8a", "0x008a", 500, "FLYBOARD2040_CORE", 4, "boot2_generic_03h_4_padded_checksum")
+MakeBoard("flyboard2040_core", "DeRuiLab", "FlyBoard2040Core", "0x2e8a", "0x008a", 500, "FLYBOARD2040_CORE", 4, "boot2_w25q080_2_padded_checksum")
 
 # DFRobot
 MakeBoard("dfrobot_beetle_rp2040", "DFRobot", "Beetle RP2040", "0x3343", "0x4253", 250, "DFROBOT_BEETLE_RP2040", 2, "boot2_w25q080_2_padded_checksum")
diff --git a/variants/flyboard2040_core/pins_arduino.h b/variants/flyboard2040_core/pins_arduino.h
index e451e85a..800e00eb 100644
--- a/variants/flyboard2040_core/pins_arduino.h
+++ b/variants/flyboard2040_core/pins_arduino.h
@@ -27,8 +27,8 @@
 #define PIN_SPI1_SS    (13u)
 
 // Wire
-#define PIN_WIRE0_SDA  (6u)
-#define PIN_WIRE0_SCL  (7u)
+#define PIN_WIRE0_SDA  (16u)
+#define PIN_WIRE0_SCL  (17u)
 
 #define PIN_WIRE1_SDA  (14u)
 #define PIN_WIRE1_SCL  (15u)